1 /* $NetBSD: gtmr.c,v 1.2 2013/06/20 05:30:21 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.2 2013/06/20 05:30:21 matt Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/device.h> 38 #include <sys/intr.h> 39 #include <sys/kernel.h> 40 #include <sys/proc.h> 41 #include <sys/systm.h> 42 #include <sys/timetc.h> 43 44 #include <prop/proplib.h> 45 46 #include <arm/cortex/gtmr_var.h> 47 48 #include <arm/cortex/mpcore_var.h> 49 50 static int gtmr_match(device_t, cfdata_t, void *); 51 static void gtmr_attach(device_t, device_t, void *); 52 53 static int clockhandler(void *); 54 55 static u_int gtmr_get_timecount(struct timecounter *); 56 57 static struct gtmr_softc gtmr_sc; 58 59 static struct timecounter gtmr_timecounter = { 60 .tc_get_timecount = gtmr_get_timecount, 61 .tc_poll_pps = 0, 62 .tc_counter_mask = ~0u, 63 .tc_frequency = 0, /* set by cpu_initclocks() */ 64 .tc_name = NULL, /* set by attach */ 65 .tc_quality = 500, 66 .tc_priv = >mr_sc, 67 .tc_next = NULL, 68 }; 69 70 CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL); 71 72 /* ARGSUSED */ 73 static int 74 gtmr_match(device_t parent, cfdata_t cf, void *aux) 75 { 76 struct mpcore_attach_args * const mpcaa = aux; 77 78 if (gtmr_sc.sc_dev != NULL) 79 return 0; 80 81 if ((armreg_pfr1_read() & ARM_PFR1_GTIMER_MASK) == 0) 82 return 0; 83 84 if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) 85 return 0; 86 87 return 1; 88 } 89 90 static void 91 gtmr_attach(device_t parent, device_t self, void *aux) 92 { 93 struct gtmr_softc *sc = >mr_sc; 94 prop_dictionary_t dict = device_properties(self); 95 char freqbuf[sizeof("X.XXX SHz")]; 96 97 /* 98 * This runs at a fixed frequency of 1 to 50MHz. 99 */ 100 prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); 101 102 humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); 103 104 aprint_naive("\n"); 105 aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf); 106 107 /* 108 * Enable the virtual counter to be accessed from usermode. 109 */ 110 armreg_cntk_ctl_write(armreg_cntk_ctl_read() | ARM_CNTKCTL_PL0VCTEN); 111 112 113 self->dv_private = sc; 114 sc->sc_dev = self; 115 116 evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, 117 device_xname(self), "missing interrupts"); 118 119 sc->sc_global_ih = intr_establish(IRQ_GTMR_PPI_VTIMER, IPL_CLOCK, 120 IST_EDGE, clockhandler, NULL); 121 if (sc->sc_global_ih == NULL) 122 panic("%s: unable to register timer interrupt", __func__); 123 aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n", 124 IRQ_GTMR_PPI_VTIMER); 125 } 126 127 void 128 gtmr_init_cpu_clock(struct cpu_info *ci) 129 { 130 struct gtmr_softc * const sc = >mr_sc; 131 uint64_t now = armreg_cntv_ct_read(); 132 133 KASSERT(ci == curcpu()); 134 135 ci->ci_lastintr = now; 136 137 /* 138 * Schedule the next interrupt. 139 */ 140 now += sc->sc_autoinc; 141 armreg_cntv_tval_write(sc->sc_autoinc); 142 143 /* 144 * enable timer and stop masking the timer. 145 */ 146 armreg_cntv_ctl_write(ARM_CNTCTL_ENABLE); 147 #if 0 148 printf("%s: %s: ctl %#x cmp %#"PRIx64" now %#"PRIx64"\n", 149 __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(), 150 armreg_cntv_cval_read(), armreg_cntv_ct_read()); 151 152 int s = splsched(); 153 uint64_t when = now; 154 u_int n = 0; 155 while ((now = armreg_cntv_ct_read()) < when) { 156 /* spin */ 157 n++; 158 KASSERTMSG(n <= sc->sc_autoinc, 159 "spun %u times but only %"PRIu64" has passed", 160 n, when - now); 161 } 162 printf("%s: %s: status %#x cmp %#"PRIx64" now %#"PRIx64"\n", 163 __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(), 164 armreg_cntv_cval_read(), armreg_cntv_ct_read()); 165 splx(s); 166 #elif 0 167 delay(1000000 / hz + 1000); 168 #endif 169 } 170 171 void 172 cpu_initclocks(void) 173 { 174 struct gtmr_softc * const sc = >mr_sc; 175 176 KASSERT(sc->sc_dev != NULL); 177 KASSERT(sc->sc_freq != 0); 178 179 sc->sc_autoinc = sc->sc_freq / hz; 180 181 gtmr_init_cpu_clock(curcpu()); 182 183 gtmr_timecounter.tc_name = device_xname(sc->sc_dev); 184 gtmr_timecounter.tc_frequency = sc->sc_freq; 185 186 tc_init(>mr_timecounter); 187 } 188 189 void 190 gtmr_delay(unsigned int n) 191 { 192 struct gtmr_softc * const sc = >mr_sc; 193 194 KASSERT(sc != NULL); 195 196 uint32_t freq = sc->sc_freq ? sc->sc_freq : curcpu()->ci_data.cpu_cc_freq / 2; 197 KASSERT(freq != 0); 198 199 /* 200 * not quite divide by 1000000 but close enough 201 * (higher by 1.3% which means we wait 1.3% longer). 202 */ 203 const uint64_t incr_per_us = (freq >> 20) + (freq >> 24); 204 205 const uint64_t delta = n * incr_per_us; 206 const uint64_t base = armreg_cntv_ct_read(); 207 const uint64_t finish = base + delta; 208 209 while (armreg_cntv_ct_read() < finish) { 210 /* spin */ 211 } 212 } 213 214 /* 215 * clockhandler: 216 * 217 * Handle the hardclock interrupt. 218 */ 219 static int 220 clockhandler(void *arg) 221 { 222 struct clockframe * const cf = arg; 223 struct gtmr_softc * const sc = >mr_sc; 224 struct cpu_info * const ci = curcpu(); 225 226 const uint64_t now = armreg_cntv_ct_read(); 227 uint64_t delta = now - ci->ci_lastintr; 228 229 #if 0 230 printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", 231 __func__, cf, ci->ci_data.cpu_name, now, delta); 232 #endif 233 KASSERTMSG(delta > sc->sc_autoinc / 100, 234 "%s: interrupting too quickly (delta=%"PRIu64")", 235 ci->ci_data.cpu_name, delta); 236 237 /* 238 * If we got interrutped too soon (delta < sc->sc_autoinc) or 239 * we missed a tick (delta >= 2 * sc->sc_autoinc), don't try to 240 * adjust for jitter. 241 */ 242 if (delta < sc->sc_autoinc || delta >= 2 * sc->sc_autoinc) { 243 delta = 0; 244 } 245 armreg_cntv_tval_write(sc->sc_autoinc - delta); 246 247 ci->ci_lastintr = now; 248 249 hardclock(cf); 250 251 if (delta > 2 * sc->sc_autoinc) 252 sc->sc_ev_missing_ticks.ev_count += (delta / sc->sc_autoinc) - 1; 253 254 return 1; 255 } 256 257 void 258 setstatclockrate(int newhz) 259 { 260 } 261 262 static u_int 263 gtmr_get_timecount(struct timecounter *tc) 264 { 265 266 return (u_int) (armreg_cntv_ct_read()); 267 } 268