xref: /netbsd-src/sys/arch/arm/cortex/gtmr.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: gtmr.c,v 1.5 2013/12/17 13:11:18 joerg Exp $	*/
2 
3 /*-
4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.5 2013/12/17 13:11:18 joerg Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/device.h>
38 #include <sys/intr.h>
39 #include <sys/kernel.h>
40 #include <sys/percpu.h>
41 #include <sys/proc.h>
42 #include <sys/systm.h>
43 #include <sys/timetc.h>
44 
45 #include <prop/proplib.h>
46 
47 #include <arm/cortex/gtmr_var.h>
48 
49 #include <arm/cortex/mpcore_var.h>
50 
51 static int gtmr_match(device_t, cfdata_t, void *);
52 static void gtmr_attach(device_t, device_t, void *);
53 
54 static int clockhandler(void *);
55 
56 static u_int gtmr_get_timecount(struct timecounter *);
57 
58 static struct gtmr_softc gtmr_sc;
59 
60 struct gtmr_percpu {
61 	uint32_t pc_delta;
62 };
63 
64 static struct timecounter gtmr_timecounter = {
65 	.tc_get_timecount = gtmr_get_timecount,
66 	.tc_poll_pps = 0,
67 	.tc_counter_mask = ~0u,
68 	.tc_frequency = 0,			/* set by cpu_initclocks() */
69 	.tc_name = NULL,			/* set by attach */
70 	.tc_quality = 500,
71 	.tc_priv = &gtmr_sc,
72 	.tc_next = NULL,
73 };
74 
75 CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL);
76 
77 /* ARGSUSED */
78 static int
79 gtmr_match(device_t parent, cfdata_t cf, void *aux)
80 {
81 	struct mpcore_attach_args * const mpcaa = aux;
82 
83 	if (gtmr_sc.sc_dev != NULL)
84 		return 0;
85 
86 	if ((armreg_pfr1_read() & ARM_PFR1_GTIMER_MASK) == 0)
87 		return 0;
88 
89 	if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0)
90 		return 0;
91 
92 	return 1;
93 }
94 
95 static void
96 gtmr_attach(device_t parent, device_t self, void *aux)
97 {
98         struct gtmr_softc *sc = &gtmr_sc;
99 	prop_dictionary_t dict = device_properties(self);
100 	char freqbuf[sizeof("X.XXX SHz")];
101 
102 	/*
103 	 * This runs at a fixed frequency of 1 to 50MHz.
104 	 */
105 	prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
106 
107 	humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000);
108 
109 	aprint_naive("\n");
110 	aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf);
111 
112 	/*
113 	 * Enable the virtual counter to be accessed from usermode.
114 	 */
115 	armreg_cntk_ctl_write(armreg_cntk_ctl_read() | ARM_CNTKCTL_PL0VCTEN);
116 
117 	self->dv_private = sc;
118 	sc->sc_dev = self;
119 
120 #ifdef DIAGNOSTIC
121 	sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu));
122 #endif
123 
124 	evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL,
125 	    device_xname(self), "missing interrupts");
126 
127 	sc->sc_global_ih = intr_establish(IRQ_GTMR_PPI_VTIMER, IPL_CLOCK,
128 	    IST_EDGE, clockhandler, NULL);
129 	if (sc->sc_global_ih == NULL)
130 		panic("%s: unable to register timer interrupt", __func__);
131 	aprint_normal_dev(self, "interrupting on irq %d\n",
132 	    IRQ_GTMR_PPI_VTIMER);
133 
134 	const uint32_t cnt_frq = armreg_cnt_frq_read();
135 	if (cnt_frq == 0) {
136 		aprint_verbose_dev(self, "cp15 CNT_FRQ not set\n");
137 	} else if (cnt_frq != sc->sc_freq) {
138 		aprint_verbose_dev(self,
139 		    "cp15 CNT_FRQ (%u) differs from supplied frequency\n",
140 		    cnt_frq);
141 	}
142 }
143 
144 void
145 gtmr_init_cpu_clock(struct cpu_info *ci)
146 {
147 	struct gtmr_softc * const sc = &gtmr_sc;
148 
149 	KASSERT(ci == curcpu());
150 
151 	int s = splsched();
152 	/*
153 	 * enable timer and stop masking the timer.
154 	 */
155 	armreg_cntv_ctl_write(ARM_CNTCTL_ENABLE);
156 
157 	/*
158 	 * Get now and update the compare timer.
159 	 */
160 	ci->ci_lastintr = armreg_cntv_ct_read();
161 	armreg_cntv_tval_write(sc->sc_autoinc);
162 #if 0
163 	printf("%s: %s: delta cval = %"PRIu64"\n",
164 	    __func__, ci->ci_data.cpu_name,
165 	    armreg_cntv_cval_read() - ci->ci_lastintr);
166 #endif
167 	splx(s);
168 #if 0
169 	printf("%s: %s: ctl %#x cmp %#"PRIx64" now %#"PRIx64"\n",
170 	    __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(),
171 	    armreg_cntv_cval_read(), armreg_cntv_ct_read());
172 
173 	s = splsched();
174 
175 	uint64_t now64;
176 	uint64_t start64 = armreg_cntv_ct_read();
177 	do {
178 		now64 = armreg_cntv_ct_read();
179 	} while (start64 == now64);
180 	start64 = now64;
181 	uint64_t end64 = start64 + 64;
182 	uint32_t start32 = armreg_pmccntr_read();
183 	do {
184 		now64 = armreg_cntv_ct_read();
185 	} while (end64 != now64);
186 	uint32_t end32 = armreg_pmccntr_read();
187 
188 	uint32_t diff32 = end64 - start64;
189 	printf("%s: %s: %u cycles per tick\n",
190 	    __func__, ci->ci_data.cpu_name, (end32 - start32) / diff32);
191 
192 	printf("%s: %s: status %#x cmp %#"PRIx64" now %#"PRIx64"\n",
193 	    __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(),
194 	    armreg_cntv_cval_read(), armreg_cntv_ct_read());
195 	splx(s);
196 #elif 0
197 	delay(1000000 / hz + 1000);
198 #endif
199 }
200 
201 void
202 cpu_initclocks(void)
203 {
204 	struct gtmr_softc * const sc = &gtmr_sc;
205 
206 	KASSERT(sc->sc_dev != NULL);
207 	KASSERT(sc->sc_freq != 0);
208 
209 	sc->sc_autoinc = sc->sc_freq / hz;
210 
211 	gtmr_init_cpu_clock(curcpu());
212 
213 	gtmr_timecounter.tc_name = device_xname(sc->sc_dev);
214 	gtmr_timecounter.tc_frequency = sc->sc_freq;
215 
216 	tc_init(&gtmr_timecounter);
217 }
218 
219 void
220 gtmr_delay(unsigned int n)
221 {
222 	struct gtmr_softc * const sc = &gtmr_sc;
223 
224 	KASSERT(sc != NULL);
225 
226 	uint32_t freq = sc->sc_freq ? sc->sc_freq : armreg_cnt_frq_read();
227 	KASSERT(freq != 0);
228 
229 	/*
230 	 * not quite divide by 1000000 but close enough
231 	 * (higher by 1.3% which means we wait 1.3% longer).
232 	 */
233 	const uint64_t incr_per_us = (freq >> 20) + (freq >> 24);
234 
235 	const uint64_t delta = n * incr_per_us;
236 	const uint64_t base = armreg_cntv_ct_read();
237 	const uint64_t finish = base + delta;
238 
239 	while (armreg_cntv_ct_read() < finish) {
240 		/* spin */
241 	}
242 }
243 
244 /*
245  * clockhandler:
246  *
247  *	Handle the hardclock interrupt.
248  */
249 static int
250 clockhandler(void *arg)
251 {
252 	const uint64_t now = armreg_cntv_ct_read();
253 	struct cpu_info * const ci = curcpu();
254 	uint64_t delta = now - ci->ci_lastintr;
255 	struct clockframe * const cf = arg;
256 	struct gtmr_softc * const sc = &gtmr_sc;
257 
258 #ifdef DIAGNOSTIC
259 	const uint64_t then = armreg_cntv_cval_read();
260 	struct gtmr_percpu * const pc = percpu_getref(sc->sc_percpu);
261 	KASSERTMSG(then <= now, "%"PRId64, now - then);
262 	KASSERTMSG(then + pc->pc_delta >= ci->ci_lastintr + sc->sc_autoinc,
263 	    "%"PRId64, then + pc->pc_delta - ci->ci_lastintr - sc->sc_autoinc);
264 #endif
265 
266 #if 0
267 	printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n",
268 	     __func__, cf, ci->ci_data.cpu_name, now, delta);
269 #endif
270 	KASSERTMSG(delta > sc->sc_autoinc / 100,
271 	    "%s: interrupting too quickly (delta=%"PRIu64") autoinc=%lu",
272 	    ci->ci_data.cpu_name, delta, sc->sc_autoinc);
273 
274 	/*
275 	 * If we got interrupted too soon (delta < sc->sc_autoinc) or
276 	 * we missed a tick (delta >= 2 * sc->sc_autoinc), don't try to
277 	 * adjust for jitter.
278 	 */
279 	delta -= sc->sc_autoinc;
280 	if (delta >= sc->sc_autoinc) {
281 		delta = 0;
282 	}
283 	armreg_cntv_tval_write(sc->sc_autoinc - delta);
284 
285 	ci->ci_lastintr = now;
286 
287 #ifdef DIAGNOSTIC
288 	KASSERT(delta == (uint32_t) delta);
289 	pc->pc_delta = delta;
290 	percpu_putref(sc->sc_percpu);
291 #endif
292 
293 	hardclock(cf);
294 
295 	sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc;
296 
297 	return 1;
298 }
299 
300 void
301 setstatclockrate(int newhz)
302 {
303 }
304 
305 static u_int
306 gtmr_get_timecount(struct timecounter *tc)
307 {
308 
309 	return (u_int) (armreg_cntv_ct_read());
310 }
311