xref: /netbsd-src/sys/arch/arm/cortex/gtmr.c (revision 4d12bfcd155352508213ace5ccc59ce930ea2974)
1 /*	$NetBSD: gtmr.c,v 1.3 2013/09/07 01:42:44 matt Exp $	*/
2 
3 /*-
4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.3 2013/09/07 01:42:44 matt Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/device.h>
38 #include <sys/intr.h>
39 #include <sys/kernel.h>
40 #include <sys/proc.h>
41 #include <sys/systm.h>
42 #include <sys/timetc.h>
43 
44 #include <prop/proplib.h>
45 
46 #include <arm/cortex/gtmr_var.h>
47 
48 #include <arm/cortex/mpcore_var.h>
49 
50 static int gtmr_match(device_t, cfdata_t, void *);
51 static void gtmr_attach(device_t, device_t, void *);
52 
53 static int clockhandler(void *);
54 
55 static u_int gtmr_get_timecount(struct timecounter *);
56 
57 static struct gtmr_softc gtmr_sc;
58 
59 static struct timecounter gtmr_timecounter = {
60 	.tc_get_timecount = gtmr_get_timecount,
61 	.tc_poll_pps = 0,
62 	.tc_counter_mask = ~0u,
63 	.tc_frequency = 0,			/* set by cpu_initclocks() */
64 	.tc_name = NULL,			/* set by attach */
65 	.tc_quality = 500,
66 	.tc_priv = &gtmr_sc,
67 	.tc_next = NULL,
68 };
69 
70 CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL);
71 
72 /* ARGSUSED */
73 static int
74 gtmr_match(device_t parent, cfdata_t cf, void *aux)
75 {
76 	struct mpcore_attach_args * const mpcaa = aux;
77 
78 	if (gtmr_sc.sc_dev != NULL)
79 		return 0;
80 
81 	if ((armreg_pfr1_read() & ARM_PFR1_GTIMER_MASK) == 0)
82 		return 0;
83 
84 	if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0)
85 		return 0;
86 
87 	return 1;
88 }
89 
90 static void
91 gtmr_attach(device_t parent, device_t self, void *aux)
92 {
93         struct gtmr_softc *sc = &gtmr_sc;
94 	prop_dictionary_t dict = device_properties(self);
95 	char freqbuf[sizeof("X.XXX SHz")];
96 
97 	/*
98 	 * This runs at a fixed frequency of 1 to 50MHz.
99 	 */
100 	prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
101 
102 	humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000);
103 
104 	aprint_naive("\n");
105 	aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf);
106 
107 	/*
108 	 * Enable the virtual counter to be accessed from usermode.
109 	 */
110 	armreg_cntk_ctl_write(armreg_cntk_ctl_read() | ARM_CNTKCTL_PL0VCTEN);
111 
112 
113 	self->dv_private = sc;
114 	sc->sc_dev = self;
115 
116 	evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL,
117 	    device_xname(self), "missing interrupts");
118 
119 	sc->sc_global_ih = intr_establish(IRQ_GTMR_PPI_VTIMER, IPL_CLOCK,
120 	    IST_EDGE, clockhandler, NULL);
121 	if (sc->sc_global_ih == NULL)
122 		panic("%s: unable to register timer interrupt", __func__);
123 	aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n",
124 	    IRQ_GTMR_PPI_VTIMER);
125 }
126 
127 void
128 gtmr_init_cpu_clock(struct cpu_info *ci)
129 {
130 	struct gtmr_softc * const sc = &gtmr_sc;
131 
132 	KASSERT(ci == curcpu());
133 
134 	int s = splsched();
135 	/*
136 	 * enable timer and stop masking the timer.
137 	 */
138 	armreg_cntv_ctl_write(ARM_CNTCTL_ENABLE);
139 
140 	/*
141 	 * Get now and update the compare timer.
142 	 */
143 	ci->ci_lastintr = armreg_cntv_ct_read();
144 	armreg_cntv_tval_write(sc->sc_autoinc);
145 #if 0
146 	printf("%s: %s: delta cval = %"PRIu64"\n",
147 	    __func__, ci->ci_data.cpu_name,
148 	    armreg_cntv_cval_read() - ci->ci_lastintr);
149 #endif
150 	splx(s);
151 #if 0
152 	printf("%s: %s: ctl %#x cmp %#"PRIx64" now %#"PRIx64"\n",
153 	    __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(),
154 	    armreg_cntv_cval_read(), armreg_cntv_ct_read());
155 
156 	s = splsched();
157 
158 	uint64_t now64;
159 	uint64_t start64 = armreg_cntv_ct_read();
160 	do {
161 		now64 = armreg_cntv_ct_read();
162 	} while (start64 == now64);
163 	start64 = now64;
164 	uint64_t end64 = start64 + 64;
165 	uint32_t start32 = armreg_pmccntr_read();
166 	do {
167 		now64 = armreg_cntv_ct_read();
168 	} while (end64 != now64);
169 	uint32_t end32 = armreg_pmccntr_read();
170 
171 	uint32_t diff32 = end64 - start64;
172 	printf("%s: %s: %u cycles per tick\n",
173 	    __func__, ci->ci_data.cpu_name, (end32 - start32) / diff32);
174 
175 	printf("%s: %s: status %#x cmp %#"PRIx64" now %#"PRIx64"\n",
176 	    __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(),
177 	    armreg_cntv_cval_read(), armreg_cntv_ct_read());
178 	splx(s);
179 #elif 0
180 	delay(1000000 / hz + 1000);
181 #endif
182 }
183 
184 void
185 cpu_initclocks(void)
186 {
187 	struct gtmr_softc * const sc = &gtmr_sc;
188 
189 	KASSERT(sc->sc_dev != NULL);
190 	KASSERT(sc->sc_freq != 0);
191 
192 	sc->sc_autoinc = sc->sc_freq / hz;
193 
194 	gtmr_init_cpu_clock(curcpu());
195 
196 	gtmr_timecounter.tc_name = device_xname(sc->sc_dev);
197 	gtmr_timecounter.tc_frequency = sc->sc_freq;
198 
199 	tc_init(&gtmr_timecounter);
200 }
201 
202 void
203 gtmr_delay(unsigned int n)
204 {
205 	struct gtmr_softc * const sc = &gtmr_sc;
206 
207 	KASSERT(sc != NULL);
208 
209 	uint32_t freq = sc->sc_freq ? sc->sc_freq : curcpu()->ci_data.cpu_cc_freq / 2;
210 	KASSERT(freq != 0);
211 
212 	/*
213 	 * not quite divide by 1000000 but close enough
214 	 * (higher by 1.3% which means we wait 1.3% longer).
215 	 */
216 	const uint64_t incr_per_us = (freq >> 20) + (freq >> 24);
217 
218 	const uint64_t delta = n * incr_per_us;
219 	const uint64_t base = armreg_cntv_ct_read();
220 	const uint64_t finish = base + delta;
221 
222 	while (armreg_cntv_ct_read() < finish) {
223 		/* spin */
224 	}
225 }
226 
227 /*
228  * clockhandler:
229  *
230  *	Handle the hardclock interrupt.
231  */
232 static int
233 clockhandler(void *arg)
234 {
235 	struct clockframe * const cf = arg;
236 	struct gtmr_softc * const sc = &gtmr_sc;
237 	struct cpu_info * const ci = curcpu();
238 
239 	const uint64_t now = armreg_cntv_ct_read();
240 	uint64_t delta = now - ci->ci_lastintr;
241 
242 #ifdef DIAGNOSTIC
243 	const uint64_t then = armreg_cntv_cval_read();
244 	KASSERTMSG(then <= now, "%"PRId64, now - then);
245 	KASSERTMSG(then - ci->ci_lastintr >= sc->sc_autoinc, "%"PRId64,
246 	    then - ci->ci_lastintr - sc->sc_autoinc);
247 #endif
248 
249 #if 0
250 	printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n",
251 	     __func__, cf, ci->ci_data.cpu_name, now, delta);
252 #endif
253 	KASSERTMSG(delta > sc->sc_autoinc / 100,
254 	    "%s: interrupting too quickly (delta=%"PRIu64") autoinc=%lu",
255 	    ci->ci_data.cpu_name, delta, sc->sc_autoinc);
256 
257 	/*
258 	 * If we got interrutped too soon (delta < sc->sc_autoinc) or
259 	 * we missed a tick (delta >= 2 * sc->sc_autoinc), don't try to
260 	 * adjust for jitter.
261 	 */
262 	delta -= sc->sc_autoinc;
263 	if (delta < 0 || delta >= sc->sc_autoinc) {
264 		delta = 0;
265 	}
266 	armreg_cntv_tval_write(sc->sc_autoinc - delta);
267 
268 	ci->ci_lastintr = now - delta;
269 
270 	hardclock(cf);
271 
272 	if (delta > 2 * sc->sc_autoinc)
273 		sc->sc_ev_missing_ticks.ev_count += (delta / sc->sc_autoinc) - 1;
274 
275 	return 1;
276 }
277 
278 void
279 setstatclockrate(int newhz)
280 {
281 }
282 
283 static u_int
284 gtmr_get_timecount(struct timecounter *tc)
285 {
286 
287 	return (u_int) (armreg_cntv_ct_read());
288 }
289