1 /* $NetBSD: gtmr.c,v 1.7 2014/04/13 02:22:21 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: gtmr.c,v 1.7 2014/04/13 02:22:21 matt Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/device.h> 38 #include <sys/intr.h> 39 #include <sys/kernel.h> 40 #include <sys/percpu.h> 41 #include <sys/proc.h> 42 #include <sys/systm.h> 43 #include <sys/timetc.h> 44 45 #include <prop/proplib.h> 46 47 #include <arm/cortex/gtmr_var.h> 48 49 #include <arm/cortex/mpcore_var.h> 50 51 static int gtmr_match(device_t, cfdata_t, void *); 52 static void gtmr_attach(device_t, device_t, void *); 53 54 static int gtmr_intr(void *); 55 56 static u_int gtmr_get_timecount(struct timecounter *); 57 58 static struct gtmr_softc gtmr_sc; 59 60 struct gtmr_percpu { 61 uint32_t pc_delta; 62 }; 63 64 static struct timecounter gtmr_timecounter = { 65 .tc_get_timecount = gtmr_get_timecount, 66 .tc_poll_pps = 0, 67 .tc_counter_mask = ~0u, 68 .tc_frequency = 0, /* set by cpu_initclocks() */ 69 .tc_name = NULL, /* set by attach */ 70 .tc_quality = 500, 71 .tc_priv = >mr_sc, 72 .tc_next = NULL, 73 }; 74 75 CFATTACH_DECL_NEW(armgtmr, 0, gtmr_match, gtmr_attach, NULL, NULL); 76 77 /* ARGSUSED */ 78 static int 79 gtmr_match(device_t parent, cfdata_t cf, void *aux) 80 { 81 struct mpcore_attach_args * const mpcaa = aux; 82 83 if (gtmr_sc.sc_dev != NULL) 84 return 0; 85 86 if ((armreg_pfr1_read() & ARM_PFR1_GTIMER_MASK) == 0) 87 return 0; 88 89 if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) 90 return 0; 91 92 return 1; 93 } 94 95 static void 96 gtmr_attach(device_t parent, device_t self, void *aux) 97 { 98 struct gtmr_softc *sc = >mr_sc; 99 prop_dictionary_t dict = device_properties(self); 100 char freqbuf[sizeof("X.XXX SHz")]; 101 102 /* 103 * This runs at a fixed frequency of 1 to 50MHz. 104 */ 105 prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); 106 KASSERT(sc->sc_freq != 0); 107 108 humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); 109 110 aprint_naive("\n"); 111 aprint_normal(": ARMv7 Generic 64-bit Timer (%s)\n", freqbuf); 112 113 /* 114 * Enable the virtual counter to be accessed from usermode. 115 */ 116 armreg_cntk_ctl_write(armreg_cntk_ctl_read() | ARM_CNTKCTL_PL0VCTEN); 117 118 self->dv_private = sc; 119 sc->sc_dev = self; 120 121 #ifdef DIAGNOSTIC 122 sc->sc_percpu = percpu_alloc(sizeof(struct gtmr_percpu)); 123 #endif 124 125 evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, 126 device_xname(self), "missing interrupts"); 127 128 sc->sc_global_ih = intr_establish(IRQ_GTMR_PPI_VTIMER, IPL_CLOCK, 129 IST_EDGE | IST_MPSAFE, gtmr_intr, NULL); 130 if (sc->sc_global_ih == NULL) 131 panic("%s: unable to register timer interrupt", __func__); 132 aprint_normal_dev(self, "interrupting on irq %d\n", 133 IRQ_GTMR_PPI_VTIMER); 134 135 const uint32_t cnt_frq = armreg_cnt_frq_read(); 136 if (cnt_frq == 0) { 137 aprint_verbose_dev(self, "cp15 CNT_FRQ not set\n"); 138 } else if (cnt_frq != sc->sc_freq) { 139 aprint_verbose_dev(self, 140 "cp15 CNT_FRQ (%u) differs from supplied frequency\n", 141 cnt_frq); 142 } 143 } 144 145 void 146 gtmr_init_cpu_clock(struct cpu_info *ci) 147 { 148 struct gtmr_softc * const sc = >mr_sc; 149 150 KASSERT(ci == curcpu()); 151 152 int s = splsched(); 153 /* 154 * enable timer and stop masking the timer. 155 */ 156 armreg_cntv_ctl_write(ARM_CNTCTL_ENABLE); 157 158 /* 159 * Get now and update the compare timer. 160 */ 161 ci->ci_lastintr = armreg_cntv_ct_read(); 162 armreg_cntv_tval_write(sc->sc_autoinc); 163 #if 0 164 printf("%s: %s: delta cval = %"PRIu64"\n", 165 __func__, ci->ci_data.cpu_name, 166 armreg_cntv_cval_read() - ci->ci_lastintr); 167 #endif 168 splx(s); 169 #if 0 170 printf("%s: %s: ctl %#x cmp %#"PRIx64" now %#"PRIx64"\n", 171 __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(), 172 armreg_cntv_cval_read(), armreg_cntv_ct_read()); 173 174 s = splsched(); 175 176 uint64_t now64; 177 uint64_t start64 = armreg_cntv_ct_read(); 178 do { 179 now64 = armreg_cntv_ct_read(); 180 } while (start64 == now64); 181 start64 = now64; 182 uint64_t end64 = start64 + 64; 183 uint32_t start32 = armreg_pmccntr_read(); 184 do { 185 now64 = armreg_cntv_ct_read(); 186 } while (end64 != now64); 187 uint32_t end32 = armreg_pmccntr_read(); 188 189 uint32_t diff32 = end64 - start64; 190 printf("%s: %s: %u cycles per tick\n", 191 __func__, ci->ci_data.cpu_name, (end32 - start32) / diff32); 192 193 printf("%s: %s: status %#x cmp %#"PRIx64" now %#"PRIx64"\n", 194 __func__, ci->ci_data.cpu_name, armreg_cntv_ctl_read(), 195 armreg_cntv_cval_read(), armreg_cntv_ct_read()); 196 splx(s); 197 #elif 0 198 delay(1000000 / hz + 1000); 199 #endif 200 } 201 202 void 203 cpu_initclocks(void) 204 { 205 struct gtmr_softc * const sc = >mr_sc; 206 207 KASSERT(sc->sc_dev != NULL); 208 KASSERT(sc->sc_freq != 0); 209 210 sc->sc_autoinc = sc->sc_freq / hz; 211 212 gtmr_init_cpu_clock(curcpu()); 213 214 gtmr_timecounter.tc_name = device_xname(sc->sc_dev); 215 gtmr_timecounter.tc_frequency = sc->sc_freq; 216 217 tc_init(>mr_timecounter); 218 } 219 220 void 221 gtmr_delay(unsigned int n) 222 { 223 struct gtmr_softc * const sc = >mr_sc; 224 225 KASSERT(sc != NULL); 226 227 uint32_t freq = sc->sc_freq ? sc->sc_freq : armreg_cnt_frq_read(); 228 KASSERT(freq != 0); 229 230 /* 231 * not quite divide by 1000000 but close enough 232 * (higher by 1.3% which means we wait 1.3% longer). 233 */ 234 const uint64_t incr_per_us = (freq >> 20) + (freq >> 24); 235 236 const uint64_t delta = n * incr_per_us; 237 const uint64_t base = armreg_cntv_ct_read(); 238 const uint64_t finish = base + delta; 239 240 while (armreg_cntv_ct_read() < finish) { 241 /* spin */ 242 } 243 } 244 245 void 246 gtmr_bootdelay(unsigned int ticks) 247 { 248 const uint32_t ctl = armreg_cntv_ctl_read(); 249 armreg_cntv_ctl_write(ctl | ARM_CNTCTL_ENABLE | ARM_CNTCTL_IMASK); 250 251 /* Write Timer/Value to set new compare time */ 252 armreg_cntv_tval_write(ticks); 253 254 /* Spin until compare time is hit */ 255 while ((armreg_cntv_ctl_read() & ARM_CNTCTL_ISTATUS) == 0) { 256 /* spin */ 257 } 258 259 armreg_cntv_ctl_write(ctl); 260 } 261 262 /* 263 * gtmr_intr: 264 * 265 * Handle the hardclock interrupt. 266 */ 267 static int 268 gtmr_intr(void *arg) 269 { 270 const uint64_t now = armreg_cntv_ct_read(); 271 struct cpu_info * const ci = curcpu(); 272 uint64_t delta = now - ci->ci_lastintr; 273 struct clockframe * const cf = arg; 274 struct gtmr_softc * const sc = >mr_sc; 275 276 #ifdef DIAGNOSTIC 277 const uint64_t then = armreg_cntv_cval_read(); 278 struct gtmr_percpu * const pc = percpu_getref(sc->sc_percpu); 279 KASSERTMSG(then <= now, "%"PRId64, now - then); 280 KASSERTMSG(then + pc->pc_delta >= ci->ci_lastintr + sc->sc_autoinc, 281 "%"PRId64, then + pc->pc_delta - ci->ci_lastintr - sc->sc_autoinc); 282 #endif 283 284 #if 0 285 printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", 286 __func__, cf, ci->ci_data.cpu_name, now, delta); 287 #endif 288 KASSERTMSG(delta > sc->sc_autoinc / 100, 289 "%s: interrupting too quickly (delta=%"PRIu64") autoinc=%lu", 290 ci->ci_data.cpu_name, delta, sc->sc_autoinc); 291 292 /* 293 * If we got interrupted too soon (delta < sc->sc_autoinc) or 294 * we missed a tick (delta >= 2 * sc->sc_autoinc), don't try to 295 * adjust for jitter. 296 */ 297 delta -= sc->sc_autoinc; 298 if (delta >= sc->sc_autoinc) { 299 delta = 0; 300 } 301 armreg_cntv_tval_write(sc->sc_autoinc - delta); 302 303 ci->ci_lastintr = now; 304 305 #ifdef DIAGNOSTIC 306 KASSERT(delta == (uint32_t) delta); 307 pc->pc_delta = delta; 308 percpu_putref(sc->sc_percpu); 309 #endif 310 311 hardclock(cf); 312 313 sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc; 314 315 return 1; 316 } 317 318 void 319 setstatclockrate(int newhz) 320 { 321 } 322 323 static u_int 324 gtmr_get_timecount(struct timecounter *tc) 325 { 326 327 return (u_int) (armreg_cntv_ct_read()); 328 } 329