xref: /netbsd-src/sys/arch/arm/broadcom/bcm2835_tmr.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: bcm2835_tmr.c,v 1.9 2017/12/10 21:38:26 skrll Exp $	*/
2 
3 /*-
4  * Copyright (c) 2012 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Nick Hudson
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: bcm2835_tmr.c,v 1.9 2017/12/10 21:38:26 skrll Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38 #include <sys/kernel.h>
39 #include <sys/timetc.h>
40 #include <sys/bus.h>
41 
42 #include <arm/broadcom/bcm2835_intr.h>
43 #include <arm/broadcom/bcm2835reg.h>
44 #include <arm/broadcom/bcm2835var.h>
45 
46 #include <dev/fdt/fdtvar.h>
47 
48 #include <arm/fdt/arm_fdtvar.h>
49 
50 /* Use the 3rd timer*/
51 #define BCMTIMER	3
52 
53 #define	BCM2835_STIMER_CS	0x00
54 #define	 BCM2835_STIMER_M0	 __BIT(0)
55 #define	 BCM2835_STIMER_M1	 __BIT(1)
56 #define	 BCM2835_STIMER_M2	 __BIT(2)
57 #define	 BCM2835_STIMER_M3	 __BIT(3)
58 #define	BCM2835_STIMER_CLO	0x04
59 #define	BCM2835_STIMER_CHI	0x08
60 #define	BCM2835_STIMER_C0	0x0c
61 #define	BCM2835_STIMER_C1	0x10
62 #define	BCM2835_STIMER_C2	0x14
63 #define	BCM2835_STIMER_C3	0x18
64 
65 #define	BCM2835_STIMER_HZ	1000000
66 
67 static const uint32_t counts_per_usec = (BCM2835_STIMER_HZ / 1000000);
68 static uint32_t counts_per_hz = ~0;
69 
70 struct bcm2835tmr_softc {
71 	device_t		sc_dev;
72 
73 	bus_space_tag_t sc_iot;
74 	bus_space_handle_t sc_ioh;
75 
76 	void *sc_ih;
77 };
78 
79 static int bcmtmr_match(device_t, cfdata_t, void *);
80 static void bcmtmr_attach(device_t, device_t, void *);
81 
82 static int clockhandler(void *);
83 
84 static u_int bcm2835tmr_get_timecount(struct timecounter *);
85 void bcm2835_tmr_setstatclockrate(int);
86 
87 static struct bcm2835tmr_softc *bcm2835tmr_sc;
88 
89 static struct timecounter bcm2835tmr_timecounter = {
90 	.tc_get_timecount = bcm2835tmr_get_timecount,
91 	.tc_poll_pps = 0,
92 	.tc_counter_mask = ~0u,
93 	.tc_frequency = BCM2835_STIMER_HZ,
94 	.tc_name = NULL,			/* set by attach */
95 	.tc_quality = 100,
96 	.tc_priv = NULL,
97 	.tc_next = NULL,
98 };
99 
100 CFATTACH_DECL_NEW(bcmtmr_fdt, sizeof(struct bcm2835tmr_softc),
101     bcmtmr_match, bcmtmr_attach, NULL, NULL);
102 
103 /* ARGSUSED */
104 static int
105 bcmtmr_match(device_t parent, cfdata_t match, void *aux)
106 {
107 	const char * const compatible[] = {
108 	    "brcm,bcm2835-system-timer",
109 	    NULL
110 	};
111 	struct fdt_attach_args * const faa = aux;
112 	return of_match_compatible(faa->faa_phandle, compatible);
113 }
114 
115 static void
116 bcmtmr_attach(device_t parent, device_t self, void *aux)
117 {
118 	struct bcm2835tmr_softc *sc = device_private(self);
119 	struct fdt_attach_args * const faa = aux;
120 
121 	aprint_naive("\n");
122 	aprint_normal(": VC System Timer\n");
123 
124 	if (bcm2835tmr_sc == NULL)
125 		bcm2835tmr_sc = sc;
126 
127 	sc->sc_dev = self;
128 	sc->sc_iot = faa->faa_bst;
129 	const int phandle = faa->faa_phandle;
130 
131 	bus_addr_t addr;
132 	bus_size_t size;
133 
134 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
135 		aprint_error(": missing 'reg' property\n");
136 		return;
137 	}
138 
139 	if (bus_space_map(sc->sc_iot, addr, size, 0, &sc->sc_ioh) != 0) {
140 		aprint_error_dev(sc->sc_dev, "unable to map device\n");
141 		return;
142 	}
143 
144 	char intrstr[128];
145 	if (!fdtbus_intr_str(phandle, BCMTIMER, intrstr, sizeof(intrstr))) {
146 		aprint_error(": failed to decode interrupt\n");
147 		return;
148 	}
149 
150 	sc->sc_ih = fdtbus_intr_establish(phandle, BCMTIMER, IPL_CLOCK,
151 	    FDT_INTR_MPSAFE, clockhandler, NULL);
152 	if (sc->sc_ih == NULL) {
153 		aprint_error(": failed to establish interrupt on %s\n",
154 		    intrstr);
155 		return;
156 	}
157 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
158 
159 	bcm2835tmr_timecounter.tc_name = device_xname(self);
160 }
161 
162 void
163 cpu_initclocks(void)
164 {
165 	struct bcm2835tmr_softc *sc = bcm2835tmr_sc;
166 	uint32_t stcl;
167 
168 	KASSERT(sc != NULL);
169 
170 	bcm2835tmr_timecounter.tc_priv = sc;
171 
172 	counts_per_hz = BCM2835_STIMER_HZ / hz;
173 
174 	stcl = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
175 	stcl += counts_per_hz;
176 
177 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_C3, stcl);
178 
179 	tc_init(&bcm2835tmr_timecounter);
180 }
181 
182 void
183 bcm2835_tmr_delay(unsigned int n)
184 {
185 	struct bcm2835tmr_softc *sc = bcm2835tmr_sc;
186 	uint32_t last, curr;
187 	uint32_t delta, usecs;
188 
189 	KASSERT(sc != NULL);
190 
191 	last = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
192 
193 	delta = usecs = 0;
194 	while (n > usecs) {
195 		curr = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
196 		    BCM2835_STIMER_CLO);
197 
198 		/* Check to see if the timer has wrapped around. */
199 		if (curr < last)
200 			delta += curr + (UINT32_MAX - last);
201 		else
202 			delta += curr - last;
203 
204 		last = curr;
205 
206 		if (delta >= counts_per_usec) {
207 			usecs += delta / counts_per_usec;
208 			delta %= counts_per_usec;
209 		}
210 	}
211 
212 }
213 
214 /*
215  * clockhandler:
216  *
217  *	Handle the hardclock interrupt.
218  */
219 static int
220 clockhandler(void *arg)
221 {
222 	struct bcm2835tmr_softc *sc = bcm2835tmr_sc;
223 	struct clockframe *frame = arg;
224 	uint32_t curr, status;
225 
226 	status = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
227 	    BCM2835_STIMER_CS);
228 
229 	if (!(status & BCM2835_STIMER_M3))
230 		return 0;
231 
232 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CS,
233 	    BCM2835_STIMER_M3);
234 
235 	hardclock(frame);
236 
237 	curr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
238 
239 	curr += counts_per_hz;
240 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_C3, curr);
241 
242 	return 1;
243 }
244 
245 void
246 setstatclockrate(int newhz)
247 {
248 }
249 
250 static u_int
251 bcm2835tmr_get_timecount(struct timecounter *tc)
252 {
253 	struct bcm2835tmr_softc *sc = tc->tc_priv;
254 
255 	return bus_space_read_4(sc->sc_iot, sc->sc_ioh, BCM2835_STIMER_CLO);
256 }
257 
258