1 /* $NetBSD: bcm2835_pwm.c,v 1.3 2017/12/10 21:38:26 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Michael van Elst 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for BCM2835 Pulse Width Modulator 34 * 35 * Each channel can be allocated and used individually, but 36 * for FIFO usage, both channels must to be requested. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: bcm2835_pwm.c,v 1.3 2017/12/10 21:38:26 skrll Exp $"); 41 42 #include "bcmdmac.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/device.h> 47 #include <sys/kernel.h> 48 #include <sys/bus.h> 49 #include <sys/atomic.h> 50 #include <sys/intr.h> 51 52 #include <arm/broadcom/bcm2835reg.h> 53 54 #include <arm/broadcom/bcm2835_pwm.h> 55 56 #include <dev/fdt/fdtvar.h> 57 58 struct bcm_pwm_channel { 59 struct bcm2835pwm_softc *sc; 60 uint32_t ctlmask, stamask, gapomask; 61 int rng, dat; 62 bool inuse; 63 uint32_t ctlsave, rngsave, datsave; 64 }; 65 66 struct bcm2835pwm_softc { 67 device_t sc_dev; 68 69 bus_space_tag_t sc_iot; 70 bus_space_handle_t sc_ioh; 71 bus_addr_t sc_iob; 72 73 struct clk *sc_clk; 74 int sc_clockrate; 75 struct bcm_pwm_channel sc_channels[2]; 76 kmutex_t sc_lock; 77 }; 78 79 #define PWM_WRITE(sc, reg, val) \ 80 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) 81 #define PWM_READ(sc, reg) \ 82 bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)) 83 84 static int bcmpwm_match(device_t, cfdata_t, void *); 85 static void bcmpwm_attach(device_t, device_t, void *); 86 static int bcmpwm_wait(struct bcm2835pwm_softc *); 87 88 CFATTACH_DECL_NEW(bcmpwm, sizeof(struct bcm2835pwm_softc), 89 bcmpwm_match, bcmpwm_attach, NULL, NULL); 90 91 /* ARGSUSED */ 92 static int 93 bcmpwm_match(device_t parent, cfdata_t match, void *aux) 94 { 95 const char * const compatible[] = { "brcm,bcm2835-pwm", NULL }; 96 struct fdt_attach_args * const faa = aux; 97 98 return of_match_compatible(faa->faa_phandle, compatible); 99 } 100 101 static void 102 bcmpwm_attach(device_t parent, device_t self, void *aux) 103 { 104 struct bcm2835pwm_softc *sc = device_private(self); 105 struct fdt_attach_args * const faa = aux; 106 const int phandle = faa->faa_phandle; 107 bus_size_t size; 108 109 sc->sc_dev = self; 110 sc->sc_iot = faa->faa_bst; 111 112 int error = fdtbus_get_reg(phandle, 0, &sc->sc_iob, &size); 113 if (error) { 114 aprint_error(": failed to get registers\n"); 115 return; 116 } 117 118 if (bus_space_map(sc->sc_iot, sc->sc_iob, size, 0, 119 &sc->sc_ioh)) { 120 aprint_error_dev(sc->sc_dev, "unable to map device\n"); 121 return; 122 } 123 124 sc->sc_clk = fdtbus_clock_get_index(phandle, 0); 125 if (sc->sc_clk == NULL) { 126 aprint_error(": couldn't get clk\n"); 127 return; 128 } 129 130 error = clk_enable(sc->sc_clk); 131 if (error != 0) { 132 aprint_error(": couldn't enable clk\n"); 133 return; 134 } 135 136 aprint_naive("\n"); 137 aprint_normal(": Pulse Width Modulator\n"); 138 139 sc->sc_clockrate = clk_get_rate(sc->sc_clk); 140 141 sc->sc_channels[0].sc = sc; 142 sc->sc_channels[0].ctlmask = PWM_CTL_MSEN1 | PWM_CTL_USEF1 | 143 PWM_CTL_POLA1 | PWM_CTL_SBIT1 | 144 PWM_CTL_RPTL1 | PWM_CTL_MODE1 | 145 PWM_CTL_PWEN1; 146 sc->sc_channels[0].stamask = PWM_STA_STA1; 147 sc->sc_channels[0].gapomask = PWM_STA_GAPO1; 148 sc->sc_channels[0].rng = PWM_RNG1; 149 sc->sc_channels[0].dat = PWM_DAT1; 150 151 sc->sc_channels[1].sc = sc; 152 sc->sc_channels[1].ctlmask = PWM_CTL_MSEN2 | PWM_CTL_USEF2 | 153 PWM_CTL_POLA2 | PWM_CTL_SBIT2 | 154 PWM_CTL_RPTL2 | PWM_CTL_MODE2 | 155 PWM_CTL_PWEN2; 156 sc->sc_channels[1].stamask = PWM_STA_STA2; 157 sc->sc_channels[1].gapomask = PWM_STA_GAPO2; 158 sc->sc_channels[1].rng = PWM_RNG2; 159 sc->sc_channels[1].dat = PWM_DAT2; 160 161 /* The PWM hardware can be used by vcaudio if the 162 * analog output is selected 163 */ 164 sc->sc_channels[0].inuse = false; 165 sc->sc_channels[1].inuse = false; 166 167 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 168 169 /* Success! */ 170 171 return; 172 } 173 174 struct bcm_pwm_channel * 175 bcm_pwm_alloc(int num) 176 { 177 struct bcm2835pwm_softc *sc; 178 device_t dev; 179 struct bcm_pwm_channel *pwm; 180 181 dev = device_find_by_driver_unit("bcmpwm", 0); 182 if (dev == NULL) 183 return NULL; 184 sc = device_private(dev); 185 186 if (num < 0 || num >= __arraycount(sc->sc_channels)) 187 return NULL; 188 189 pwm = &sc->sc_channels[num]; 190 191 mutex_enter(&sc->sc_lock); 192 if (pwm->inuse) 193 pwm = NULL; 194 else 195 pwm->inuse = true; 196 mutex_exit(&sc->sc_lock); 197 198 if (pwm) { 199 pwm->datsave = PWM_READ(pwm->sc, pwm->dat); 200 pwm->ctlsave = PWM_READ(pwm->sc, PWM_CTL); 201 pwm->rngsave = PWM_READ(pwm->sc, pwm->rng); 202 } 203 204 return pwm; 205 } 206 207 void 208 bcm_pwm_free(struct bcm_pwm_channel *pwm) 209 { 210 struct bcm2835pwm_softc *sc = pwm->sc; 211 212 KASSERT(pwm->inuse); 213 214 PWM_WRITE(pwm->sc, pwm->rng, pwm->rngsave); 215 PWM_WRITE(pwm->sc, PWM_CTL, pwm->ctlsave & ~PWM_CTL_WRITEZERO); 216 PWM_WRITE(pwm->sc, pwm->dat, pwm->datsave); 217 218 mutex_enter(&sc->sc_lock); 219 pwm->inuse = false; 220 mutex_exit(&sc->sc_lock); 221 } 222 223 void 224 bcm_pwm_control(struct bcm_pwm_channel *pwm, uint32_t ctl, uint32_t rng) 225 { 226 struct bcm2835pwm_softc *sc = pwm->sc; 227 uint32_t w; 228 229 KASSERT(pwm->inuse); 230 231 /* set control bits like for channel 0 232 * there are generic bit definitions that the caller can use. 233 */ 234 w = PWM_READ(pwm->sc, PWM_CTL); 235 ctl = (w & ~pwm->ctlmask) | __SHIFTIN(ctl, pwm->ctlmask); 236 237 /* when FIFO usage gets enabled but wasn't clear the FIFO */ 238 if ((w & (PWM_CTL_USEF1|PWM_CTL_USEF2)) == 0 && 239 (ctl & (PWM_CTL_USEF1|PWM_CTL_USEF2)) != 0) 240 ctl |= PWM_CTL_CLRF1; 241 242 PWM_WRITE(sc, pwm->rng, rng); 243 PWM_WRITE(sc, PWM_CTL, ctl & ~PWM_CTL_WRITEZERO); 244 } 245 246 uint32_t 247 bcm_pwm_status(struct bcm_pwm_channel *pwm) 248 { 249 uint32_t w; 250 uint32_t common = PWM_STA_BERR | PWM_STA_RERR1 | 251 PWM_STA_WERR1 | PWM_STA_EMPT1 | PWM_STA_FULL1; 252 253 /* return status bits like for channel 0 254 * there are generic bit definitions that the caller can use. 255 * 256 * The BERR bit is returned for both channels. 257 */ 258 w = PWM_READ(pwm->sc, PWM_STA); 259 PWM_WRITE(pwm->sc, PWM_STA, w & 260 (pwm->stamask | pwm->gapomask | common)); 261 262 w = __SHIFTIN(__SHIFTOUT(w, pwm->stamask), PWM_STA_STA) 263 | __SHIFTIN(__SHIFTOUT(w, pwm->gapomask), PWM_STA_GAPO) 264 | (w & common); 265 266 return w; 267 } 268 269 static int 270 bcmpwm_wait(struct bcm2835pwm_softc *sc) 271 { 272 int i; 273 uint32_t s; 274 275 for (i=0; i<1000; ++i) { 276 s = PWM_READ(sc, PWM_STA); 277 if ((s & PWM_STA_FULL1) == 0) 278 break; 279 delay(1); 280 } 281 if (i >= 1000) 282 return -1; 283 284 return 0; 285 } 286 287 int 288 bcm_pwm_write(struct bcm_pwm_channel *pwm, uint32_t *data1, uint32_t *data2, 289 int len) 290 { 291 struct bcm2835pwm_softc *sc = pwm->sc; 292 int n; 293 uint32_t r; 294 bool even = false; 295 296 KASSERT(pwm->inuse); 297 298 n = len; 299 while (n > 0) { 300 if (bcmpwm_wait(sc)) 301 break; 302 r = even ? *data2++ : *data1++; 303 PWM_WRITE(sc, PWM_FIFO, r); 304 if (data2 != NULL) 305 even = !even; 306 --n; 307 } 308 309 return len - n; 310 } 311 312 void 313 bcm_pwm_set(struct bcm_pwm_channel *pwm, uint32_t w) 314 { 315 struct bcm2835pwm_softc *sc = pwm->sc; 316 317 PWM_WRITE(sc, pwm->dat, w); 318 } 319 320 int 321 bcm_pwm_flush(struct bcm_pwm_channel *pwm) 322 { 323 struct bcm2835pwm_softc *sc = pwm->sc; 324 325 return bcmpwm_wait(sc) ? EIO : 0; 326 } 327 328 void 329 bcm_pwm_dma_enable(struct bcm_pwm_channel *pwm, bool enable) 330 { 331 struct bcm2835pwm_softc *sc = pwm->sc; 332 uint32_t w; 333 334 #if 0 335 w = PWM_READ(sc, PWM_DMAC); 336 if (enable) 337 w |= PWM_DMAC_ENAB; 338 else 339 w &= ~PWM_DMAC_ENAB; 340 #else 341 w = (enable ? PWM_DMAC_ENAB : 0) 342 | __SHIFTIN(7, PWM_DMAC_PANIC) 343 | __SHIFTIN(7, PWM_DMAC_DREQ); 344 #endif 345 PWM_WRITE(sc, PWM_DMAC, w & ~PWM_DMAC_WRITEZERO); 346 } 347 348 uint32_t 349 bcm_pwm_dma_address(struct bcm_pwm_channel *pwm) 350 { 351 struct bcm2835pwm_softc *sc = pwm->sc; 352 353 return sc->sc_iob + PWM_FIFO; 354 } 355 356