1 /*$NetBSD: at91tctmr.c,v 1.2 2008/07/03 01:15:38 matt Exp $*/ 2 3 /* 4 * AT91 Timer Counter (TC) based clock functions 5 * Copyright (c) 2007, Embedtronics Oy 6 * All rights reserved. 7 * 8 * Based on vx115_clk.c, 9 * Copyright (c) 2006, Jon Sevy <jsevy@cs.drexel.edu> 10 * 11 * Based on epclk.c 12 * Copyright (c) 2004 Jesse Off 13 * All rights reserved. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 *This product includes software developed by the NetBSD 26 *Foundation, Inc. and its contributors. 27 * 4. Neither the name of The NetBSD Foundation nor the names of its 28 * contributors may be used to endorse or promote products derived 29 * from this software without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 32 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 33 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 34 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 35 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 38 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 39 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGE. 42 */ 43 44 /* 45 * Driver for the AT91RM9200 clock tick. 46 * We use Timer 1 for the system clock 47 */ 48 49 #include <sys/cdefs.h> 50 __KERNEL_RCSID(0, "$NetBSD: at91tctmr.c,v 1.2 2008/07/03 01:15:38 matt Exp $"); 51 52 #include <sys/types.h> 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/kernel.h> 56 #include <sys/time.h> 57 #include <sys/timetc.h> 58 #include <sys/device.h> 59 60 #include <dev/clock_subr.h> 61 62 #include <machine/bus.h> 63 #include <machine/intr.h> 64 65 #include <arm/cpufunc.h> 66 #include <arm/at91/at91reg.h> 67 #include <arm/at91/at91var.h> 68 #include <arm/at91/at91tcreg.h> 69 70 #include <opt_hz.h> /* for HZ */ 71 72 73 #define DEBUG_CLK 74 #ifdef DEBUG_CLK 75 #define DPRINTF(fmt...) printf(fmt) 76 #else 77 #define DPRINTF(fmt...) 78 #endif 79 80 81 static int at91tctmr_match(device_t, cfdata_t, void *); 82 static void at91tctmr_attach(device_t, device_t, void *); 83 84 void rtcinit(void); 85 86 /* callback functions for intr_functions */ 87 static int at91tctmr_intr(void* arg); 88 89 struct at91tctmr_softc { 90 device_t sc_dev; 91 u_char *sc_addr; 92 int sc_pid; 93 int sc_initialized; 94 uint32_t sc_timerclock; 95 uint32_t sc_divider; 96 uint32_t sc_usec_per_tick; 97 }; 98 99 static struct at91tctmr_softc *at91tctmr_sc = NULL; 100 static struct timeval lasttv; 101 102 103 104 /* Match value for clock timer; running at master clock, want HZ ticks per second */ 105 /* NOTE: don't change there without visiting the functions below which */ 106 /* convert between timer counts and microseconds */ 107 108 static inline uint32_t 109 at91tctmr_count_to_usec(struct at91tctmr_softc *sc, uint32_t count) 110 { 111 uint64_t tmp; 112 113 tmp = count; 114 tmp *= 1000000U; 115 116 return (tmp / sc->sc_timerclock); 117 } 118 119 #if 0 120 /* This may only be called when overflow is avoided; typically, */ 121 /* it will be used when usec < USEC_PER_TICK */ 122 static uint32_t 123 usec_to_timer_count(uint32_t usec) 124 { 125 uint32_t result; 126 127 /* convert specified number of usec to timer ticks, and round up */ 128 result = (AT91_SCLK * usec) / 1000000; 129 130 if ((result * 1000000) != (usec * AT91_SCLK)) 131 { 132 /* round up */ 133 result += 1; 134 } 135 136 return result; 137 138 } 139 #endif 140 141 /* macros to simplify writing to the timer controller */ 142 static inline u_int32_t 143 READ_TC(struct at91tctmr_softc *sc, uint offset) 144 { 145 volatile u_int32_t *addr = (void*)(sc->sc_addr + offset); 146 return *addr; 147 } 148 149 //bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset) 150 static inline void 151 WRITE_TC(struct at91tctmr_softc *sc, uint offset, u_int32_t value) 152 { 153 volatile u_int32_t *addr = (void*)(sc->sc_addr + offset); 154 *addr = value; 155 } 156 157 158 CFATTACH_DECL_NEW(at91tctmr, sizeof(struct at91tctmr_softc), 159 at91tctmr_match, at91tctmr_attach, NULL, NULL); 160 161 static u_int at91tctmr_get_timecount(struct timecounter *); 162 163 static struct timecounter at91tctmr_timecounter = { 164 at91tctmr_get_timecount,/* get_timecount */ 165 0, /* no poll_pps */ 166 0xffffffff, /* counter_mask */ 167 COUNTS_PER_SEC, /* frequency */ 168 "at91tctmr", /* name */ 169 100, /* quality */ 170 NULL, /* prev */ 171 NULL, /* next */ 172 }; 173 174 static int 175 at91tctmr_match(device_t parent, cfdata_t match, void *aux) 176 { 177 if (strcmp(match->cf_name, "at91tctmr") == 0) 178 return 2; 179 return 0; 180 } 181 182 static void 183 at91tctmr_attach(device_t parent, device_t self, void *aux) 184 { 185 struct at91tctmr_softc *sc = device_private(self); 186 struct at91bus_attach_args *sa = aux; 187 188 aprint_normal("\n"); 189 190 sc->sc_dev = self; 191 sc->sc_addr = (void*)sa->sa_addr; 192 sc->sc_pid = sa->sa_pid; 193 194 if (at91tctmr_sc == NULL) 195 at91tctmr_sc = sc; 196 197 at91_peripheral_clock(sc->sc_pid, 1); 198 199 WRITE_TC(sc, TC_CCR, TC_CCR_CLKDIS); 200 WRITE_TC(sc, TC_IDR, -1); /* make sure interrupts are disabled */ 201 202 /* find divider */ 203 u_int32_t cmr = 0; 204 if (AT91_MSTCLK / 2U / HZ <= 65536) { 205 sc->sc_timerclock = AT91_MSTCLK / 2U; 206 cmr = TC_CMR_TCCLKS_MCK_DIV_2; 207 } else if (AT91_MSTCLK / 8U / HZ <= 65536) { 208 sc->sc_timerclock = AT91_MSTCLK / 8U; 209 cmr = TC_CMR_TCCLKS_MCK_DIV_8; 210 } else if (AT91_MSTCLK / 32U / HZ <= 65536) { 211 sc->sc_timerclock = AT91_MSTCLK / 32U; 212 cmr = TC_CMR_TCCLKS_MCK_DIV_32; 213 } else if (AT91_MSTCLK / 128U / HZ <= 65536) { 214 sc->sc_timerclock = AT91_MSTCLK / 128U; 215 cmr = TC_CMR_TCCLKS_MCK_DIV_128; 216 } else 217 panic("%s: cannot setup timer to reach HZ", device-xname(sc->sc_dev)); 218 219 sc->sc_divider = (sc->sc_timerclock + HZ - 1) / HZ; /* round up */ 220 sc->sc_usec_per_tick = 1000000UL / (sc->sc_timerclock / sc->sc_divider); 221 222 WRITE_TC(sc, TC_CMR, TC_CMR_WAVE | cmr | TC_CMR_WAVSEL_UP_RC); 223 WRITE_TC(sc, TC_CCR, TC_CCR_CLKEN); 224 WRITE_TC(sc, TC_RC, sc->sc_divider - 1); 225 WRITE_TC(sc, TC_CCR, TC_CCR_SWTRG); 226 227 sc->sc_initialized = 1; 228 229 DPRINTF("%s: done, tclock=%"PRIu32" div=%"PRIu32" uspertick=%"PRIu32"\n", __FUNCTION__, sc->sc_timerclock, sc->sc_divider, sc->sc_usec_per_tick); 230 231 } 232 233 /* 234 * at91tctmr_intr: 235 * 236 *Handle the hardclock interrupt. 237 */ 238 static int 239 at91tctmr_intr(void *arg) 240 { 241 struct at91tctmr_softc *sc = arg; 242 243 /* make sure it's the kernel timer that generated the interrupt */ 244 /* need to do this since the interrupt line is shared by the */ 245 /* other interval and PWM timers */ 246 if (READ_TC(sc, TC_SR) & TC_SR_CPCS) { 247 /* call the kernel timer handler */ 248 hardclock((struct clockframe*) arg); 249 return 1; 250 } else { 251 /* it's one of the other timers; just pass it on */ 252 return 0; 253 } 254 } 255 256 /* 257 * setstatclockrate: 258 * 259 *Set the rate of the statistics clock. 260 * 261 *We assume that hz is either stathz or profhz, and that neither 262 *will change after being set by cpu_initclocks(). We could 263 *recalculate the intervals here, but that would be a pain. 264 */ 265 void 266 setstatclockrate(int hzz) 267 { 268 /* use hardclock */ 269 (void)hzz; 270 } 271 272 /* 273 * cpu_initclocks: 274 * 275 *Initialize the clock and get it going. 276 */ 277 static void udelay(unsigned int usec); 278 279 void 280 cpu_initclocks(void) 281 { 282 struct at91tctmr_softc *sc = at91tctmr_sc; 283 284 if (!sc || !sc->sc_initialized) 285 panic("%s: driver has not been initialized! (sc=%p)", __FUNCTION__, sc); 286 287 hz = sc->sc_timerclock / sc->sc_divider; 288 stathz = profhz = 0; 289 290 /* set up and enable interval timer 1 as kernel timer, */ 291 /* using 32kHz clock source */ 292 293 /* register interrupt handler */ 294 at91_intr_establish(sc->sc_pid, IPL_CLOCK, INTR_HIGH_LEVEL, at91tctmr_intr, sc); 295 296 /* enable interrupts from timer */ 297 WRITE_TC(sc, TC_IER, TC_SR_CPCS); 298 } 299 300 301 302 303 static void udelay(unsigned int usec) 304 { 305 struct at91tctmr_softc *sc = at91tctmr_sc; 306 u_int32_t prev_cvr, cvr, divi = READ_TC(sc, TC_RC), diff; 307 int prev_ticks, ticks, ticks2; 308 unsigned footick = (sc->sc_timerclock * 64ULL / 1000000UL); 309 310 if (usec > 0) { 311 prev_ticks = hardclock_ticks; 312 __insn_barrier(); 313 prev_cvr = READ_TC(sc, TC_CV); 314 ticks = hardclock_ticks; 315 __insn_barrier(); 316 if (ticks != prev_ticks) { 317 prev_cvr = READ_TC(sc, TC_CV); 318 prev_ticks = ticks; 319 } 320 for (;;) { 321 ticks = hardclock_ticks; 322 __insn_barrier(); 323 cvr = READ_TC(sc, TC_CV); 324 ticks2 = hardclock_ticks; 325 __insn_barrier(); 326 if (ticks2 != ticks) { 327 cvr = READ_TC(sc, TC_CV); 328 } 329 diff = (ticks2 - prev_ticks) * divi; 330 if (cvr < prev_cvr) { 331 if (!diff) 332 diff = divi; 333 diff -= prev_cvr - cvr; 334 } else 335 diff += cvr - prev_cvr; 336 diff = diff * 64 / footick; 337 if (diff) { 338 if (usec <= diff) 339 break; 340 prev_ticks = ticks2; 341 prev_cvr = (prev_cvr + footick * diff / 64) % divi; 342 usec -= diff; 343 } 344 } 345 } 346 } 347 348 349 350 /* 351 * delay: 352 * 353 *Delay for at least N microseconds. Note that due to our coarse clock, 354 * our resolution is 61 us. But we round up so we'll wait at least as 355 * long as requested. 356 */ 357 void 358 delay(unsigned int usec) 359 { 360 struct at91tctmr_softc *sc = at91tctmr_sc; 361 362 #ifdef DEBUG 363 if (sc == NULL) { 364 printf("delay: called before start at91tc\n"); 365 return; 366 } 367 #endif 368 369 if (usec >= sc->sc_usec_per_tick) { 370 /* have more than 1 tick; just do in ticks */ 371 unsigned int ticks = (usec + sc->sc_usec_per_tick - 1) / sc->sc_usec_per_tick; 372 while (ticks-- > 0) { 373 udelay(sc->sc_usec_per_tick); 374 } 375 } else { 376 /* less than 1 tick; can do as usec */ 377 udelay(usec); 378 } 379 380 } 381 382