1 /*$NetBSD: at91st.c,v 1.7 2020/07/03 16:23:02 maxv Exp $*/ 2 3 /* 4 * AT91RM9200 clock functions 5 * Copyright (c) 2007, Embedtronics Oy 6 * All rights reserved. 7 * 8 * Based on vx115_clk.c, 9 * Copyright (c) 2006, Jon Sevy <jsevy@cs.drexel.edu> 10 * 11 * Based on epclk.c 12 * Copyright (c) 2004 Jesse Off 13 * All rights reserved. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 /* 38 * Driver for the AT91RM9200 clock tick. 39 * We use Timer 1 for the system clock 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: at91st.c,v 1.7 2020/07/03 16:23:02 maxv Exp $"); 44 45 #include <sys/types.h> 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/time.h> 50 #include <sys/device.h> 51 52 #include <dev/clock_subr.h> 53 54 #include <sys/bus.h> 55 #include <machine/intr.h> 56 57 #include <arm/cpufunc.h> 58 #include <arm/at91/at91reg.h> 59 #include <arm/at91/at91var.h> 60 #include <arm/at91/at91streg.h> 61 62 #include <opt_hz.h> /* for HZ */ 63 64 65 //#define DEBUG_CLK 66 #ifdef DEBUG_CLK 67 #define DPRINTF(fmt...) printf(fmt) 68 #else 69 #define DPRINTF(fmt...) 70 #endif 71 72 73 static int at91st_match(device_t, cfdata_t, void *); 74 static void at91st_attach(device_t, device_t, void *); 75 76 void rtcinit(void); 77 78 /* callback functions for intr_functions */ 79 static int at91st_intr(void* arg); 80 81 struct at91st_softc { 82 bus_space_tag_t sc_iot; 83 bus_space_handle_t sc_ioh; 84 int sc_pid; 85 int sc_initialized; 86 }; 87 88 static struct at91st_softc *at91st_sc = NULL; 89 static struct timeval lasttv; 90 91 92 93 /* Match value for clock timer; running at 32.768kHz, want HZ ticks per second */ 94 /* BTW, we use HZ == 64 or HZ == 128 so have a nice divisor */ 95 /* NOTE: don't change there without visiting the functions below which */ 96 /* convert between timer counts and microseconds */ 97 #define AT91ST_DIVIDER (AT91_SCLK / HZ) 98 #define USEC_PER_TICK (1000000 / (AT91_SCLK / AT91ST_DIVIDER)) 99 100 #if 0 101 static uint32_t at91st_count_to_usec(uint32_t count) 102 { 103 uint32_t result; 104 105 /* convert specified number of ticks to usec, and round up */ 106 /* note that with 16 kHz tick rate, maximum count will be */ 107 /* 256 (for HZ = 64), so we won't have overflow issues */ 108 result = (1000000 * count) / AT91_SCLK; 109 110 if ((result * AT91_SCLK) != (count * 1000000)) 111 { 112 /* round up */ 113 result += 1; 114 } 115 116 return result; 117 } 118 119 /* This may only be called when overflow is avoided; typically, */ 120 /* it will be used when usec < USEC_PER_TICK */ 121 static uint32_t usec_to_timer_count(uint32_t usec) 122 { 123 uint32_t result; 124 125 /* convert specified number of usec to timer ticks, and round up */ 126 result = (AT91_SCLK * usec) / 1000000; 127 128 if ((result * 1000000) != (usec * AT91_SCLK)) 129 { 130 /* round up */ 131 result += 1; 132 } 133 134 return result; 135 136 } 137 #endif 138 139 /* macros to simplify writing to the timer controller */ 140 #define READ_ST(offset) STREG(offset) 141 //bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset) 142 #define WRITE_ST(offset, value) do { \ 143 STREG(offset) = (value); \ 144 } while (/*CONSTCOND*/0) 145 //bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, value) 146 147 148 149 CFATTACH_DECL_NEW(at91st, sizeof(struct at91st_softc), at91st_match, at91st_attach, NULL, NULL); 150 151 152 153 static int 154 at91st_match(device_t parent, cfdata_t match, void *aux) 155 { 156 if (strcmp(match->cf_name, "at91st") == 0) 157 return 2; 158 return 0; 159 } 160 161 static void 162 at91st_attach(device_t parent, device_t self, void *aux) 163 { 164 struct at91st_softc *sc = device_private(self); 165 struct at91bus_attach_args *sa = aux; 166 167 printf("\n"); 168 169 sc->sc_iot = sa->sa_iot; 170 sc->sc_pid = sa->sa_pid; 171 172 #if 0 173 DPRINTF("-> bus_space_map()\n"); 174 175 /* map bus space and get handle */ 176 if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0, &sc->sc_ioh) != 0) 177 panic("%s: Cannot map registers", device_xname(self)); 178 #endif 179 180 if (at91st_sc == NULL) 181 at91st_sc = sc; 182 183 at91_peripheral_clock(sc->sc_pid, 1); 184 185 WRITE_ST(ST_IDR, -1); /* make sure interrupts are disabled */ 186 187 /* set up and enable interval timer 1 as kernel timer, */ 188 /* using 32kHz clock source */ 189 WRITE_ST(ST_PIMR, AT91ST_DIVIDER); 190 WRITE_ST(ST_RTMR, 1); 191 192 sc->sc_initialized = 1; 193 194 DPRINTF("%s: done\n", __FUNCTION__); 195 196 } 197 198 /* 199 * at91st_intr: 200 * 201 *Handle the hardclock interrupt. 202 */ 203 static int 204 at91st_intr(void *arg) 205 { 206 // struct at91st_softc *sc = at91st_sc; 207 208 /* make sure it's the kernel timer that generated the interrupt */ 209 /* need to do this since the interrupt line is shared by the */ 210 /* other interval and PWM timers */ 211 if (READ_ST(ST_SR) & ST_SR_PITS) 212 { 213 /* call the kernel timer handler */ 214 hardclock((struct clockframe*) arg); 215 #if 0 216 if (getticks() % (HZ * 10) == 0) 217 printf("time %i sec\n", getticks()/HZ); 218 #endif 219 return 1; 220 } 221 else 222 { 223 /* it's one of the other timers; just pass it on */ 224 return 0; 225 } 226 227 } 228 229 /* 230 * setstatclockrate: 231 * 232 *Set the rate of the statistics clock. 233 * 234 *We assume that hz is either stathz or profhz, and that neither 235 *will change after being set by cpu_initclocks(). We could 236 *recalculate the intervals here, but that would be a pain. 237 */ 238 void 239 setstatclockrate(int hzz) 240 { 241 /* use hardclock */ 242 (void)hzz; 243 } 244 245 /* 246 * cpu_initclocks: 247 * 248 *Initialize the clock and get it going. 249 */ 250 static void udelay(unsigned int usec); 251 252 void 253 cpu_initclocks(void) 254 { 255 struct at91st_softc *sc = at91st_sc; 256 257 if (!sc || !sc->sc_initialized) 258 panic("%s: driver has not been initialized! (sc=%p)", __FUNCTION__, sc); 259 260 stathz = profhz = 0; 261 262 /* set up and enable interval timer 1 as kernel timer, */ 263 /* using 32kHz clock source */ 264 WRITE_ST(ST_PIMR, AT91ST_DIVIDER); 265 266 /* register interrupt handler */ 267 at91_intr_establish(sc->sc_pid, IPL_CLOCK, INTR_HIGH_LEVEL, at91st_intr, NULL); 268 269 /* enable interrupts from timer */ 270 WRITE_ST(ST_IER, ST_SR_PITS); 271 } 272 273 274 275 276 /* 277 * microtime: 278 * 279 *Fill in the specified timeval struct with the current time 280 *accurate to the microsecond. 281 */ 282 void 283 microtime(register struct timeval *tvp) 284 { 285 // struct at91st_softc *sc = at91st_sc; 286 u_int oldirqstate; 287 u_int current_count; 288 289 #ifdef DEBUG 290 if (at91st_sc == NULL) { 291 printf("microtime: called before initialize at91st\n"); 292 tvp->tv_sec = 0; 293 tvp->tv_usec = 0; 294 return; 295 } 296 #endif 297 298 oldirqstate = disable_interrupts(I32_bit); 299 300 /* get current timer count */ 301 current_count = READ_ST(ST_CRTR); 302 303 /* Fill in the timeval struct. */ 304 *tvp = time; 305 306 #if 0 307 /* Refine the usec field using current timer count */ 308 tvp->tv_usec += at91st_count_to_usec(AT91ST_DIVIDER - current_count); 309 310 /* Make sure microseconds doesn't overflow. */ 311 while (__predict_false(tvp->tv_usec >= 1000000)) 312 { 313 tvp->tv_usec -= 1000000; 314 tvp->tv_sec++; 315 } 316 #endif 317 318 /* Make sure the time has advanced. */ 319 if (__predict_false(tvp->tv_sec == lasttv.tv_sec && tvp->tv_usec <= lasttv.tv_usec)) 320 { 321 tvp->tv_usec = lasttv.tv_usec + 1; 322 if (tvp->tv_usec >= 1000000) 323 { 324 tvp->tv_usec -= 1000000; 325 tvp->tv_sec++; 326 } 327 } 328 329 lasttv = *tvp; 330 331 restore_interrupts(oldirqstate); 332 } 333 334 335 #if 0 336 static void tdelay(unsigned int ticks) 337 { 338 uint32_t start, end, current; 339 340 current = getticks(); 341 start = current; 342 end = start + ticks; 343 344 /* just loop for the specified number of ticks */ 345 while (current < end) 346 current = getticks(); 347 } 348 #endif 349 350 static void udelay(unsigned int usec) 351 { 352 // struct at91st_softc *sc = at91st_sc; 353 uint32_t crtv, t, diff; 354 355 usec = (usec * 1000 + AT91_SCLK - 1) / AT91_SCLK + 1; 356 357 for (crtv = READ_ST(ST_CRTR);;) { 358 while (crtv == (t = READ_ST(ST_CRTR))) ; 359 diff = (t - crtv) & ST_CRTR_CRTV; 360 if (diff >= usec) { 361 break; 362 } 363 crtv = t; 364 usec -= diff; 365 } 366 } 367 368 369 370 /* 371 * delay: 372 * 373 *Delay for at least N microseconds. Note that due to our coarse clock, 374 * our resolution is 61 us. But we round up so we'll wait at least as 375 * long as requested. 376 */ 377 void 378 delay(unsigned int usec) 379 { 380 381 #ifdef DEBUG 382 if (at91st_sc == NULL) { 383 printf("delay: called before start at91st\n"); 384 return; 385 } 386 #endif 387 388 if (usec >= USEC_PER_TICK) 389 { 390 /* have more than 1 tick; just do in ticks */ 391 unsigned int ticks = usec / USEC_PER_TICK; 392 if (ticks*USEC_PER_TICK != usec) 393 ticks += 1; 394 while (ticks-- > 0) { 395 udelay(USEC_PER_TICK); 396 } 397 } 398 else 399 { 400 /* less than 1 tick; can do as usec */ 401 udelay(usec); 402 } 403 404 } 405 406