xref: /netbsd-src/sys/arch/arm/arm32/sys_machdep.c (revision a4ddc2c8fb9af816efe3b1c375a5530aef0e89e9)
1 /*	$NetBSD: sys_machdep.c,v 1.16 2013/01/31 14:58:51 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 1995-1997 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Mark Brinicombe
18  * 4. The name of the company nor the name of the author may be used to
19  *    endorse or promote products derived from this software without specific
20  *    prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * RiscBSD kernel project
35  *
36  * sys_machdep.c
37  *
38  * Machine dependent syscalls
39  *
40  * Created      : 10/01/96
41  */
42 
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: sys_machdep.c,v 1.16 2013/01/31 14:58:51 matt Exp $");
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/proc.h>
49 #include <sys/mbuf.h>
50 #include <sys/mount.h>
51 #include <sys/cpu.h>
52 #include <uvm/uvm_extern.h>
53 #include <sys/sysctl.h>
54 #include <sys/syscallargs.h>
55 
56 #include <machine/sysarch.h>
57 #include <machine/pcb.h>
58 #include <arm/vfpreg.h>
59 
60 /* Prototypes */
61 static int arm32_sync_icache(struct lwp *, const void *, register_t *);
62 static int arm32_drain_writebuf(struct lwp *, const void *, register_t *);
63 static int arm32_vfp_fpscr(struct lwp *, const void *, register_t *);
64 static int arm32_fpu_used(struct lwp *, const void *, register_t *);
65 
66 static int
67 arm32_sync_icache(struct lwp *l, const void *args, register_t *retval)
68 {
69 	struct arm_sync_icache_args ua;
70 	int error;
71 
72 	if ((error = copyin(args, &ua, sizeof(ua))) != 0)
73 		return (error);
74 
75 	pmap_icache_sync_range(vm_map_pmap(&l->l_proc->p_vmspace->vm_map),
76 	    ua.addr, ua.addr + ua.len);
77 
78 	*retval = 0;
79 	return(0);
80 }
81 
82 static int
83 arm32_drain_writebuf(struct lwp *l, const void *args, register_t *retval)
84 {
85 	/* No args. */
86 
87 	cpu_drain_writebuf();
88 
89 	*retval = 0;
90 	return(0);
91 }
92 
93 static int
94 arm32_vfp_fpscr(struct lwp *l, const void *uap, register_t *retval)
95 {
96 	struct pcb * const pcb = lwp_getpcb(l);
97 
98 #ifdef FPU_VFP
99 	/*
100 	 * Save the current VFP state (to make sure the FPSCR copy is
101 	 * up to date).
102 	 */
103 	vfp_savecontext();
104 #endif
105 
106 	retval[0] = pcb->pcb_vfp.vfp_fpscr;
107 	if (uap) {
108 		struct arm_vfp_fpscr_args ua;
109 		int error;
110 		if ((error = copyin(uap, &ua, sizeof(ua))) != 0)
111 			return (error);
112 		if (((ua.fpscr_clear|ua.fpscr_set) & ~VFP_FPSCR_RMODE) != 0)
113 			return EINVAL;
114 		pcb->pcb_vfp.vfp_fpscr &= ~ua.fpscr_clear;
115 		pcb->pcb_vfp.vfp_fpscr |= ua.fpscr_set;
116 	}
117 
118 	return 0;
119 }
120 
121 static int
122 arm32_fpu_used(struct lwp *l, const void *uap, register_t *retval)
123 {
124 	/* No args */
125 	retval[0] = (curlwp->l_md.md_flags & MDLWP_VFPUSED) != 0;
126 	return 0;
127 }
128 
129 int
130 sys_sysarch(struct lwp *l, const struct sys_sysarch_args *uap, register_t *retval)
131 {
132 	/* {
133 		syscallarg(int) op;
134 		syscallarg(void *) parms;
135 	} */
136 	int error = 0;
137 
138 	switch(SCARG(uap, op)) {
139 	case ARM_SYNC_ICACHE :
140 		error = arm32_sync_icache(l, SCARG(uap, parms), retval);
141 		break;
142 
143 	case ARM_DRAIN_WRITEBUF :
144 		error = arm32_drain_writebuf(l, SCARG(uap, parms), retval);
145 		break;
146 
147 	case ARM_VFP_FPSCR :
148 		error = arm32_vfp_fpscr(l, SCARG(uap, parms), retval);
149 		break;
150 
151 	case ARM_FPU_USED :
152 		error = arm32_fpu_used(l, SCARG(uap, parms), retval);
153 		break;
154 
155 	default:
156 		error = EINVAL;
157 		break;
158 	}
159 	return (error);
160 }
161 
162 int
163 cpu_lwp_setprivate(lwp_t *l, void *addr)
164 {
165 #ifdef _ARM_ARCH_6
166 	if (l == curlwp) {
167 		kpreempt_disable();
168 		__asm("mcr p15, 0, %0, c13, c0, 3" : : "r" (addr));
169 		kpreempt_enable();
170 	}
171 	return 0;
172 #else
173 	return 0;
174 #endif
175 }
176