xref: /netbsd-src/sys/arch/arm/arm32/sys_machdep.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: sys_machdep.c,v 1.19 2013/08/23 14:39:50 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 1995-1997 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Mark Brinicombe
18  * 4. The name of the company nor the name of the author may be used to
19  *    endorse or promote products derived from this software without specific
20  *    prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * RiscBSD kernel project
35  *
36  * sys_machdep.c
37  *
38  * Machine dependent syscalls
39  *
40  * Created      : 10/01/96
41  */
42 
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: sys_machdep.c,v 1.19 2013/08/23 14:39:50 matt Exp $");
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/proc.h>
49 #include <sys/mbuf.h>
50 #include <sys/mount.h>
51 #include <sys/cpu.h>
52 #include <uvm/uvm_extern.h>
53 #include <sys/sysctl.h>
54 #include <sys/syscallargs.h>
55 
56 #include <machine/sysarch.h>
57 #include <machine/pcb.h>
58 #include <arm/vfpreg.h>
59 #include <arm/locore.h>
60 
61 /* Prototypes */
62 static int arm32_sync_icache(struct lwp *, const void *, register_t *);
63 static int arm32_drain_writebuf(struct lwp *, const void *, register_t *);
64 static int arm32_vfp_fpscr(struct lwp *, const void *, register_t *);
65 static int arm32_fpu_used(struct lwp *, const void *, register_t *);
66 
67 static int
68 arm32_sync_icache(struct lwp *l, const void *args, register_t *retval)
69 {
70 	struct arm_sync_icache_args ua;
71 	int error;
72 
73 	if ((error = copyin(args, &ua, sizeof(ua))) != 0)
74 		return (error);
75 
76 	pmap_icache_sync_range(vm_map_pmap(&l->l_proc->p_vmspace->vm_map),
77 	    ua.addr, ua.addr + ua.len);
78 
79 	*retval = 0;
80 	return(0);
81 }
82 
83 static int
84 arm32_drain_writebuf(struct lwp *l, const void *args, register_t *retval)
85 {
86 	/* No args. */
87 
88 	cpu_drain_writebuf();
89 
90 	*retval = 0;
91 	return(0);
92 }
93 
94 static int
95 arm32_vfp_fpscr(struct lwp *l, const void *uap, register_t *retval)
96 {
97 	struct pcb * const pcb = lwp_getpcb(l);
98 
99 #ifdef FPU_VFP
100 	/*
101 	 * Save the current VFP state (to make sure the FPSCR copy is
102 	 * up to date).
103 	 */
104 	vfp_savecontext();
105 #endif
106 
107 	retval[0] = pcb->pcb_vfp.vfp_fpscr;
108 	if (uap) {
109 		struct arm_vfp_fpscr_args ua;
110 		int error;
111 		if ((error = copyin(uap, &ua, sizeof(ua))) != 0)
112 			return (error);
113 		if (((ua.fpscr_clear|ua.fpscr_set) & ~VFP_FPSCR_RMODE) != 0)
114 			return EINVAL;
115 		pcb->pcb_vfp.vfp_fpscr &= ~ua.fpscr_clear;
116 		pcb->pcb_vfp.vfp_fpscr |= ua.fpscr_set;
117 	}
118 
119 	return 0;
120 }
121 
122 static int
123 arm32_fpu_used(struct lwp *l, const void *uap, register_t *retval)
124 {
125 	/* No args */
126 #ifdef FPU_VFP
127 	retval[0] = vfp_used_p();
128 #else
129 	retval[0] = false;
130 #endif
131 	return 0;
132 }
133 
134 int
135 sys_sysarch(struct lwp *l, const struct sys_sysarch_args *uap, register_t *retval)
136 {
137 	/* {
138 		syscallarg(int) op;
139 		syscallarg(void *) parms;
140 	} */
141 	int error = 0;
142 
143 	switch(SCARG(uap, op)) {
144 	case ARM_SYNC_ICACHE :
145 		error = arm32_sync_icache(l, SCARG(uap, parms), retval);
146 		break;
147 
148 	case ARM_DRAIN_WRITEBUF :
149 		error = arm32_drain_writebuf(l, SCARG(uap, parms), retval);
150 		break;
151 
152 	case ARM_VFP_FPSCR :
153 		error = arm32_vfp_fpscr(l, SCARG(uap, parms), retval);
154 		break;
155 
156 	case ARM_FPU_USED :
157 		error = arm32_fpu_used(l, SCARG(uap, parms), retval);
158 		break;
159 
160 	default:
161 		error = EINVAL;
162 		break;
163 	}
164 	return (error);
165 }
166 
167 int
168 cpu_lwp_setprivate(lwp_t *l, void *addr)
169 {
170 #ifdef _ARM_ARCH_6
171 	if (l == curlwp) {
172 		kpreempt_disable();
173 		__asm("mcr p15, 0, %0, c13, c0, 3" : : "r" (addr));
174 		kpreempt_enable();
175 	}
176 	return 0;
177 #else
178 	return 0;
179 #endif
180 }
181