xref: /netbsd-src/sys/arch/arm/arm32/sys_machdep.c (revision 5e4c038a45edbc7d63b7c2daa76e29f88b64a4e3)
1 /*	$NetBSD: sys_machdep.c,v 1.4 2002/03/30 06:23:39 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1995-1997 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Mark Brinicombe
18  * 4. The name of the company nor the name of the author may be used to
19  *    endorse or promote products derived from this software without specific
20  *    prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * RiscBSD kernel project
35  *
36  * sys_machdep.c
37  *
38  * Machine dependant syscalls
39  *
40  * Created      : 10/01/96
41  */
42 
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/proc.h>
46 #include <sys/mbuf.h>
47 #include <sys/mount.h>
48 #include <uvm/uvm_extern.h>
49 #include <sys/sysctl.h>
50 #include <sys/syscallargs.h>
51 
52 #include <machine/sysarch.h>
53 
54 /* Prototypes */
55 static int arm32_sync_icache __P((struct proc *, char *, register_t *));
56 static int arm32_drain_writebuf __P((struct proc *, char *, register_t *));
57 
58 static int
59 arm32_sync_icache(p, args, retval)
60 	struct proc *p;
61 	char *args;
62 	register_t *retval;
63 {
64 	struct arm_sync_icache_args ua;
65 	int error;
66 
67 	if ((error = copyin(args, &ua, sizeof(ua))) != 0)
68 		return (error);
69 
70 	cpu_icache_sync_range(ua.addr, ua.len);
71 
72 	*retval = 0;
73 	return(0);
74 }
75 
76 static int
77 arm32_drain_writebuf(p, args, retval)
78 	struct proc *p;
79 	char *args;
80 	register_t *retval;
81 {
82 	/* No args. */
83 
84 	cpu_drain_writebuf();
85 
86 	*retval = 0;
87 	return(0);
88 }
89 
90 int
91 sys_sysarch(p, v, retval)
92 	struct proc *p;
93 	void *v;
94 	register_t *retval;
95 {
96 	struct sys_sysarch_args /* {
97 		syscallarg(int) op;
98 		syscallarg(void *) parms;
99 	} */ *uap = v;
100 	int error = 0;
101 
102 	switch(SCARG(uap, op)) {
103 	case ARM_SYNC_ICACHE :
104 		error = arm32_sync_icache(p, SCARG(uap, parms), retval);
105 		break;
106 
107 	case ARM_DRAIN_WRITEBUF :
108 		error = arm32_drain_writebuf(p, SCARG(uap, parms), retval);
109 		break;
110 
111 	default:
112 		error = EINVAL;
113 		break;
114 	}
115 	return (error);
116 }
117 
118 /* End of sys_machdep.c */
119