1/* $NetBSD: irq_dispatch.S,v 1.15 2013/08/18 06:28:18 matt Exp $ */ 2 3/* 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35/* 36 * Copyright (c) 2002, 2003 Wasabi Systems, Inc. 37 * All rights reserved. 38 * 39 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed for the NetBSD Project by 52 * Wasabi Systems, Inc. 53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 54 * or promote products derived from this software without specific prior 55 * written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70#include "assym.h" 71 72#include <machine/asm.h> 73 74#include <arm/locore.h> 75 76#include "opt_arm_intr_impl.h" 77#ifdef ARM_INTR_IMPL 78#include ARM_INTR_IMPL 79#else 80#error ARM_INTR_IMPL not defined 81#endif 82 83#ifndef ARM_IRQ_HANDLER 84#error ARM_IRQ_HANDLER not defined 85#endif 86 87/* 88 * irq_entry: 89 * Main entry point for the IRQ vector. This is a generic version 90 * which can be used by different platforms. 91 */ 92 .text 93 .p2align 5 94ARM_ASENTRY_NP(irq_entry) 95 sub lr, lr, #0x00000004 /* Adjust the lr */ 96 97 PUSHFRAMEINSVC /* Push an interrupt frame */ 98 ENABLE_ALIGNMENT_FAULTS /* finishes with curcpu() in r4 */ 99 100 /* 101 * Increment the interrupt nesting depth and call the interrupt 102 * dispatch routine. We've pushed a frame, so we can safely use 103 * callee-saved regs here. We use the following registers, which 104 * we expect to persist: 105 * 106 * r4 address of current cpu_info 107 * r6 old value of `ci_intr_depth' 108 */ 109 ldr r6, [r4, #CI_INTR_DEPTH] 110 add r1, r6, #1 111 str r1, [r4, #CI_INTR_DEPTH] 112 113 mov r0, sp /* arg for dispatcher */ 114 bl ARM_IRQ_HANDLER 115 116 /* 117 * Restore the old interrupt depth value (which should be the 118 * same as decrementing it at this point). 119 */ 120 str r6, [r4, #CI_INTR_DEPTH] 121 122 LOCK_CAS_CHECK 123 124 DO_AST_AND_RESTORE_ALIGNMENT_FAULTS 125 PULLFRAMEFROMSVCANDEXIT 126#ifdef __thumb__ 127 subs pc, lr, #0 /* Exit */ 128#else 129 movs pc, lr /* Exit */ 130#endif 131 132 .align 0 133LOCK_CAS_CHECK_LOCALS 134 135AST_ALIGNMENT_FAULT_LOCALS 136ASEND(irq_entry) 137 138 .p2align 5 139ARM_ASENTRY_NP(irq_idle_entry) 140 PUSHIDLEFRAME 141 142 /* 143 * Increment the interrupt nesting depth and call the interrupt 144 * dispatch routine. We've pushed a frame, so we can safely use 145 * callee-saved regs here. We use the following registers, which 146 * we expect to persist: 147 * 148 * r4 address of current cpu_info 149 * r6 old value of `ci_intr_depth' 150 */ 151 GET_CURCPU(r4) 152 ldr r6, [r4, #CI_INTR_DEPTH] 153 add r1, r6, #1 154 str r1, [r4, #CI_INTR_DEPTH] 155 156 mov r0, sp /* arg for dispatcher */ 157 bl ARM_IRQ_HANDLER 158 159 /* 160 * Restore the old interrupt depth value (which should be the 161 * same as decrementing it at this point). 162 */ 163 str r6, [r4, #CI_INTR_DEPTH] 164 165#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS) 166 ldr r2, [r4, #CI_CPL] /* Get current priority level */ 167 ldr r3, [r4, #CI_SOFTINTS] /* Get pending softint mask */ 168#endif 169 170 PULLIDLEFRAME /* restore r4, r6, sp, lr */ 171 172#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS) 173 lsrs r3, r3, r2 /* shift mask by cpl */ 174 bne _C_LABEL(dosoftints) /* dosoftints(void) */ 175#endif 176 RET 177ASEND(irq_idle_entry) 178