xref: /netbsd-src/sys/arch/arm/arm32/irq_dispatch.S (revision 1ffa7b76c40339c17a0fb2a09fac93f287cfc046)
1/*	$NetBSD: irq_dispatch.S,v 1.2 2003/01/03 00:38:16 thorpej Exp $	*/
2
3/*
4 * Copyright (c) 2002 Fujitsu Component Limited
5 * Copyright (c) 2002 Genetec Corporation
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 *    Genetec corporation may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35/*
36 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
37 * All rights reserved.
38 *
39 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 *    notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 *    notice, this list of conditions and the following disclaimer in the
48 *    documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 *    must display the following acknowledgement:
51 *	This product includes software developed for the NetBSD Project by
52 *	Wasabi Systems, Inc.
53 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
54 *    or promote products derived from this software without specific prior
55 *    written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70#include "assym.h"
71
72#include <machine/asm.h>
73#include <machine/cpu.h>
74#include <machine/frame.h>
75
76#include "opt_arm_intr_impl.h"
77#ifdef ARM_INTR_IMPL
78#include ARM_INTR_IMPL
79#else
80#error ARM_INTR_IMPL not defined
81#endif
82
83#ifndef ARM_IRQ_HANDLER
84#error ARM_IRQ_HANDLER not defined
85#endif
86
87/*
88 * irq_entry:
89 *	Main entry point for the IRQ vector.  This is a generic version
90 *	which can be used by different platforms.
91 */
92	.text
93	.align	0
94.Lastpending:
95	.word	_C_LABEL(astpending)
96.Lcurrent_intr_depth:
97	.word	_C_LABEL(current_intr_depth)
98
99ASENTRY_NP(irq_entry)
100	sub	lr, lr, #0x00000004	/* Adjust the lr */
101
102	PUSHFRAMEINSVC			/* Push an interrupt frame */
103
104	/*
105	 * Increment the interrupt nesting depth and call the interrupt
106	 * dispatch routine.  We've pushed a frame, so we can safely use
107	 * callee-saved regs here.  We use the following registers, which
108	 * we expect to presist:
109	 *
110	 *	r5	address of `current_intr_depth' variable
111	 *	r6	old value of `current_intr_depth'
112	 */
113	ldr	r5, .Lcurrent_intr_depth
114	mov	r0, sp			/* arg for dispatcher */
115	ldr	r6, [r5]
116	add	r1, r6, #1
117	str	r1, [r5]
118
119	bl	ARM_IRQ_HANDLER
120
121	/*
122	 * Restore the old interrupt depth value (which should be the
123	 * same as decrementing it at this point).
124	 */
125	str	r6, [r5]
126
127	/*
128	 * If we're returning to user mode, check for pending ASTs.
129	 */
130	ldr	r0, [sp]		/* Get the SPSR from stack */
131	and	r0, r0, #(PSR_MODE)	/* Test for USR32 mode before the IRQ */
132	teq	r0, #(PSR_USR32_MODE)
133	bne	2f			/* Nope, get out now */
134
1351:
136	ldr	r0, .Lastpending	/* Do we have an AST pending? */
137	ldr	r1, [r0]
138	teq	r1, #0x00000000
139	beq	2f			/* Nope, get out now */
140
141	mov	r1, #0x00000000
142	str	r1, [r0]		/* Clear astpending */
143
144	mrs	r4, cpsr		/* save CPSR */
145	bic	r0, r4, #(I32_bit)	/* Enable IRQs */
146	msr	cpsr_c, r0
147
148	mov	r0, sp
149	bl	_C_LABEL(ast)		/* ast(frame) */
150
151	msr	cpsr_c, r4		/* Disable IRQs */
152	b	1b			/* Check for more ASTs */
153
1542:
155	PULLFRAMEFROMSVCANDEXIT
156	movs	pc, lr			/* Exit */
157
158	.bss
159	.align	0
160
161	.global _C_LABEL(astpending)
162_C_LABEL(astpending):
163	.word	0
164
165	.global _C_LABEL(current_intr_depth)
166_C_LABEL(current_intr_depth):
167	.word	0
168
169	/*
170	 * XXX Provide intrnames/intrcnt for legacy code, but
171	 * don't actually use them.
172	 */
173
174	.global _C_LABEL(intrnames), _C_LABEL(eintrnames)
175	.global _C_LABEL(intrcnt), _C_LABEL(eintrcnt)
176_C_LABEL(intrnames):
177_C_LABEL(eintrnames):
178
179	.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt)
180_C_LABEL(intrcnt):
181_C_LABEL(eintrcnt):
182