xref: /netbsd-src/sys/arch/arm/arm32/intr.c (revision 3b01aba77a7a698587faaae455bbfe740923c1f5)
1 /*	$NetBSD: intr.c,v 1.1 2001/07/28 13:28:03 chris Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1998 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Mark Brinicombe
18  *	for the NetBSD Project.
19  * 4. The name of the company nor the name of the author may be used to
20  *    endorse or promote products derived from this software without specific
21  *    prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * Soft interrupt and other generic interrupt functions.
36  */
37 
38 #include "opt_irqstats.h"
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/syslog.h>
43 #include <sys/malloc.h>
44 
45 #include <uvm/uvm_extern.h>
46 
47 #include <machine/irqhandler.h>
48 #include <machine/cpu.h>
49 
50 #include <net/netisr.h>
51 
52 u_int soft_interrupts = 0;
53 
54 extern int current_spl_level;
55 
56 /* Generate soft interrupt counts if IRQSTATS is defined */
57 #ifdef IRQSTATS
58 extern u_int sintrcnt[];
59 #define INC_SINTRCNT(x) ++sintrcnt[x]
60 #else
61 #define INC_SINTRCNT(x)
62 #endif	/* IRQSTATS */
63 
64 #define	COUNT	uvmexp.softs;
65 
66 /* Prototypes */
67 
68 #include "com.h"
69 #if NCOM > 0
70 extern void comsoft	__P((void));
71 #endif	/* NCOM > 0 */
72 
73 /* Eventually these will become macros */
74 
75 void
76 setsoftintr(intrmask)
77 	u_int intrmask;
78 {
79 	atomic_set_bit(&soft_interrupts, intrmask);
80 }
81 
82 void
83 clearsoftintr(intrmask)
84 	u_int intrmask;
85 {
86 	atomic_clear_bit(&soft_interrupts, intrmask);
87 }
88 
89 void
90 setsoftclock()
91 {
92 	atomic_set_bit(&soft_interrupts, SOFTIRQ_BIT(SOFTIRQ_CLOCK));
93 }
94 
95 void
96 setsoftnet()
97 {
98 	atomic_set_bit(&soft_interrupts, SOFTIRQ_BIT(SOFTIRQ_NET));
99 }
100 
101 void
102 setsoftserial()
103 {
104 	atomic_set_bit(&soft_interrupts, SOFTIRQ_BIT(SOFTIRQ_SERIAL));
105 }
106 
107 int astpending;
108 
109 /* Handle software interrupts */
110 
111 void
112 dosoftints()
113 {
114 	u_int softints;
115 	int s;
116 
117 	softints = soft_interrupts & spl_smasks[current_spl_level];
118 	if (softints == 0) return;
119 
120 	/*
121 	 * Software clock interrupts
122 	 */
123 
124 	if (softints & SOFTIRQ_BIT(SOFTIRQ_CLOCK)) {
125 		s = splsoftclock();
126 		++COUNT;
127 		INC_SINTRCNT(SOFTIRQ_CLOCK);
128 		clearsoftintr(SOFTIRQ_BIT(SOFTIRQ_CLOCK));
129 		softclock(NULL);
130 		(void)splx(s);
131 	}
132 
133 	/*
134 	 * Network software interrupts
135 	 */
136 
137 	if (softints & SOFTIRQ_BIT(SOFTIRQ_NET)) {
138 		s = splsoftnet();
139 		++COUNT;
140 		INC_SINTRCNT(SOFTIRQ_NET);
141 		clearsoftintr(SOFTIRQ_BIT(SOFTIRQ_NET));
142 
143 #define DONETISR(bit, fn) do {					\
144 		if (netisr & (1 << bit)) {			\
145 			atomic_clear_bit(&netisr, (1 << bit));	\
146 			fn();					\
147 		}						\
148 } while (0)
149 
150 #include <net/netisr_dispatch.h>
151 
152 #undef DONETISR
153 
154 		(void)splx(s);
155 	}
156 	/*
157 	 * Serial software interrupts
158 	 */
159 
160 	if (softints & SOFTIRQ_BIT(SOFTIRQ_SERIAL)) {
161 		s = splsoftserial();
162 		++COUNT;
163 		INC_SINTRCNT(SOFTIRQ_SERIAL);
164 		clearsoftintr(SOFTIRQ_BIT(SOFTIRQ_SERIAL));
165 #if NCOM > 0
166 		comsoft();
167 #endif	/* NCOM > 0 */
168 		(void)splx(s);
169 	}
170 }
171 
172 /* End of intr.c */
173