xref: /netbsd-src/sys/arch/arm/arm32/fault.c (revision f3cfa6f6ce31685c6c4a758bc430e69eb99f50a4)
1 /*	$NetBSD: fault.c,v 1.108 2019/04/06 03:06:25 thorpej Exp $	*/
2 
3 /*
4  * Copyright 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 /*
38  * Copyright (c) 1994-1997 Mark Brinicombe.
39  * Copyright (c) 1994 Brini.
40  * All rights reserved.
41  *
42  * This code is derived from software written for Brini by Mark Brinicombe
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Brini.
55  * 4. The name of the company nor the name of the author may be used to
56  *    endorse or promote products derived from this software without specific
57  *    prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  * RiscBSD kernel project
72  *
73  * fault.c
74  *
75  * Fault handlers
76  *
77  * Created      : 28/11/94
78  */
79 
80 #include "opt_ddb.h"
81 #include "opt_kgdb.h"
82 
83 #include <sys/types.h>
84 __KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.108 2019/04/06 03:06:25 thorpej Exp $");
85 
86 #include <sys/param.h>
87 #include <sys/systm.h>
88 #include <sys/proc.h>
89 #include <sys/kernel.h>
90 #include <sys/kauth.h>
91 #include <sys/cpu.h>
92 #include <sys/intr.h>
93 
94 #include <uvm/uvm_extern.h>
95 #include <uvm/uvm_stat.h>
96 #ifdef UVMHIST
97 #include <uvm/uvm.h>
98 #endif
99 
100 #include <arm/locore.h>
101 
102 #include <machine/pcb.h>
103 #if defined(DDB) || defined(KGDB)
104 #include <machine/db_machdep.h>
105 #ifdef KGDB
106 #include <sys/kgdb.h>
107 #endif
108 #if !defined(DDB)
109 #define kdb_trap	kgdb_trap
110 #endif
111 #endif
112 
113 #include <arch/arm/arm/disassem.h>
114 #include <arm/arm32/machdep.h>
115 
116 #ifdef DEBUG
117 int last_fault_code;	/* For the benefit of pmap_fault_fixup() */
118 #endif
119 
120 #if defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI)
121 /* These CPUs may need data/prefetch abort fixups */
122 #define	CPU_ABORT_FIXUP_REQUIRED
123 #endif
124 
125 struct data_abort {
126 	int (*func)(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
127 	const char *desc;
128 };
129 
130 static int dab_fatal(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
131 static int dab_align(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
132 static int dab_buserr(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
133 
134 static const struct data_abort data_aborts[] = {
135 	{dab_fatal,	"Vector Exception"},
136 	{dab_align,	"Alignment Fault 1"},
137 	{dab_fatal,	"Terminal Exception"},
138 	{dab_align,	"Alignment Fault 3"},
139 	{dab_buserr,	"External Linefetch Abort (S)"},
140 	{NULL,		"Translation Fault (S)"},
141 	{dab_buserr,	"External Linefetch Abort (P)"},
142 	{NULL,		"Translation Fault (P)"},
143 	{dab_buserr,	"External Non-Linefetch Abort (S)"},
144 	{NULL,		"Domain Fault (S)"},
145 	{dab_buserr,	"External Non-Linefetch Abort (P)"},
146 	{NULL,		"Domain Fault (P)"},
147 	{dab_buserr,	"External Translation Abort (L1)"},
148 	{NULL,		"Permission Fault (S)"},
149 	{dab_buserr,	"External Translation Abort (L2)"},
150 	{NULL,		"Permission Fault (P)"}
151 };
152 
153 /* Determine if 'x' is a permission fault */
154 #define	IS_PERMISSION_FAULT(x)					\
155 	(((1 << ((x) & FAULT_TYPE_MASK)) &			\
156 	  ((1 << FAULT_PERM_P) | (1 << FAULT_PERM_S))) != 0)
157 
158 #if 0
159 /* maybe one day we'll do emulations */
160 #define	TRAPSIGNAL(l,k)	(*(l)->l_proc->p_emul->e_trapsignal)((l), (k))
161 #else
162 #define	TRAPSIGNAL(l,k)	trapsignal((l), (k))
163 #endif
164 
165 static inline void
166 call_trapsignal(struct lwp *l, const struct trapframe *tf, ksiginfo_t *ksi)
167 {
168 	if (l->l_proc->p_pid == 1 || cpu_printfataltraps) {
169 		printf("%d.%d(%s): trap: signo=%d code=%d addr=%p trap=%#x\n",
170 		    l->l_proc->p_pid, l->l_lid, l->l_proc->p_comm,
171 		    ksi->ksi_signo, ksi->ksi_code, ksi->ksi_addr,
172 		    ksi->ksi_trap);
173 		printf("r0=%08x r1=%08x r2=%08x r3=%08x\n",
174 		    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
175 		printf("r4=%08x r5=%08x r6=%08x r7=%08x\n",
176 		    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
177 		printf("r8=%08x r9=%08x rA=%08x rB=%08x\n",
178 		    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
179 		printf("ip=%08x sp=%08x lr=%08x pc=%08x spsr=%08x\n",
180 		    tf->tf_r12, tf->tf_usr_sp, tf->tf_usr_lr, tf->tf_pc,
181 		    tf->tf_spsr);
182 	}
183 
184 	TRAPSIGNAL(l, ksi);
185 }
186 
187 static inline int
188 data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l)
189 {
190 #ifdef CPU_ABORT_FIXUP_REQUIRED
191 	int error;
192 
193 	/* Call the CPU specific data abort fixup routine */
194 	error = cpu_dataabt_fixup(tf);
195 	if (__predict_true(error != ABORT_FIXUP_FAILED))
196 		return (error);
197 
198 	/*
199 	 * Oops, couldn't fix up the instruction
200 	 */
201 	printf("%s: fixup for %s mode data abort failed.\n", __func__,
202 	    TRAP_USERMODE(tf) ? "user" : "kernel");
203 #ifdef THUMB_CODE
204 	if (tf->tf_spsr & PSR_T_bit) {
205 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
206 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
207 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
208 	}
209 	else
210 #endif
211 	{
212 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
213 		    *((u_int *)tf->tf_pc));
214 	}
215 	disassemble(tf->tf_pc);
216 
217 	/* Die now if this happened in kernel mode */
218 	if (!TRAP_USERMODE(tf))
219 		dab_fatal(tf, fsr, far, l, NULL);
220 
221 	return (error);
222 #else
223 	return (ABORT_FIXUP_OK);
224 #endif /* CPU_ABORT_FIXUP_REQUIRED */
225 }
226 
227 void
228 data_abort_handler(trapframe_t *tf)
229 {
230 	struct vm_map *map;
231 	struct lwp * const l = curlwp;
232 	struct cpu_info * const ci = curcpu();
233 	u_int far, fsr;
234 	vm_prot_t ftype;
235 	void *onfault;
236 	vaddr_t va;
237 	int error;
238 	ksiginfo_t ksi;
239 
240 	UVMHIST_FUNC(__func__);
241 	UVMHIST_CALLED(maphist);
242 
243 	/* Grab FAR/FSR before enabling interrupts */
244 	far = cpu_faultaddress();
245 	fsr = cpu_faultstatus();
246 
247 	/* Update vmmeter statistics */
248 	ci->ci_data.cpu_ntrap++;
249 
250 	/* Re-enable interrupts if they were enabled previously */
251 	KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
252 #ifdef __NO_FIQ
253 	if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
254 		restore_interrupts(tf->tf_spsr & IF32_bits);
255 #else
256 	if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
257 		restore_interrupts(tf->tf_spsr & IF32_bits);
258 #endif
259 
260 	/* Get the current lwp structure */
261 
262 	UVMHIST_LOG(maphist, " (l=%#jx, far=%#jx, fsr=%#jx",
263 	    (uintptr_t)l, far, fsr, 0);
264 	UVMHIST_LOG(maphist, "  tf=%#jx, pc=%#jx)",
265 	    (uintptr_t)tf, (uintptr_t)tf->tf_pc, 0, 0);
266 
267 	/* Data abort came from user mode? */
268 	bool user = (TRAP_USERMODE(tf) != 0);
269 	if (user)
270 		LWP_CACHE_CREDS(l, l->l_proc);
271 
272 	/* Grab the current pcb */
273 	struct pcb * const pcb = lwp_getpcb(l);
274 
275 	curcpu()->ci_abt_evs[fsr & FAULT_TYPE_MASK].ev_count++;
276 
277 	/* Invoke the appropriate handler, if necessary */
278 	if (__predict_false(data_aborts[fsr & FAULT_TYPE_MASK].func != NULL)) {
279 #ifdef DIAGNOSTIC
280 		printf("%s: data_aborts fsr=0x%x far=0x%x\n",
281 		    __func__, fsr, far);
282 #endif
283 		if ((data_aborts[fsr & FAULT_TYPE_MASK].func)(tf, fsr, far,
284 		    l, &ksi))
285 			goto do_trapsignal;
286 		goto out;
287 	}
288 
289 	/*
290 	 * At this point, we're dealing with one of the following data aborts:
291 	 *
292 	 *  FAULT_TRANS_S  - Translation -- Section
293 	 *  FAULT_TRANS_P  - Translation -- Page
294 	 *  FAULT_DOMAIN_S - Domain -- Section
295 	 *  FAULT_DOMAIN_P - Domain -- Page
296 	 *  FAULT_PERM_S   - Permission -- Section
297 	 *  FAULT_PERM_P   - Permission -- Page
298 	 *
299 	 * These are the main virtual memory-related faults signalled by
300 	 * the MMU.
301 	 */
302 
303 	KASSERTMSG(!user || tf == lwp_trapframe(l), "tf %p vs %p", tf,
304 	    lwp_trapframe(l));
305 
306 	/*
307 	 * Make sure the Program Counter is sane. We could fall foul of
308 	 * someone executing Thumb code, in which case the PC might not
309 	 * be word-aligned. This would cause a kernel alignment fault
310 	 * further down if we have to decode the current instruction.
311 	 */
312 #ifdef THUMB_CODE
313 	/*
314 	 * XXX: It would be nice to be able to support Thumb in the kernel
315 	 * at some point.
316 	 */
317 	if (__predict_false(!user && (tf->tf_pc & 3) != 0)) {
318 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
319 		    __func__);
320 		dab_fatal(tf, fsr, far, l, NULL);
321 	}
322 #else
323 	if (__predict_false((tf->tf_pc & 3) != 0)) {
324 		if (user) {
325 			/*
326 			 * Give the user an illegal instruction signal.
327 			 */
328 			/* Deliver a SIGILL to the process */
329 			KSI_INIT_TRAP(&ksi);
330 			ksi.ksi_signo = SIGILL;
331 			ksi.ksi_code = ILL_ILLOPC;
332 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
333 			ksi.ksi_trap = fsr;
334 			goto do_trapsignal;
335 		}
336 
337 		/*
338 		 * The kernel never executes Thumb code.
339 		 */
340 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
341 		    __func__);
342 		dab_fatal(tf, fsr, far, l, NULL);
343 	}
344 #endif
345 
346 	/* See if the CPU state needs to be fixed up */
347 	switch (data_abort_fixup(tf, fsr, far, l)) {
348 	case ABORT_FIXUP_RETURN:
349 		return;
350 	case ABORT_FIXUP_FAILED:
351 		/* Deliver a SIGILL to the process */
352 		KSI_INIT_TRAP(&ksi);
353 		ksi.ksi_signo = SIGILL;
354 		ksi.ksi_code = ILL_ILLOPC;
355 		ksi.ksi_addr = (uint32_t *)(intptr_t) far;
356 		ksi.ksi_trap = fsr;
357 		goto do_trapsignal;
358 	default:
359 		break;
360 	}
361 
362 	va = trunc_page((vaddr_t)far);
363 
364 	/*
365 	 * It is only a kernel address space fault iff:
366 	 *	1. user == 0  and
367 	 *	2. pcb_onfault not set or
368 	 *	3. pcb_onfault set and not LDRT/LDRBT/STRT/STRBT instruction.
369 	 */
370 	if (!user && (va >= VM_MIN_KERNEL_ADDRESS ||
371 	    (va < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW)) &&
372 	    __predict_true((pcb->pcb_onfault == NULL ||
373 	     (read_insn(tf->tf_pc, false) & 0x05200000) != 0x04200000))) {
374 		map = kernel_map;
375 
376 		/* Was the fault due to the FPE ? */
377 		if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
378 			KSI_INIT_TRAP(&ksi);
379 			ksi.ksi_signo = SIGSEGV;
380 			ksi.ksi_code = SEGV_ACCERR;
381 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
382 			ksi.ksi_trap = fsr;
383 
384 			/*
385 			 * Force exit via userret()
386 			 * This is necessary as the FPE is an extension to
387 			 * userland that actually runs in a priveledged mode
388 			 * but uses USR mode permissions for its accesses.
389 			 */
390 			user = true;
391 			goto do_trapsignal;
392 		}
393 	} else {
394 		map = &l->l_proc->p_vmspace->vm_map;
395 	}
396 
397 	/*
398 	 * We need to know whether the page should be mapped as R or R/W.
399 	 * Before ARMv6, the MMU did not give us the info as to whether the
400 	 * fault was caused by a read or a write.
401 	 *
402 	 * However, we know that a permission fault can only be the result of
403 	 * a write to a read-only location, so we can deal with those quickly.
404 	 *
405 	 * Otherwise we need to disassemble the instruction responsible to
406 	 * determine if it was a write.
407 	 */
408 	if (CPU_IS_ARMV6_P() || CPU_IS_ARMV7_P()) {
409 		ftype = (fsr & FAULT_WRITE) ? VM_PROT_WRITE : VM_PROT_READ;
410 	} else if (IS_PERMISSION_FAULT(fsr)) {
411 		ftype = VM_PROT_WRITE;
412 	} else {
413 #ifdef THUMB_CODE
414 		/* Fast track the ARM case.  */
415 		if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
416 			u_int insn = read_thumb_insn(tf->tf_pc, user);
417 			u_int insn_f8 = insn & 0xf800;
418 			u_int insn_fe = insn & 0xfe00;
419 
420 			if (insn_f8 == 0x6000 || /* STR(1) */
421 			    insn_f8 == 0x7000 || /* STRB(1) */
422 			    insn_f8 == 0x8000 || /* STRH(1) */
423 			    insn_f8 == 0x9000 || /* STR(3) */
424 			    insn_f8 == 0xc000 || /* STM */
425 			    insn_fe == 0x5000 || /* STR(2) */
426 			    insn_fe == 0x5200 || /* STRH(2) */
427 			    insn_fe == 0x5400)   /* STRB(2) */
428 				ftype = VM_PROT_WRITE;
429 			else
430 				ftype = VM_PROT_READ;
431 		}
432 		else
433 #endif
434 		{
435 			u_int insn = read_insn(tf->tf_pc, user);
436 
437 			if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
438 			    ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
439 			    ((insn & 0x0a100000) == 0x08000000) || /* STM/CDT*/
440 			    ((insn & 0x0f9000f0) == 0x01800090))   /* STREX[BDH] */
441 				ftype = VM_PROT_WRITE;
442 			else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */
443 				ftype = VM_PROT_READ | VM_PROT_WRITE;
444 			else
445 				ftype = VM_PROT_READ;
446 		}
447 	}
448 
449 	/*
450 	 * See if the fault is as a result of ref/mod emulation,
451 	 * or domain mismatch.
452 	 */
453 #ifdef DEBUG
454 	last_fault_code = fsr;
455 #endif
456 	if (pmap_fault_fixup(map->pmap, va, ftype, user)) {
457 		UVMHIST_LOG(maphist, " <- ref/mod emul", 0, 0, 0, 0);
458 		goto out;
459 	}
460 
461 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
462 		if (pcb->pcb_onfault) {
463 			tf->tf_r0 = EINVAL;
464 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
465 			return;
466 		}
467 		printf("\nNon-emulated page fault with intr_depth > 0\n");
468 		dab_fatal(tf, fsr, far, l, NULL);
469 	}
470 
471 	onfault = pcb->pcb_onfault;
472 	pcb->pcb_onfault = NULL;
473 	error = uvm_fault(map, va, ftype);
474 	pcb->pcb_onfault = onfault;
475 
476 	if (__predict_true(error == 0)) {
477 		if (user)
478 			uvm_grow(l->l_proc, va); /* Record any stack growth */
479 		UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0);
480 		goto out;
481 	}
482 
483 	if (user == 0) {
484 		if (pcb->pcb_onfault) {
485 			tf->tf_r0 = error;
486 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
487 			return;
488 		}
489 
490 		printf("\nuvm_fault(%p, %lx, %x) -> %x\n", map, va, ftype,
491 		    error);
492 		dab_fatal(tf, fsr, far, l, NULL);
493 	}
494 
495 	KSI_INIT_TRAP(&ksi);
496 
497 	switch (error) {
498 	case ENOMEM:
499 		printf("UVM: pid %d (%s), uid %d killed: "
500 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
501 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
502 		ksi.ksi_signo = SIGKILL;
503 		break;
504 	case EACCES:
505 		ksi.ksi_signo = SIGSEGV;
506 		ksi.ksi_code = SEGV_ACCERR;
507 		break;
508 	case EINVAL:
509 		ksi.ksi_signo = SIGBUS;
510 		ksi.ksi_code = BUS_ADRERR;
511 		break;
512 	default:
513 		ksi.ksi_signo = SIGSEGV;
514 		ksi.ksi_code = SEGV_MAPERR;
515 		break;
516 	}
517 	ksi.ksi_addr = (uint32_t *)(intptr_t) far;
518 	ksi.ksi_trap = fsr;
519 	UVMHIST_LOG(maphist, " <- error (%jd)", error, 0, 0, 0);
520 
521 do_trapsignal:
522 	call_trapsignal(l, tf, &ksi);
523 out:
524 	/* If returning to user mode, make sure to invoke userret() */
525 	if (user)
526 		userret(l);
527 }
528 
529 /*
530  * dab_fatal() handles the following data aborts:
531  *
532  *  FAULT_WRTBUF_0 - Vector Exception
533  *  FAULT_WRTBUF_1 - Terminal Exception
534  *
535  * We should never see these on a properly functioning system.
536  *
537  * This function is also called by the other handlers if they
538  * detect a fatal problem.
539  *
540  * Note: If 'l' is NULL, we assume we're dealing with a prefetch abort.
541  */
542 static int
543 dab_fatal(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
544 {
545 	const char * const mode = TRAP_USERMODE(tf) ? "user" : "kernel";
546 
547 	if (l != NULL) {
548 		printf("Fatal %s mode data abort: '%s'\n", mode,
549 		    data_aborts[fsr & FAULT_TYPE_MASK].desc);
550 		printf("trapframe: %p\nFSR=%08x, FAR=", tf, fsr);
551 		if ((fsr & FAULT_IMPRECISE) == 0)
552 			printf("%08x, ", far);
553 		else
554 			printf("Invalid,  ");
555 		printf("spsr=%08x\n", tf->tf_spsr);
556 	} else {
557 		printf("Fatal %s mode prefetch abort at 0x%08x\n",
558 		    mode, tf->tf_pc);
559 		printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
560 	}
561 
562 	printf("r0 =%08x, r1 =%08x, r2 =%08x, r3 =%08x\n",
563 	    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
564 	printf("r4 =%08x, r5 =%08x, r6 =%08x, r7 =%08x\n",
565 	    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
566 	printf("r8 =%08x, r9 =%08x, r10=%08x, r11=%08x\n",
567 	    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
568 	printf("r12=%08x, ", tf->tf_r12);
569 
570 	if (TRAP_USERMODE(tf))
571 		printf("usp=%08x, ulr=%08x",
572 		    tf->tf_usr_sp, tf->tf_usr_lr);
573 	else
574 		printf("ssp=%08x, slr=%08x",
575 		    tf->tf_svc_sp, tf->tf_svc_lr);
576 	printf(", pc =%08x\n\n", tf->tf_pc);
577 
578 #if defined(DDB) || defined(KGDB)
579 	kdb_trap(T_FAULT, tf);
580 #endif
581 	panic("Fatal abort");
582 	/*NOTREACHED*/
583 }
584 
585 /*
586  * dab_align() handles the following data aborts:
587  *
588  *  FAULT_ALIGN_0 - Alignment fault
589  *  FAULT_ALIGN_0 - Alignment fault
590  *
591  * These faults are fatal if they happen in kernel mode. Otherwise, we
592  * deliver a bus error to the process.
593  */
594 static int
595 dab_align(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
596 {
597 	/* Alignment faults are always fatal if they occur in kernel mode */
598 	if (!TRAP_USERMODE(tf))
599 		dab_fatal(tf, fsr, far, l, NULL);
600 
601 	/* pcb_onfault *must* be NULL at this point */
602 	KDASSERT(((struct pcb *)lwp_getpcb(l))->pcb_onfault == NULL);
603 
604 	/* See if the CPU state needs to be fixed up */
605 	(void) data_abort_fixup(tf, fsr, far, l);
606 
607 	/* Deliver a bus error signal to the process */
608 	KSI_INIT_TRAP(ksi);
609 	ksi->ksi_signo = SIGBUS;
610 	ksi->ksi_code = BUS_ADRALN;
611 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
612 	ksi->ksi_trap = fsr;
613 
614 	KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf, lwp_trapframe(l));
615 
616 	return (1);
617 }
618 
619 /*
620  * dab_buserr() handles the following data aborts:
621  *
622  *  FAULT_BUSERR_0 - External Abort on Linefetch -- Section
623  *  FAULT_BUSERR_1 - External Abort on Linefetch -- Page
624  *  FAULT_BUSERR_2 - External Abort on Non-linefetch -- Section
625  *  FAULT_BUSERR_3 - External Abort on Non-linefetch -- Page
626  *  FAULT_BUSTRNL1 - External abort on Translation -- Level 1
627  *  FAULT_BUSTRNL2 - External abort on Translation -- Level 2
628  *
629  * If pcb_onfault is set, flag the fault and return to the handler.
630  * If the fault occurred in user mode, give the process a SIGBUS.
631  *
632  * Note: On XScale, FAULT_BUSERR_0, FAULT_BUSERR_1, and FAULT_BUSERR_2
633  * can be flagged as imprecise in the FSR. This causes a real headache
634  * since some of the machine state is lost. In this case, tf->tf_pc
635  * may not actually point to the offending instruction. In fact, if
636  * we've taken a double abort fault, it generally points somewhere near
637  * the top of "data_abort_entry" in exception.S.
638  *
639  * In all other cases, these data aborts are considered fatal.
640  */
641 static int
642 dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l,
643     ksiginfo_t *ksi)
644 {
645 	struct pcb *pcb = lwp_getpcb(l);
646 
647 #ifdef __XSCALE__
648 	if ((fsr & FAULT_IMPRECISE) != 0 &&
649 	    (tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
650 		/*
651 		 * Oops, an imprecise, double abort fault. We've lost the
652 		 * r14_abt/spsr_abt values corresponding to the original
653 		 * abort, and the spsr saved in the trapframe indicates
654 		 * ABT mode.
655 		 */
656 		tf->tf_spsr &= ~PSR_MODE;
657 
658 		/*
659 		 * We use a simple heuristic to determine if the double abort
660 		 * happened as a result of a kernel or user mode access.
661 		 * If the current trapframe is at the top of the kernel stack,
662 		 * the fault _must_ have come from user mode.
663 		 */
664 		if (tf != ((trapframe_t *)pcb->pcb_ksp) - 1) {
665 			/*
666 			 * Kernel mode. We're either about to die a
667 			 * spectacular death, or pcb_onfault will come
668 			 * to our rescue. Either way, the current value
669 			 * of tf->tf_pc is irrelevant.
670 			 */
671 			tf->tf_spsr |= PSR_SVC32_MODE;
672 			if (pcb->pcb_onfault == NULL)
673 				printf("\nKernel mode double abort!\n");
674 		} else {
675 			/*
676 			 * User mode. We've lost the program counter at the
677 			 * time of the fault (not that it was accurate anyway;
678 			 * it's not called an imprecise fault for nothing).
679 			 * About all we can do is copy r14_usr to tf_pc and
680 			 * hope for the best. The process is about to get a
681 			 * SIGBUS, so it's probably history anyway.
682 			 */
683 			tf->tf_spsr |= PSR_USR32_MODE;
684 			tf->tf_pc = tf->tf_usr_lr;
685 #ifdef THUMB_CODE
686 			tf->tf_spsr &= ~PSR_T_bit;
687 			if (tf->tf_usr_lr & 1)
688 				tf->tf_spsr |= PSR_T_bit;
689 #endif
690 		}
691 	}
692 
693 	/* FAR is invalid for imprecise exceptions */
694 	if ((fsr & FAULT_IMPRECISE) != 0)
695 		far = 0;
696 #endif /* __XSCALE__ */
697 
698 	if (pcb->pcb_onfault) {
699 		KDASSERT(TRAP_USERMODE(tf) == 0);
700 		tf->tf_r0 = EFAULT;
701 		tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
702 		return (0);
703 	}
704 
705 	/* See if the CPU state needs to be fixed up */
706 	(void) data_abort_fixup(tf, fsr, far, l);
707 
708 	/*
709 	 * At this point, if the fault happened in kernel mode, we're toast
710 	 */
711 	if (!TRAP_USERMODE(tf))
712 		dab_fatal(tf, fsr, far, l, NULL);
713 
714 	/* Deliver a bus error signal to the process */
715 	KSI_INIT_TRAP(ksi);
716 	ksi->ksi_signo = SIGBUS;
717 	ksi->ksi_code = BUS_ADRERR;
718 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
719 	ksi->ksi_trap = fsr;
720 
721 	KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf, lwp_trapframe(l));
722 
723 	return (1);
724 }
725 
726 static inline int
727 prefetch_abort_fixup(trapframe_t *tf)
728 {
729 #ifdef CPU_ABORT_FIXUP_REQUIRED
730 	int error;
731 
732 	/* Call the CPU specific prefetch abort fixup routine */
733 	error = cpu_prefetchabt_fixup(tf);
734 	if (__predict_true(error != ABORT_FIXUP_FAILED))
735 		return (error);
736 
737 	/*
738 	 * Oops, couldn't fix up the instruction
739 	 */
740 	printf("%s: fixup for %s mode prefetch abort failed.\n", __func__,
741 	    TRAP_USERMODE(tf) ? "user" : "kernel");
742 #ifdef THUMB_CODE
743 	if (tf->tf_spsr & PSR_T_bit) {
744 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
745 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
746 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
747 	}
748 	else
749 #endif
750 	{
751 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
752 		    *((u_int *)tf->tf_pc));
753 	}
754 	disassemble(tf->tf_pc);
755 
756 	/* Die now if this happened in kernel mode */
757 	if (!TRAP_USERMODE(tf))
758 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
759 
760 	return (error);
761 #else
762 	return (ABORT_FIXUP_OK);
763 #endif /* CPU_ABORT_FIXUP_REQUIRED */
764 }
765 
766 /*
767  * void prefetch_abort_handler(trapframe_t *tf)
768  *
769  * Abort handler called when instruction execution occurs at
770  * a non existent or restricted (access permissions) memory page.
771  * If the address is invalid and we were in SVC mode then panic as
772  * the kernel should never prefetch abort.
773  * If the address is invalid and the page is mapped then the user process
774  * does no have read permission so send it a signal.
775  * Otherwise fault the page in and try again.
776  */
777 void
778 prefetch_abort_handler(trapframe_t *tf)
779 {
780 	struct lwp *l;
781 	struct pcb *pcb __diagused;
782 	struct vm_map *map;
783 	vaddr_t fault_pc, va;
784 	ksiginfo_t ksi;
785 	int error, user;
786 
787 	UVMHIST_FUNC(__func__);
788 	UVMHIST_CALLED(maphist);
789 
790 	/* Update vmmeter statistics */
791 	curcpu()->ci_data.cpu_ntrap++;
792 
793 	l = curlwp;
794 	pcb = lwp_getpcb(l);
795 
796 	if ((user = TRAP_USERMODE(tf)) != 0)
797 		LWP_CACHE_CREDS(l, l->l_proc);
798 
799 	/*
800 	 * Enable IRQ's (disabled by the abort) This always comes
801 	 * from user mode so we know interrupts were not disabled.
802 	 * But we check anyway.
803 	 */
804 	KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
805 #ifdef __NO_FIQ
806 	if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
807 		restore_interrupts(tf->tf_spsr & IF32_bits);
808 #else
809 	if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
810 		restore_interrupts(tf->tf_spsr & IF32_bits);
811 #endif
812 
813 	/* See if the CPU state needs to be fixed up */
814 	switch (prefetch_abort_fixup(tf)) {
815 	case ABORT_FIXUP_RETURN:
816 		KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
817 		return;
818 	case ABORT_FIXUP_FAILED:
819 		/* Deliver a SIGILL to the process */
820 		KSI_INIT_TRAP(&ksi);
821 		ksi.ksi_signo = SIGILL;
822 		ksi.ksi_code = ILL_ILLOPC;
823 		ksi.ksi_addr = (uint32_t *)(intptr_t) tf->tf_pc;
824 		KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf,
825 		    lwp_trapframe(l));
826 		goto do_trapsignal;
827 	default:
828 		break;
829 	}
830 
831 	/* Prefetch aborts cannot happen in kernel mode */
832 	if (__predict_false(!user))
833 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
834 
835 	/* Get fault address */
836 	fault_pc = tf->tf_pc;
837 	KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf, lwp_trapframe(l));
838 	UVMHIST_LOG(maphist, " (pc=0x%jx, l=0x%#jx, tf=0x%#jx)",
839 	    fault_pc, (uintptr_t)l, (uintptr_t)tf, 0);
840 
841 	/* Ok validate the address, can only execute in USER space */
842 	if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
843 	    (fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
844 		KSI_INIT_TRAP(&ksi);
845 		ksi.ksi_signo = SIGSEGV;
846 		ksi.ksi_code = SEGV_ACCERR;
847 		ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
848 		ksi.ksi_trap = fault_pc;
849 		goto do_trapsignal;
850 	}
851 
852 	map = &l->l_proc->p_vmspace->vm_map;
853 	va = trunc_page(fault_pc);
854 
855 	/*
856 	 * See if the pmap can handle this fault on its own...
857 	 */
858 #ifdef DEBUG
859 	last_fault_code = -1;
860 #endif
861 	if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ|VM_PROT_EXECUTE, 1)) {
862 		UVMHIST_LOG (maphist, " <- emulated", 0, 0, 0, 0);
863 		goto out;
864 	}
865 
866 #ifdef DIAGNOSTIC
867 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
868 		printf("\nNon-emulated prefetch abort with intr_depth > 0\n");
869 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
870 	}
871 #endif
872 
873 	KASSERT(pcb->pcb_onfault == NULL);
874 	error = uvm_fault(map, va, VM_PROT_READ|VM_PROT_EXECUTE);
875 
876 	if (__predict_true(error == 0)) {
877 		UVMHIST_LOG (maphist, " <- uvm", 0, 0, 0, 0);
878 		goto out;
879 	}
880 	KSI_INIT_TRAP(&ksi);
881 
882 	UVMHIST_LOG (maphist, " <- fatal (%jd)", error, 0, 0, 0);
883 
884 	if (error == ENOMEM) {
885 		printf("UVM: pid %d (%s), uid %d killed: "
886 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
887 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
888 		ksi.ksi_signo = SIGKILL;
889 	} else
890 		ksi.ksi_signo = SIGSEGV;
891 
892 	ksi.ksi_code = SEGV_MAPERR;
893 	ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
894 	ksi.ksi_trap = fault_pc;
895 
896 do_trapsignal:
897 	call_trapsignal(l, tf, &ksi);
898 
899 out:
900 	KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
901 	userret(l);
902 }
903 
904 /*
905  * Tentatively read an 8, 16, or 32-bit value from 'addr'.
906  * If the read succeeds, the value is written to 'rptr' and zero is returned.
907  * Else, return EFAULT.
908  */
909 int
910 badaddr_read(void *addr, size_t size, void *rptr)
911 {
912 	extern int badaddr_read_1(const uint8_t *, uint8_t *);
913 	extern int badaddr_read_2(const uint16_t *, uint16_t *);
914 	extern int badaddr_read_4(const uint32_t *, uint32_t *);
915 	union {
916 		uint8_t v1;
917 		uint16_t v2;
918 		uint32_t v4;
919 	} u;
920 	int rv, s;
921 
922 	cpu_drain_writebuf();
923 
924 	s = splhigh();
925 
926 	/* Read from the test address. */
927 	switch (size) {
928 	case sizeof(uint8_t):
929 		rv = badaddr_read_1(addr, &u.v1);
930 		if (rv == 0 && rptr)
931 			*(uint8_t *) rptr = u.v1;
932 		break;
933 
934 	case sizeof(uint16_t):
935 		rv = badaddr_read_2(addr, &u.v2);
936 		if (rv == 0 && rptr)
937 			*(uint16_t *) rptr = u.v2;
938 		break;
939 
940 	case sizeof(uint32_t):
941 		rv = badaddr_read_4(addr, &u.v4);
942 		if (rv == 0 && rptr)
943 			*(uint32_t *) rptr = u.v4;
944 		break;
945 
946 	default:
947 		panic("%s: invalid size (%zu)", __func__, size);
948 	}
949 
950 	splx(s);
951 
952 	/* Return EFAULT if the address was invalid, else zero */
953 	return (rv);
954 }
955