xref: /netbsd-src/sys/arch/arm/arm32/fault.c (revision cac8e449158efc7261bebc8657cbb0125a2cfdde)
1 /*	$NetBSD: fault.c,v 1.68 2008/05/21 14:10:28 ad Exp $	*/
2 
3 /*
4  * Copyright 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 /*
38  * Copyright (c) 1994-1997 Mark Brinicombe.
39  * Copyright (c) 1994 Brini.
40  * All rights reserved.
41  *
42  * This code is derived from software written for Brini by Mark Brinicombe
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Brini.
55  * 4. The name of the company nor the name of the author may be used to
56  *    endorse or promote products derived from this software without specific
57  *    prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  * RiscBSD kernel project
72  *
73  * fault.c
74  *
75  * Fault handlers
76  *
77  * Created      : 28/11/94
78  */
79 
80 #include "opt_ddb.h"
81 #include "opt_kgdb.h"
82 
83 #include <sys/types.h>
84 __KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.68 2008/05/21 14:10:28 ad Exp $");
85 
86 #include <sys/param.h>
87 #include <sys/systm.h>
88 #include <sys/proc.h>
89 #include <sys/user.h>
90 #include <sys/kernel.h>
91 #include <sys/kauth.h>
92 #include <sys/cpu.h>
93 
94 #include <uvm/uvm_extern.h>
95 #include <uvm/uvm_stat.h>
96 #ifdef UVMHIST
97 #include <uvm/uvm.h>
98 #endif
99 
100 #include <arm/cpuconf.h>
101 
102 #include <machine/frame.h>
103 #include <arm/arm32/katelib.h>
104 #include <machine/intr.h>
105 #if defined(DDB) || defined(KGDB)
106 #include <machine/db_machdep.h>
107 #ifdef KGDB
108 #include <sys/kgdb.h>
109 #endif
110 #if !defined(DDB)
111 #define kdb_trap	kgdb_trap
112 #endif
113 #endif
114 
115 #include <arch/arm/arm/disassem.h>
116 #include <arm/arm32/machdep.h>
117 
118 extern char fusubailout[];
119 
120 #ifdef DEBUG
121 int last_fault_code;	/* For the benefit of pmap_fault_fixup() */
122 #endif
123 
124 #if defined(CPU_ARM3) || defined(CPU_ARM6) || \
125     defined(CPU_ARM7) || defined(CPU_ARM7TDMI)
126 /* These CPUs may need data/prefetch abort fixups */
127 #define	CPU_ABORT_FIXUP_REQUIRED
128 #endif
129 
130 struct data_abort {
131 	int (*func)(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
132 	const char *desc;
133 };
134 
135 static int dab_fatal(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
136 static int dab_align(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
137 static int dab_buserr(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
138 
139 static const struct data_abort data_aborts[] = {
140 	{dab_fatal,	"Vector Exception"},
141 	{dab_align,	"Alignment Fault 1"},
142 	{dab_fatal,	"Terminal Exception"},
143 	{dab_align,	"Alignment Fault 3"},
144 	{dab_buserr,	"External Linefetch Abort (S)"},
145 	{NULL,		"Translation Fault (S)"},
146 	{dab_buserr,	"External Linefetch Abort (P)"},
147 	{NULL,		"Translation Fault (P)"},
148 	{dab_buserr,	"External Non-Linefetch Abort (S)"},
149 	{NULL,		"Domain Fault (S)"},
150 	{dab_buserr,	"External Non-Linefetch Abort (P)"},
151 	{NULL,		"Domain Fault (P)"},
152 	{dab_buserr,	"External Translation Abort (L1)"},
153 	{NULL,		"Permission Fault (S)"},
154 	{dab_buserr,	"External Translation Abort (L2)"},
155 	{NULL,		"Permission Fault (P)"}
156 };
157 
158 /* Determine if a fault came from user mode */
159 #define	TRAP_USERMODE(tf)	((tf->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
160 
161 /* Determine if 'x' is a permission fault */
162 #define	IS_PERMISSION_FAULT(x)					\
163 	(((1 << ((x) & FAULT_TYPE_MASK)) &			\
164 	  ((1 << FAULT_PERM_P) | (1 << FAULT_PERM_S))) != 0)
165 
166 #if 0
167 /* maybe one day we'll do emulations */
168 #define	TRAPSIGNAL(l,k)	(*(l)->l_proc->p_emul->e_trapsignal)((l), (k))
169 #else
170 #define	TRAPSIGNAL(l,k)	trapsignal((l), (k))
171 #endif
172 
173 static inline void
174 call_trapsignal(struct lwp *l, ksiginfo_t *ksi)
175 {
176 
177 	TRAPSIGNAL(l, ksi);
178 }
179 
180 static inline int
181 data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l)
182 {
183 #ifdef CPU_ABORT_FIXUP_REQUIRED
184 	int error;
185 
186 	/* Call the CPU specific data abort fixup routine */
187 	error = cpu_dataabt_fixup(tf);
188 	if (__predict_true(error != ABORT_FIXUP_FAILED))
189 		return (error);
190 
191 	/*
192 	 * Oops, couldn't fix up the instruction
193 	 */
194 	printf("data_abort_fixup: fixup for %s mode data abort failed.\n",
195 	    TRAP_USERMODE(tf) ? "user" : "kernel");
196 #ifdef THUMB_CODE
197 	if (tf->tf_spsr & PSR_T_bit) {
198 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
199 		    tf->tf_pc, *((u_int16 *)(tf->tf_pc & ~1)),
200 		    *((u_int16 *)((tf->tf_pc + 2) & ~1)));
201 	}
202 	else
203 #endif
204 	{
205 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
206 		    *((u_int *)tf->tf_pc));
207 	}
208 	disassemble(tf->tf_pc);
209 
210 	/* Die now if this happened in kernel mode */
211 	if (!TRAP_USERMODE(tf))
212 		dab_fatal(tf, fsr, far, l, NULL);
213 
214 	return (error);
215 #else
216 	return (ABORT_FIXUP_OK);
217 #endif /* CPU_ABORT_FIXUP_REQUIRED */
218 }
219 
220 void
221 data_abort_handler(trapframe_t *tf)
222 {
223 	struct vm_map *map;
224 	struct pcb *pcb;
225 	struct lwp *l;
226 	u_int user, far, fsr;
227 	vm_prot_t ftype;
228 	void *onfault;
229 	vaddr_t va;
230 	int error;
231 	ksiginfo_t ksi;
232 
233 	UVMHIST_FUNC("data_abort_handler");
234 
235 	/* Grab FAR/FSR before enabling interrupts */
236 	far = cpu_faultaddress();
237 	fsr = cpu_faultstatus();
238 
239 	UVMHIST_CALLED(maphist);
240 	/* Update vmmeter statistics */
241 	uvmexp.traps++;
242 
243 	/* Re-enable interrupts if they were enabled previously */
244 	if (__predict_true((tf->tf_spsr & I32_bit) == 0))
245 		enable_interrupts(I32_bit);
246 
247 	/* Get the current lwp structure */
248 	KASSERT(curlwp != NULL);
249 	l = curlwp;
250 
251 	UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, far=0x%x, fsr=0x%x)",
252 	    tf->tf_pc, l, far, fsr);
253 
254 	/* Data abort came from user mode? */
255 	if ((user = TRAP_USERMODE(tf)) != 0)
256 		LWP_CACHE_CREDS(l, l->l_proc);
257 
258 	/* Grab the current pcb */
259 	pcb = &l->l_addr->u_pcb;
260 
261 	/* Invoke the appropriate handler, if necessary */
262 	if (__predict_false(data_aborts[fsr & FAULT_TYPE_MASK].func != NULL)) {
263 		if ((data_aborts[fsr & FAULT_TYPE_MASK].func)(tf, fsr, far,
264 		    l, &ksi))
265 			goto do_trapsignal;
266 		goto out;
267 	}
268 
269 	/*
270 	 * At this point, we're dealing with one of the following data aborts:
271 	 *
272 	 *  FAULT_TRANS_S  - Translation -- Section
273 	 *  FAULT_TRANS_P  - Translation -- Page
274 	 *  FAULT_DOMAIN_S - Domain -- Section
275 	 *  FAULT_DOMAIN_P - Domain -- Page
276 	 *  FAULT_PERM_S   - Permission -- Section
277 	 *  FAULT_PERM_P   - Permission -- Page
278 	 *
279 	 * These are the main virtual memory-related faults signalled by
280 	 * the MMU.
281 	 */
282 
283 	/* fusubailout is used by [fs]uswintr to avoid page faulting */
284 	if (__predict_false(pcb->pcb_onfault == fusubailout)) {
285 		tf->tf_r0 = EFAULT;
286 		tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
287 		return;
288 	}
289 
290 	if (user)
291 		l->l_addr->u_pcb.pcb_tf = tf;
292 
293 	/*
294 	 * Make sure the Program Counter is sane. We could fall foul of
295 	 * someone executing Thumb code, in which case the PC might not
296 	 * be word-aligned. This would cause a kernel alignment fault
297 	 * further down if we have to decode the current instruction.
298 	 */
299 #ifdef THUMB_CODE
300 	/*
301 	 * XXX: It would be nice to be able to support Thumb in the kernel
302 	 * at some point.
303 	 */
304 	if (__predict_false(!user && (tf->tf_pc & 3) != 0)) {
305 		printf("\ndata_abort_fault: Misaligned Kernel-mode "
306 		    "Program Counter\n");
307 		dab_fatal(tf, fsr, far, l, NULL);
308 	}
309 #else
310 	if (__predict_false((tf->tf_pc & 3) != 0)) {
311 		if (user) {
312 			/*
313 			 * Give the user an illegal instruction signal.
314 			 */
315 			/* Deliver a SIGILL to the process */
316 			KSI_INIT_TRAP(&ksi);
317 			ksi.ksi_signo = SIGILL;
318 			ksi.ksi_code = ILL_ILLOPC;
319 			ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
320 			ksi.ksi_trap = fsr;
321 			goto do_trapsignal;
322 		}
323 
324 		/*
325 		 * The kernel never executes Thumb code.
326 		 */
327 		printf("\ndata_abort_fault: Misaligned Kernel-mode "
328 		    "Program Counter\n");
329 		dab_fatal(tf, fsr, far, l, NULL);
330 	}
331 #endif
332 
333 	/* See if the CPU state needs to be fixed up */
334 	switch (data_abort_fixup(tf, fsr, far, l)) {
335 	case ABORT_FIXUP_RETURN:
336 		return;
337 	case ABORT_FIXUP_FAILED:
338 		/* Deliver a SIGILL to the process */
339 		KSI_INIT_TRAP(&ksi);
340 		ksi.ksi_signo = SIGILL;
341 		ksi.ksi_code = ILL_ILLOPC;
342 		ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
343 		ksi.ksi_trap = fsr;
344 		goto do_trapsignal;
345 	default:
346 		break;
347 	}
348 
349 	va = trunc_page((vaddr_t)far);
350 
351 	/*
352 	 * It is only a kernel address space fault iff:
353 	 *	1. user == 0  and
354 	 *	2. pcb_onfault not set or
355 	 *	3. pcb_onfault set and not LDRT/LDRBT/STRT/STRBT instruction.
356 	 */
357 	if (user == 0 && (va >= VM_MIN_KERNEL_ADDRESS ||
358 	    (va < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW)) &&
359 	    __predict_true((pcb->pcb_onfault == NULL ||
360 	     (ReadWord(tf->tf_pc) & 0x05200000) != 0x04200000))) {
361 		map = kernel_map;
362 
363 		/* Was the fault due to the FPE/IPKDB ? */
364 		if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
365 			KSI_INIT_TRAP(&ksi);
366 			ksi.ksi_signo = SIGSEGV;
367 			ksi.ksi_code = SEGV_ACCERR;
368 			ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
369 			ksi.ksi_trap = fsr;
370 
371 			/*
372 			 * Force exit via userret()
373 			 * This is necessary as the FPE is an extension to
374 			 * userland that actually runs in a priveledged mode
375 			 * but uses USR mode permissions for its accesses.
376 			 */
377 			user = 1;
378 			goto do_trapsignal;
379 		}
380 	} else
381 		map = &l->l_proc->p_vmspace->vm_map;
382 
383 	/*
384 	 * We need to know whether the page should be mapped
385 	 * as R or R/W. The MMU does not give us the info as
386 	 * to whether the fault was caused by a read or a write.
387 	 *
388 	 * However, we know that a permission fault can only be
389 	 * the result of a write to a read-only location, so
390 	 * we can deal with those quickly.
391 	 *
392 	 * Otherwise we need to disassemble the instruction
393 	 * responsible to determine if it was a write.
394 	 */
395 	if (IS_PERMISSION_FAULT(fsr))
396 		ftype = VM_PROT_WRITE;
397 	else {
398 #ifdef THUMB_CODE
399 		/* Fast track the ARM case.  */
400 		if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
401 			u_int insn = fusword((void *)(tf->tf_pc & ~1));
402 			u_int insn_f8 = insn & 0xf800;
403 			u_int insn_fe = insn & 0xfe00;
404 
405 			if (insn_f8 == 0x6000 || /* STR(1) */
406 			    insn_f8 == 0x7000 || /* STRB(1) */
407 			    insn_f8 == 0x8000 || /* STRH(1) */
408 			    insn_f8 == 0x9000 || /* STR(3) */
409 			    insn_f8 == 0xc000 || /* STM */
410 			    insn_fe == 0x5000 || /* STR(2) */
411 			    insn_fe == 0x5200 || /* STRH(2) */
412 			    insn_fe == 0x5400)   /* STRB(2) */
413 				ftype = VM_PROT_WRITE;
414 			else
415 				ftype = VM_PROT_READ;
416 		}
417 		else
418 #endif
419 		{
420 			u_int insn = ReadWord(tf->tf_pc);
421 
422 			if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
423 			    ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
424 			    ((insn & 0x0a100000) == 0x08000000))   /* STM/CDT*/
425 				ftype = VM_PROT_WRITE;
426 			else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */
427 				ftype = VM_PROT_READ | VM_PROT_WRITE;
428 			else
429 				ftype = VM_PROT_READ;
430 		}
431 	}
432 
433 	/*
434 	 * See if the fault is as a result of ref/mod emulation,
435 	 * or domain mismatch.
436 	 */
437 #ifdef DEBUG
438 	last_fault_code = fsr;
439 #endif
440 	if (pmap_fault_fixup(map->pmap, va, ftype, user)) {
441 		UVMHIST_LOG(maphist, " <- ref/mod emul", 0, 0, 0, 0);
442 		goto out;
443 	}
444 
445 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
446 		if (pcb->pcb_onfault) {
447 			tf->tf_r0 = EINVAL;
448 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
449 			return;
450 		}
451 		printf("\nNon-emulated page fault with intr_depth > 0\n");
452 		dab_fatal(tf, fsr, far, l, NULL);
453 	}
454 
455 	onfault = pcb->pcb_onfault;
456 	pcb->pcb_onfault = NULL;
457 	error = uvm_fault(map, va, ftype);
458 	pcb->pcb_onfault = onfault;
459 
460 	if (__predict_true(error == 0)) {
461 		if (user)
462 			uvm_grow(l->l_proc, va); /* Record any stack growth */
463 		UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0);
464 		goto out;
465 	}
466 
467 	if (user == 0) {
468 		if (pcb->pcb_onfault) {
469 			tf->tf_r0 = error;
470 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
471 			return;
472 		}
473 
474 		printf("\nuvm_fault(%p, %lx, %x) -> %x\n", map, va, ftype,
475 		    error);
476 		dab_fatal(tf, fsr, far, l, NULL);
477 	}
478 
479 	KSI_INIT_TRAP(&ksi);
480 
481 	if (error == ENOMEM) {
482 		printf("UVM: pid %d (%s), uid %d killed: "
483 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
484 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
485 		ksi.ksi_signo = SIGKILL;
486 	} else
487 		ksi.ksi_signo = SIGSEGV;
488 
489 	ksi.ksi_code = (error == EACCES) ? SEGV_ACCERR : SEGV_MAPERR;
490 	ksi.ksi_addr = (u_int32_t *)(intptr_t) far;
491 	ksi.ksi_trap = fsr;
492 	UVMHIST_LOG(maphist, " <- erorr (%d)", error, 0, 0, 0);
493 
494 do_trapsignal:
495 	call_trapsignal(l, &ksi);
496 out:
497 	/* If returning to user mode, make sure to invoke userret() */
498 	if (user)
499 		userret(l);
500 }
501 
502 /*
503  * dab_fatal() handles the following data aborts:
504  *
505  *  FAULT_WRTBUF_0 - Vector Exception
506  *  FAULT_WRTBUF_1 - Terminal Exception
507  *
508  * We should never see these on a properly functioning system.
509  *
510  * This function is also called by the other handlers if they
511  * detect a fatal problem.
512  *
513  * Note: If 'l' is NULL, we assume we're dealing with a prefetch abort.
514  */
515 static int
516 dab_fatal(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
517 {
518 	const char *mode;
519 
520 	mode = TRAP_USERMODE(tf) ? "user" : "kernel";
521 
522 	if (l != NULL) {
523 		printf("Fatal %s mode data abort: '%s'\n", mode,
524 		    data_aborts[fsr & FAULT_TYPE_MASK].desc);
525 		printf("trapframe: %p\nFSR=%08x, FAR=", tf, fsr);
526 		if ((fsr & FAULT_IMPRECISE) == 0)
527 			printf("%08x, ", far);
528 		else
529 			printf("Invalid,  ");
530 		printf("spsr=%08x\n", tf->tf_spsr);
531 	} else {
532 		printf("Fatal %s mode prefetch abort at 0x%08x\n",
533 		    mode, tf->tf_pc);
534 		printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
535 	}
536 
537 	printf("r0 =%08x, r1 =%08x, r2 =%08x, r3 =%08x\n",
538 	    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
539 	printf("r4 =%08x, r5 =%08x, r6 =%08x, r7 =%08x\n",
540 	    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
541 	printf("r8 =%08x, r9 =%08x, r10=%08x, r11=%08x\n",
542 	    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
543 	printf("r12=%08x, ", tf->tf_r12);
544 
545 	if (TRAP_USERMODE(tf))
546 		printf("usp=%08x, ulr=%08x",
547 		    tf->tf_usr_sp, tf->tf_usr_lr);
548 	else
549 		printf("ssp=%08x, slr=%08x",
550 		    tf->tf_svc_sp, tf->tf_svc_lr);
551 	printf(", pc =%08x\n\n", tf->tf_pc);
552 
553 #if defined(DDB) || defined(KGDB)
554 	kdb_trap(T_FAULT, tf);
555 #endif
556 	panic("Fatal abort");
557 	/*NOTREACHED*/
558 }
559 
560 /*
561  * dab_align() handles the following data aborts:
562  *
563  *  FAULT_ALIGN_0 - Alignment fault
564  *  FAULT_ALIGN_0 - Alignment fault
565  *
566  * These faults are fatal if they happen in kernel mode. Otherwise, we
567  * deliver a bus error to the process.
568  */
569 static int
570 dab_align(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
571 {
572 
573 	/* Alignment faults are always fatal if they occur in kernel mode */
574 	if (!TRAP_USERMODE(tf))
575 		dab_fatal(tf, fsr, far, l, NULL);
576 
577 	/* pcb_onfault *must* be NULL at this point */
578 	KDASSERT(l->l_addr->u_pcb.pcb_onfault == NULL);
579 
580 	/* See if the CPU state needs to be fixed up */
581 	(void) data_abort_fixup(tf, fsr, far, l);
582 
583 	/* Deliver a bus error signal to the process */
584 	KSI_INIT_TRAP(ksi);
585 	ksi->ksi_signo = SIGBUS;
586 	ksi->ksi_code = BUS_ADRALN;
587 	ksi->ksi_addr = (u_int32_t *)(intptr_t)far;
588 	ksi->ksi_trap = fsr;
589 
590 	l->l_addr->u_pcb.pcb_tf = tf;
591 
592 	return (1);
593 }
594 
595 /*
596  * dab_buserr() handles the following data aborts:
597  *
598  *  FAULT_BUSERR_0 - External Abort on Linefetch -- Section
599  *  FAULT_BUSERR_1 - External Abort on Linefetch -- Page
600  *  FAULT_BUSERR_2 - External Abort on Non-linefetch -- Section
601  *  FAULT_BUSERR_3 - External Abort on Non-linefetch -- Page
602  *  FAULT_BUSTRNL1 - External abort on Translation -- Level 1
603  *  FAULT_BUSTRNL2 - External abort on Translation -- Level 2
604  *
605  * If pcb_onfault is set, flag the fault and return to the handler.
606  * If the fault occurred in user mode, give the process a SIGBUS.
607  *
608  * Note: On XScale, FAULT_BUSERR_0, FAULT_BUSERR_1, and FAULT_BUSERR_2
609  * can be flagged as imprecise in the FSR. This causes a real headache
610  * since some of the machine state is lost. In this case, tf->tf_pc
611  * may not actually point to the offending instruction. In fact, if
612  * we've taken a double abort fault, it generally points somewhere near
613  * the top of "data_abort_entry" in exception.S.
614  *
615  * In all other cases, these data aborts are considered fatal.
616  */
617 static int
618 dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l,
619     ksiginfo_t *ksi)
620 {
621 	struct pcb *pcb = &l->l_addr->u_pcb;
622 
623 #ifdef __XSCALE__
624 	if ((fsr & FAULT_IMPRECISE) != 0 &&
625 	    (tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
626 		/*
627 		 * Oops, an imprecise, double abort fault. We've lost the
628 		 * r14_abt/spsr_abt values corresponding to the original
629 		 * abort, and the spsr saved in the trapframe indicates
630 		 * ABT mode.
631 		 */
632 		tf->tf_spsr &= ~PSR_MODE;
633 
634 		/*
635 		 * We use a simple heuristic to determine if the double abort
636 		 * happened as a result of a kernel or user mode access.
637 		 * If the current trapframe is at the top of the kernel stack,
638 		 * the fault _must_ have come from user mode.
639 		 */
640 		if (tf != ((trapframe_t *)pcb->pcb_un.un_32.pcb32_sp) - 1) {
641 			/*
642 			 * Kernel mode. We're either about to die a
643 			 * spectacular death, or pcb_onfault will come
644 			 * to our rescue. Either way, the current value
645 			 * of tf->tf_pc is irrelevant.
646 			 */
647 			tf->tf_spsr |= PSR_SVC32_MODE;
648 			if (pcb->pcb_onfault == NULL)
649 				printf("\nKernel mode double abort!\n");
650 		} else {
651 			/*
652 			 * User mode. We've lost the program counter at the
653 			 * time of the fault (not that it was accurate anyway;
654 			 * it's not called an imprecise fault for nothing).
655 			 * About all we can do is copy r14_usr to tf_pc and
656 			 * hope for the best. The process is about to get a
657 			 * SIGBUS, so it's probably history anyway.
658 			 */
659 			tf->tf_spsr |= PSR_USR32_MODE;
660 			tf->tf_pc = tf->tf_usr_lr;
661 #ifdef THUMB_CODE
662 			tf->tf_spsr &= ~PSR_T_bit;
663 			if (tf->tf_usr_lr & 1)
664 				tf->tf_spsr |= PSR_T_bit;
665 #endif
666 		}
667 	}
668 
669 	/* FAR is invalid for imprecise exceptions */
670 	if ((fsr & FAULT_IMPRECISE) != 0)
671 		far = 0;
672 #endif /* __XSCALE__ */
673 
674 	if (pcb->pcb_onfault) {
675 		KDASSERT(TRAP_USERMODE(tf) == 0);
676 		tf->tf_r0 = EFAULT;
677 		tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
678 		return (0);
679 	}
680 
681 	/* See if the CPU state needs to be fixed up */
682 	(void) data_abort_fixup(tf, fsr, far, l);
683 
684 	/*
685 	 * At this point, if the fault happened in kernel mode, we're toast
686 	 */
687 	if (!TRAP_USERMODE(tf))
688 		dab_fatal(tf, fsr, far, l, NULL);
689 
690 	/* Deliver a bus error signal to the process */
691 	KSI_INIT_TRAP(ksi);
692 	ksi->ksi_signo = SIGBUS;
693 	ksi->ksi_code = BUS_ADRERR;
694 	ksi->ksi_addr = (u_int32_t *)(intptr_t)far;
695 	ksi->ksi_trap = fsr;
696 
697 	l->l_addr->u_pcb.pcb_tf = tf;
698 
699 	return (1);
700 }
701 
702 static inline int
703 prefetch_abort_fixup(trapframe_t *tf)
704 {
705 #ifdef CPU_ABORT_FIXUP_REQUIRED
706 	int error;
707 
708 	/* Call the CPU specific prefetch abort fixup routine */
709 	error = cpu_prefetchabt_fixup(tf);
710 	if (__predict_true(error != ABORT_FIXUP_FAILED))
711 		return (error);
712 
713 	/*
714 	 * Oops, couldn't fix up the instruction
715 	 */
716 	printf(
717 	    "prefetch_abort_fixup: fixup for %s mode prefetch abort failed.\n",
718 	    TRAP_USERMODE(tf) ? "user" : "kernel");
719 #ifdef THUMB_CODE
720 	if (tf->tf_spsr & PSR_T_bit) {
721 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
722 		    tf->tf_pc, *((u_int16 *)(tf->tf_pc & ~1),
723 		    *((u_int16 *)((tf->tf_pc + 2) & ~1));
724 	}
725 	else
726 #endif
727 	{
728 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
729 		    *((u_int *)tf->tf_pc));
730 	}
731 	disassemble(tf->tf_pc);
732 
733 	/* Die now if this happened in kernel mode */
734 	if (!TRAP_USERMODE(tf))
735 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
736 
737 	return (error);
738 #else
739 	return (ABORT_FIXUP_OK);
740 #endif /* CPU_ABORT_FIXUP_REQUIRED */
741 }
742 
743 /*
744  * void prefetch_abort_handler(trapframe_t *tf)
745  *
746  * Abort handler called when instruction execution occurs at
747  * a non existent or restricted (access permissions) memory page.
748  * If the address is invalid and we were in SVC mode then panic as
749  * the kernel should never prefetch abort.
750  * If the address is invalid and the page is mapped then the user process
751  * does no have read permission so send it a signal.
752  * Otherwise fault the page in and try again.
753  */
754 void
755 prefetch_abort_handler(trapframe_t *tf)
756 {
757 	struct lwp *l;
758 	struct vm_map *map;
759 	vaddr_t fault_pc, va;
760 	ksiginfo_t ksi;
761 	int error, user;
762 
763 	UVMHIST_FUNC("prefetch_abort_handler"); UVMHIST_CALLED(maphist);
764 
765 	/* Update vmmeter statistics */
766 	uvmexp.traps++;
767 
768 	l = curlwp;
769 
770 	if ((user = TRAP_USERMODE(tf)) != 0)
771 		LWP_CACHE_CREDS(l, l->l_proc);
772 
773 	/*
774 	 * Enable IRQ's (disabled by the abort) This always comes
775 	 * from user mode so we know interrupts were not disabled.
776 	 * But we check anyway.
777 	 */
778 	if (__predict_true((tf->tf_spsr & I32_bit) == 0))
779 		enable_interrupts(I32_bit);
780 
781 	/* See if the CPU state needs to be fixed up */
782 	switch (prefetch_abort_fixup(tf)) {
783 	case ABORT_FIXUP_RETURN:
784 		return;
785 	case ABORT_FIXUP_FAILED:
786 		/* Deliver a SIGILL to the process */
787 		KSI_INIT_TRAP(&ksi);
788 		ksi.ksi_signo = SIGILL;
789 		ksi.ksi_code = ILL_ILLOPC;
790 		ksi.ksi_addr = (u_int32_t *)(intptr_t) tf->tf_pc;
791 		l->l_addr->u_pcb.pcb_tf = tf;
792 		goto do_trapsignal;
793 	default:
794 		break;
795 	}
796 
797 	/* Prefetch aborts cannot happen in kernel mode */
798 	if (__predict_false(!user))
799 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
800 
801 	/* Get fault address */
802 	fault_pc = tf->tf_pc;
803 	l = curlwp;
804 	l->l_addr->u_pcb.pcb_tf = tf;
805 	UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, tf=0x%x)", fault_pc, l, tf,
806 	    0);
807 
808 	/* Ok validate the address, can only execute in USER space */
809 	if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
810 	    (fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
811 		KSI_INIT_TRAP(&ksi);
812 		ksi.ksi_signo = SIGSEGV;
813 		ksi.ksi_code = SEGV_ACCERR;
814 		ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc;
815 		ksi.ksi_trap = fault_pc;
816 		goto do_trapsignal;
817 	}
818 
819 	map = &l->l_proc->p_vmspace->vm_map;
820 	va = trunc_page(fault_pc);
821 
822 	/*
823 	 * See if the pmap can handle this fault on its own...
824 	 */
825 #ifdef DEBUG
826 	last_fault_code = -1;
827 #endif
828 	if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ, 1)) {
829 		UVMHIST_LOG (maphist, " <- emulated", 0, 0, 0, 0);
830 		goto out;
831 	}
832 
833 #ifdef DIAGNOSTIC
834 	if (__predict_false(l->l_cpu->ci_intr_depth > 0)) {
835 		printf("\nNon-emulated prefetch abort with intr_depth > 0\n");
836 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
837 	}
838 #endif
839 	error = uvm_fault(map, va, VM_PROT_READ);
840 
841 	if (__predict_true(error == 0)) {
842 		UVMHIST_LOG (maphist, " <- uvm", 0, 0, 0, 0);
843 		goto out;
844 	}
845 	KSI_INIT_TRAP(&ksi);
846 
847 	UVMHIST_LOG (maphist, " <- fatal (%d)", error, 0, 0, 0);
848 	if (error == ENOMEM) {
849 		printf("UVM: pid %d (%s), uid %d killed: "
850 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
851 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
852 		ksi.ksi_signo = SIGKILL;
853 	} else
854 		ksi.ksi_signo = SIGSEGV;
855 
856 	ksi.ksi_code = SEGV_MAPERR;
857 	ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc;
858 	ksi.ksi_trap = fault_pc;
859 
860 do_trapsignal:
861 	call_trapsignal(l, &ksi);
862 
863 out:
864 	userret(l);
865 }
866 
867 /*
868  * Tentatively read an 8, 16, or 32-bit value from 'addr'.
869  * If the read succeeds, the value is written to 'rptr' and zero is returned.
870  * Else, return EFAULT.
871  */
872 int
873 badaddr_read(void *addr, size_t size, void *rptr)
874 {
875 	extern int badaddr_read_1(const uint8_t *, uint8_t *);
876 	extern int badaddr_read_2(const uint16_t *, uint16_t *);
877 	extern int badaddr_read_4(const uint32_t *, uint32_t *);
878 	union {
879 		uint8_t v1;
880 		uint16_t v2;
881 		uint32_t v4;
882 	} u;
883 	struct pcb *curpcb_save;
884 	int rv, s;
885 
886 	cpu_drain_writebuf();
887 
888 	/*
889 	 * We might be called at interrupt time, so arrange to steal
890 	 * lwp0's PCB temporarily, if required, so that pcb_onfault
891 	 * handling works correctly.
892 	 */
893 	s = splhigh();
894 	if ((curpcb_save = curpcb) == NULL)
895 		curpcb = &lwp0.l_addr->u_pcb;
896 
897 	/* Read from the test address. */
898 	switch (size) {
899 	case sizeof(uint8_t):
900 		rv = badaddr_read_1(addr, &u.v1);
901 		if (rv == 0 && rptr)
902 			*(uint8_t *) rptr = u.v1;
903 		break;
904 
905 	case sizeof(uint16_t):
906 		rv = badaddr_read_2(addr, &u.v2);
907 		if (rv == 0 && rptr)
908 			*(uint16_t *) rptr = u.v2;
909 		break;
910 
911 	case sizeof(uint32_t):
912 		rv = badaddr_read_4(addr, &u.v4);
913 		if (rv == 0 && rptr)
914 			*(uint32_t *) rptr = u.v4;
915 		break;
916 
917 	default:
918 		curpcb = curpcb_save;
919 		panic("badaddr: invalid size (%lu)", (u_long) size);
920 	}
921 
922 	/* Restore curpcb */
923 	curpcb = curpcb_save;
924 	splx(s);
925 
926 	/* Return EFAULT if the address was invalid, else zero */
927 	return (rv);
928 }
929