xref: /netbsd-src/sys/arch/arm/arm32/fault.c (revision b7b7574d3bf8eeb51a1fa3977b59142ec6434a55)
1 /*	$NetBSD: fault.c,v 1.100 2014/04/12 09:11:47 skrll Exp $	*/
2 
3 /*
4  * Copyright 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 /*
38  * Copyright (c) 1994-1997 Mark Brinicombe.
39  * Copyright (c) 1994 Brini.
40  * All rights reserved.
41  *
42  * This code is derived from software written for Brini by Mark Brinicombe
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Brini.
55  * 4. The name of the company nor the name of the author may be used to
56  *    endorse or promote products derived from this software without specific
57  *    prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  * RiscBSD kernel project
72  *
73  * fault.c
74  *
75  * Fault handlers
76  *
77  * Created      : 28/11/94
78  */
79 
80 #include "opt_ddb.h"
81 #include "opt_kgdb.h"
82 
83 #include <sys/types.h>
84 __KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.100 2014/04/12 09:11:47 skrll Exp $");
85 
86 #include <sys/param.h>
87 #include <sys/systm.h>
88 #include <sys/proc.h>
89 #include <sys/kernel.h>
90 #include <sys/kauth.h>
91 #include <sys/cpu.h>
92 #include <sys/intr.h>
93 
94 #include <uvm/uvm_extern.h>
95 #include <uvm/uvm_stat.h>
96 #ifdef UVMHIST
97 #include <uvm/uvm.h>
98 #endif
99 
100 #include <arm/locore.h>
101 
102 #include <arm/arm32/katelib.h>
103 
104 #include <machine/pcb.h>
105 #if defined(DDB) || defined(KGDB)
106 #include <machine/db_machdep.h>
107 #ifdef KGDB
108 #include <sys/kgdb.h>
109 #endif
110 #if !defined(DDB)
111 #define kdb_trap	kgdb_trap
112 #endif
113 #endif
114 
115 #include <arch/arm/arm/disassem.h>
116 #include <arm/arm32/machdep.h>
117 
118 extern char fusubailout[];
119 
120 #ifdef DEBUG
121 int last_fault_code;	/* For the benefit of pmap_fault_fixup() */
122 #endif
123 
124 #if defined(CPU_ARM3) || defined(CPU_ARM6) || \
125     defined(CPU_ARM7) || defined(CPU_ARM7TDMI)
126 /* These CPUs may need data/prefetch abort fixups */
127 #define	CPU_ABORT_FIXUP_REQUIRED
128 #endif
129 
130 struct data_abort {
131 	int (*func)(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
132 	const char *desc;
133 };
134 
135 static int dab_fatal(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
136 static int dab_align(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
137 static int dab_buserr(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
138 
139 static const struct data_abort data_aborts[] = {
140 	{dab_fatal,	"Vector Exception"},
141 	{dab_align,	"Alignment Fault 1"},
142 	{dab_fatal,	"Terminal Exception"},
143 	{dab_align,	"Alignment Fault 3"},
144 	{dab_buserr,	"External Linefetch Abort (S)"},
145 	{NULL,		"Translation Fault (S)"},
146 	{dab_buserr,	"External Linefetch Abort (P)"},
147 	{NULL,		"Translation Fault (P)"},
148 	{dab_buserr,	"External Non-Linefetch Abort (S)"},
149 	{NULL,		"Domain Fault (S)"},
150 	{dab_buserr,	"External Non-Linefetch Abort (P)"},
151 	{NULL,		"Domain Fault (P)"},
152 	{dab_buserr,	"External Translation Abort (L1)"},
153 	{NULL,		"Permission Fault (S)"},
154 	{dab_buserr,	"External Translation Abort (L2)"},
155 	{NULL,		"Permission Fault (P)"}
156 };
157 
158 /* Determine if 'x' is a permission fault */
159 #define	IS_PERMISSION_FAULT(x)					\
160 	(((1 << ((x) & FAULT_TYPE_MASK)) &			\
161 	  ((1 << FAULT_PERM_P) | (1 << FAULT_PERM_S))) != 0)
162 
163 #if 0
164 /* maybe one day we'll do emulations */
165 #define	TRAPSIGNAL(l,k)	(*(l)->l_proc->p_emul->e_trapsignal)((l), (k))
166 #else
167 #define	TRAPSIGNAL(l,k)	trapsignal((l), (k))
168 #endif
169 
170 static inline void
171 call_trapsignal(struct lwp *l, const struct trapframe *tf, ksiginfo_t *ksi)
172 {
173 	if (l->l_proc->p_pid == 1 || cpu_printfataltraps) {
174 		printf("%d.%d(%s): trap: signo=%d code=%d addr=%p trap=%#x\n",
175 		    l->l_proc->p_pid, l->l_lid, l->l_proc->p_comm,
176 		    ksi->ksi_signo, ksi->ksi_code, ksi->ksi_addr,
177 		    ksi->ksi_trap);
178 		printf("r0=%08x r1=%08x r2=%08x r3=%08x\n",
179 		    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
180 		printf("r4=%08x r5=%08x r6=%08x r7=%08x\n",
181 		    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
182 		printf("r8=%08x r9=%08x rA=%08x rB=%08x\n",
183 		    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
184 		printf("ip=%08x sp=%08x lr=%08x pc=%08x spsr=%08x\n",
185 		    tf->tf_r12, tf->tf_usr_sp, tf->tf_usr_lr, tf->tf_pc,
186 		    tf->tf_spsr);
187 	}
188 
189 	TRAPSIGNAL(l, ksi);
190 }
191 
192 static inline int
193 data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l)
194 {
195 #ifdef CPU_ABORT_FIXUP_REQUIRED
196 	int error;
197 
198 	/* Call the CPU specific data abort fixup routine */
199 	error = cpu_dataabt_fixup(tf);
200 	if (__predict_true(error != ABORT_FIXUP_FAILED))
201 		return (error);
202 
203 	/*
204 	 * Oops, couldn't fix up the instruction
205 	 */
206 	printf("%s: fixup for %s mode data abort failed.\n", __func__,
207 	    TRAP_USERMODE(tf) ? "user" : "kernel");
208 #ifdef THUMB_CODE
209 	if (tf->tf_spsr & PSR_T_bit) {
210 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
211 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
212 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
213 	}
214 	else
215 #endif
216 	{
217 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
218 		    *((u_int *)tf->tf_pc));
219 	}
220 	disassemble(tf->tf_pc);
221 
222 	/* Die now if this happened in kernel mode */
223 	if (!TRAP_USERMODE(tf))
224 		dab_fatal(tf, fsr, far, l, NULL);
225 
226 	return (error);
227 #else
228 	return (ABORT_FIXUP_OK);
229 #endif /* CPU_ABORT_FIXUP_REQUIRED */
230 }
231 
232 void
233 data_abort_handler(trapframe_t *tf)
234 {
235 	struct vm_map *map;
236 	struct lwp * const l = curlwp;
237 	struct cpu_info * const ci = curcpu();
238 	u_int far, fsr;
239 	vm_prot_t ftype;
240 	void *onfault;
241 	vaddr_t va;
242 	int error;
243 	ksiginfo_t ksi;
244 
245 	UVMHIST_FUNC(__func__);
246 	UVMHIST_CALLED(maphist);
247 
248 	/* Grab FAR/FSR before enabling interrupts */
249 	far = cpu_faultaddress();
250 	fsr = cpu_faultstatus();
251 
252 	/* Update vmmeter statistics */
253 	ci->ci_data.cpu_ntrap++;
254 
255 	/* Re-enable interrupts if they were enabled previously */
256 	KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
257 	if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
258 		restore_interrupts(tf->tf_spsr & IF32_bits);
259 
260 	/* Get the current lwp structure */
261 
262 	UVMHIST_LOG(maphist, " (l=%#x, far=%#x, fsr=%#x",
263 	    l, far, fsr, 0);
264 	UVMHIST_LOG(maphist, "  tf=%#x, pc=%#x)",
265 	    tf, tf->tf_pc, 0, 0);
266 
267 	/* Data abort came from user mode? */
268 	bool user = (TRAP_USERMODE(tf) != 0);
269 	if (user)
270 		LWP_CACHE_CREDS(l, l->l_proc);
271 
272 	/* Grab the current pcb */
273 	struct pcb * const pcb = lwp_getpcb(l);
274 
275 	curcpu()->ci_abt_evs[fsr & FAULT_TYPE_MASK].ev_count++;
276 
277 	/* Invoke the appropriate handler, if necessary */
278 	if (__predict_false(data_aborts[fsr & FAULT_TYPE_MASK].func != NULL)) {
279 #ifdef DIAGNOSTIC
280 		printf("%s: data_aborts fsr=0x%x far=0x%x\n",
281 		    __func__, fsr, far);
282 #endif
283 		if ((data_aborts[fsr & FAULT_TYPE_MASK].func)(tf, fsr, far,
284 		    l, &ksi))
285 			goto do_trapsignal;
286 		goto out;
287 	}
288 
289 	/*
290 	 * At this point, we're dealing with one of the following data aborts:
291 	 *
292 	 *  FAULT_TRANS_S  - Translation -- Section
293 	 *  FAULT_TRANS_P  - Translation -- Page
294 	 *  FAULT_DOMAIN_S - Domain -- Section
295 	 *  FAULT_DOMAIN_P - Domain -- Page
296 	 *  FAULT_PERM_S   - Permission -- Section
297 	 *  FAULT_PERM_P   - Permission -- Page
298 	 *
299 	 * These are the main virtual memory-related faults signalled by
300 	 * the MMU.
301 	 */
302 
303 	/* fusubailout is used by [fs]uswintr to avoid page faulting */
304 	if (__predict_false(pcb->pcb_onfault == fusubailout)) {
305 		tf->tf_r0 = EFAULT;
306 		tf->tf_pc = (intptr_t) pcb->pcb_onfault;
307 		return;
308 	}
309 
310 	if (user) {
311 		lwp_settrapframe(l, tf);
312 	}
313 
314 	/*
315 	 * Make sure the Program Counter is sane. We could fall foul of
316 	 * someone executing Thumb code, in which case the PC might not
317 	 * be word-aligned. This would cause a kernel alignment fault
318 	 * further down if we have to decode the current instruction.
319 	 */
320 #ifdef THUMB_CODE
321 	/*
322 	 * XXX: It would be nice to be able to support Thumb in the kernel
323 	 * at some point.
324 	 */
325 	if (__predict_false(!user && (tf->tf_pc & 3) != 0)) {
326 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
327 		    __func__);
328 		dab_fatal(tf, fsr, far, l, NULL);
329 	}
330 #else
331 	if (__predict_false((tf->tf_pc & 3) != 0)) {
332 		if (user) {
333 			/*
334 			 * Give the user an illegal instruction signal.
335 			 */
336 			/* Deliver a SIGILL to the process */
337 			KSI_INIT_TRAP(&ksi);
338 			ksi.ksi_signo = SIGILL;
339 			ksi.ksi_code = ILL_ILLOPC;
340 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
341 			ksi.ksi_trap = fsr;
342 			goto do_trapsignal;
343 		}
344 
345 		/*
346 		 * The kernel never executes Thumb code.
347 		 */
348 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
349 		    __func__);
350 		dab_fatal(tf, fsr, far, l, NULL);
351 	}
352 #endif
353 
354 	/* See if the CPU state needs to be fixed up */
355 	switch (data_abort_fixup(tf, fsr, far, l)) {
356 	case ABORT_FIXUP_RETURN:
357 		return;
358 	case ABORT_FIXUP_FAILED:
359 		/* Deliver a SIGILL to the process */
360 		KSI_INIT_TRAP(&ksi);
361 		ksi.ksi_signo = SIGILL;
362 		ksi.ksi_code = ILL_ILLOPC;
363 		ksi.ksi_addr = (uint32_t *)(intptr_t) far;
364 		ksi.ksi_trap = fsr;
365 		goto do_trapsignal;
366 	default:
367 		break;
368 	}
369 
370 	va = trunc_page((vaddr_t)far);
371 
372 	/*
373 	 * It is only a kernel address space fault iff:
374 	 *	1. user == 0  and
375 	 *	2. pcb_onfault not set or
376 	 *	3. pcb_onfault set and not LDRT/LDRBT/STRT/STRBT instruction.
377 	 */
378 	if (!user && (va >= VM_MIN_KERNEL_ADDRESS ||
379 	    (va < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW)) &&
380 	    __predict_true((pcb->pcb_onfault == NULL ||
381 	     (read_insn(tf->tf_pc, false) & 0x05200000) != 0x04200000))) {
382 		map = kernel_map;
383 
384 		/* Was the fault due to the FPE/IPKDB ? */
385 		if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
386 			KSI_INIT_TRAP(&ksi);
387 			ksi.ksi_signo = SIGSEGV;
388 			ksi.ksi_code = SEGV_ACCERR;
389 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
390 			ksi.ksi_trap = fsr;
391 
392 			/*
393 			 * Force exit via userret()
394 			 * This is necessary as the FPE is an extension to
395 			 * userland that actually runs in a priveledged mode
396 			 * but uses USR mode permissions for its accesses.
397 			 */
398 			user = true;
399 			goto do_trapsignal;
400 		}
401 	} else {
402 		map = &l->l_proc->p_vmspace->vm_map;
403 	}
404 
405 	/*
406 	 * We need to know whether the page should be mapped as R or R/W.
407 	 * Before ARMv6, the MMU did not give us the info as to whether the
408 	 * fault was caused by a read or a write.
409 	 *
410 	 * However, we know that a permission fault can only be the result of
411 	 * a write to a read-only location, so we can deal with those quickly.
412 	 *
413 	 * Otherwise we need to disassemble the instruction responsible to
414 	 * determine if it was a write.
415 	 */
416 	if (CPU_IS_ARMV6_P() || CPU_IS_ARMV7_P()) {
417 		ftype = (fsr & FAULT_WRITE) ? VM_PROT_WRITE : VM_PROT_READ;
418 	} else if (IS_PERMISSION_FAULT(fsr)) {
419 		ftype = VM_PROT_WRITE;
420 	} else {
421 #ifdef THUMB_CODE
422 		/* Fast track the ARM case.  */
423 		if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
424 			u_int insn = read_thumb_insn(tf->tf_pc, user);
425 			u_int insn_f8 = insn & 0xf800;
426 			u_int insn_fe = insn & 0xfe00;
427 
428 			if (insn_f8 == 0x6000 || /* STR(1) */
429 			    insn_f8 == 0x7000 || /* STRB(1) */
430 			    insn_f8 == 0x8000 || /* STRH(1) */
431 			    insn_f8 == 0x9000 || /* STR(3) */
432 			    insn_f8 == 0xc000 || /* STM */
433 			    insn_fe == 0x5000 || /* STR(2) */
434 			    insn_fe == 0x5200 || /* STRH(2) */
435 			    insn_fe == 0x5400)   /* STRB(2) */
436 				ftype = VM_PROT_WRITE;
437 			else
438 				ftype = VM_PROT_READ;
439 		}
440 		else
441 #endif
442 		{
443 			u_int insn = read_insn(tf->tf_pc, user);
444 
445 			if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
446 			    ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
447 			    ((insn & 0x0a100000) == 0x08000000) || /* STM/CDT*/
448 			    ((insn & 0x0f9000f0) == 0x01800090))   /* STREX[BDH] */
449 				ftype = VM_PROT_WRITE;
450 			else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */
451 				ftype = VM_PROT_READ | VM_PROT_WRITE;
452 			else
453 				ftype = VM_PROT_READ;
454 		}
455 	}
456 
457 	/*
458 	 * See if the fault is as a result of ref/mod emulation,
459 	 * or domain mismatch.
460 	 */
461 #ifdef DEBUG
462 	last_fault_code = fsr;
463 #endif
464 	if (pmap_fault_fixup(map->pmap, va, ftype, user)) {
465 		UVMHIST_LOG(maphist, " <- ref/mod emul", 0, 0, 0, 0);
466 		goto out;
467 	}
468 
469 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
470 		if (pcb->pcb_onfault) {
471 			tf->tf_r0 = EINVAL;
472 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
473 			return;
474 		}
475 		printf("\nNon-emulated page fault with intr_depth > 0\n");
476 		dab_fatal(tf, fsr, far, l, NULL);
477 	}
478 
479 	onfault = pcb->pcb_onfault;
480 	pcb->pcb_onfault = NULL;
481 	error = uvm_fault(map, va, ftype);
482 	pcb->pcb_onfault = onfault;
483 
484 	if (__predict_true(error == 0)) {
485 		if (user)
486 			uvm_grow(l->l_proc, va); /* Record any stack growth */
487 		else
488 			ucas_ras_check(tf);
489 		UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0);
490 		goto out;
491 	}
492 
493 	if (user == 0) {
494 		if (pcb->pcb_onfault) {
495 			tf->tf_r0 = error;
496 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
497 			return;
498 		}
499 
500 		printf("\nuvm_fault(%p, %lx, %x) -> %x\n", map, va, ftype,
501 		    error);
502 		dab_fatal(tf, fsr, far, l, NULL);
503 	}
504 
505 	KSI_INIT_TRAP(&ksi);
506 
507 	if (error == ENOMEM) {
508 		printf("UVM: pid %d (%s), uid %d killed: "
509 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
510 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
511 		ksi.ksi_signo = SIGKILL;
512 	} else
513 		ksi.ksi_signo = SIGSEGV;
514 
515 	ksi.ksi_code = (error == EACCES) ? SEGV_ACCERR : SEGV_MAPERR;
516 	ksi.ksi_addr = (uint32_t *)(intptr_t) far;
517 	ksi.ksi_trap = fsr;
518 	UVMHIST_LOG(maphist, " <- error (%d)", error, 0, 0, 0);
519 
520 do_trapsignal:
521 	call_trapsignal(l, tf, &ksi);
522 out:
523 	/* If returning to user mode, make sure to invoke userret() */
524 	if (user)
525 		userret(l);
526 }
527 
528 /*
529  * dab_fatal() handles the following data aborts:
530  *
531  *  FAULT_WRTBUF_0 - Vector Exception
532  *  FAULT_WRTBUF_1 - Terminal Exception
533  *
534  * We should never see these on a properly functioning system.
535  *
536  * This function is also called by the other handlers if they
537  * detect a fatal problem.
538  *
539  * Note: If 'l' is NULL, we assume we're dealing with a prefetch abort.
540  */
541 static int
542 dab_fatal(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
543 {
544 	const char * const mode = TRAP_USERMODE(tf) ? "user" : "kernel";
545 
546 	if (l != NULL) {
547 		printf("Fatal %s mode data abort: '%s'\n", mode,
548 		    data_aborts[fsr & FAULT_TYPE_MASK].desc);
549 		printf("trapframe: %p\nFSR=%08x, FAR=", tf, fsr);
550 		if ((fsr & FAULT_IMPRECISE) == 0)
551 			printf("%08x, ", far);
552 		else
553 			printf("Invalid,  ");
554 		printf("spsr=%08x\n", tf->tf_spsr);
555 	} else {
556 		printf("Fatal %s mode prefetch abort at 0x%08x\n",
557 		    mode, tf->tf_pc);
558 		printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
559 	}
560 
561 	printf("r0 =%08x, r1 =%08x, r2 =%08x, r3 =%08x\n",
562 	    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
563 	printf("r4 =%08x, r5 =%08x, r6 =%08x, r7 =%08x\n",
564 	    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
565 	printf("r8 =%08x, r9 =%08x, r10=%08x, r11=%08x\n",
566 	    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
567 	printf("r12=%08x, ", tf->tf_r12);
568 
569 	if (TRAP_USERMODE(tf))
570 		printf("usp=%08x, ulr=%08x",
571 		    tf->tf_usr_sp, tf->tf_usr_lr);
572 	else
573 		printf("ssp=%08x, slr=%08x",
574 		    tf->tf_svc_sp, tf->tf_svc_lr);
575 	printf(", pc =%08x\n\n", tf->tf_pc);
576 
577 #if defined(DDB) || defined(KGDB)
578 	kdb_trap(T_FAULT, tf);
579 #endif
580 	panic("Fatal abort");
581 	/*NOTREACHED*/
582 }
583 
584 /*
585  * dab_align() handles the following data aborts:
586  *
587  *  FAULT_ALIGN_0 - Alignment fault
588  *  FAULT_ALIGN_0 - Alignment fault
589  *
590  * These faults are fatal if they happen in kernel mode. Otherwise, we
591  * deliver a bus error to the process.
592  */
593 static int
594 dab_align(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
595 {
596 	/* Alignment faults are always fatal if they occur in kernel mode */
597 	if (!TRAP_USERMODE(tf))
598 		dab_fatal(tf, fsr, far, l, NULL);
599 
600 	/* pcb_onfault *must* be NULL at this point */
601 	KDASSERT(((struct pcb *)lwp_getpcb(l))->pcb_onfault == NULL);
602 
603 	/* See if the CPU state needs to be fixed up */
604 	(void) data_abort_fixup(tf, fsr, far, l);
605 
606 	/* Deliver a bus error signal to the process */
607 	KSI_INIT_TRAP(ksi);
608 	ksi->ksi_signo = SIGBUS;
609 	ksi->ksi_code = BUS_ADRALN;
610 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
611 	ksi->ksi_trap = fsr;
612 
613 	lwp_settrapframe(l, tf);
614 
615 	return (1);
616 }
617 
618 /*
619  * dab_buserr() handles the following data aborts:
620  *
621  *  FAULT_BUSERR_0 - External Abort on Linefetch -- Section
622  *  FAULT_BUSERR_1 - External Abort on Linefetch -- Page
623  *  FAULT_BUSERR_2 - External Abort on Non-linefetch -- Section
624  *  FAULT_BUSERR_3 - External Abort on Non-linefetch -- Page
625  *  FAULT_BUSTRNL1 - External abort on Translation -- Level 1
626  *  FAULT_BUSTRNL2 - External abort on Translation -- Level 2
627  *
628  * If pcb_onfault is set, flag the fault and return to the handler.
629  * If the fault occurred in user mode, give the process a SIGBUS.
630  *
631  * Note: On XScale, FAULT_BUSERR_0, FAULT_BUSERR_1, and FAULT_BUSERR_2
632  * can be flagged as imprecise in the FSR. This causes a real headache
633  * since some of the machine state is lost. In this case, tf->tf_pc
634  * may not actually point to the offending instruction. In fact, if
635  * we've taken a double abort fault, it generally points somewhere near
636  * the top of "data_abort_entry" in exception.S.
637  *
638  * In all other cases, these data aborts are considered fatal.
639  */
640 static int
641 dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l,
642     ksiginfo_t *ksi)
643 {
644 	struct pcb *pcb = lwp_getpcb(l);
645 
646 #ifdef __XSCALE__
647 	if ((fsr & FAULT_IMPRECISE) != 0 &&
648 	    (tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
649 		/*
650 		 * Oops, an imprecise, double abort fault. We've lost the
651 		 * r14_abt/spsr_abt values corresponding to the original
652 		 * abort, and the spsr saved in the trapframe indicates
653 		 * ABT mode.
654 		 */
655 		tf->tf_spsr &= ~PSR_MODE;
656 
657 		/*
658 		 * We use a simple heuristic to determine if the double abort
659 		 * happened as a result of a kernel or user mode access.
660 		 * If the current trapframe is at the top of the kernel stack,
661 		 * the fault _must_ have come from user mode.
662 		 */
663 		if (tf != ((trapframe_t *)pcb->pcb_ksp) - 1) {
664 			/*
665 			 * Kernel mode. We're either about to die a
666 			 * spectacular death, or pcb_onfault will come
667 			 * to our rescue. Either way, the current value
668 			 * of tf->tf_pc is irrelevant.
669 			 */
670 			tf->tf_spsr |= PSR_SVC32_MODE;
671 			if (pcb->pcb_onfault == NULL)
672 				printf("\nKernel mode double abort!\n");
673 		} else {
674 			/*
675 			 * User mode. We've lost the program counter at the
676 			 * time of the fault (not that it was accurate anyway;
677 			 * it's not called an imprecise fault for nothing).
678 			 * About all we can do is copy r14_usr to tf_pc and
679 			 * hope for the best. The process is about to get a
680 			 * SIGBUS, so it's probably history anyway.
681 			 */
682 			tf->tf_spsr |= PSR_USR32_MODE;
683 			tf->tf_pc = tf->tf_usr_lr;
684 #ifdef THUMB_CODE
685 			tf->tf_spsr &= ~PSR_T_bit;
686 			if (tf->tf_usr_lr & 1)
687 				tf->tf_spsr |= PSR_T_bit;
688 #endif
689 		}
690 	}
691 
692 	/* FAR is invalid for imprecise exceptions */
693 	if ((fsr & FAULT_IMPRECISE) != 0)
694 		far = 0;
695 #endif /* __XSCALE__ */
696 
697 	if (pcb->pcb_onfault) {
698 		KDASSERT(TRAP_USERMODE(tf) == 0);
699 		tf->tf_r0 = EFAULT;
700 		tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
701 		return (0);
702 	}
703 
704 	/* See if the CPU state needs to be fixed up */
705 	(void) data_abort_fixup(tf, fsr, far, l);
706 
707 	/*
708 	 * At this point, if the fault happened in kernel mode, we're toast
709 	 */
710 	if (!TRAP_USERMODE(tf))
711 		dab_fatal(tf, fsr, far, l, NULL);
712 
713 	/* Deliver a bus error signal to the process */
714 	KSI_INIT_TRAP(ksi);
715 	ksi->ksi_signo = SIGBUS;
716 	ksi->ksi_code = BUS_ADRERR;
717 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
718 	ksi->ksi_trap = fsr;
719 
720 	lwp_settrapframe(l, tf);
721 
722 	return (1);
723 }
724 
725 static inline int
726 prefetch_abort_fixup(trapframe_t *tf)
727 {
728 #ifdef CPU_ABORT_FIXUP_REQUIRED
729 	int error;
730 
731 	/* Call the CPU specific prefetch abort fixup routine */
732 	error = cpu_prefetchabt_fixup(tf);
733 	if (__predict_true(error != ABORT_FIXUP_FAILED))
734 		return (error);
735 
736 	/*
737 	 * Oops, couldn't fix up the instruction
738 	 */
739 	printf("%s: fixup for %s mode prefetch abort failed.\n", __func__,
740 	    TRAP_USERMODE(tf) ? "user" : "kernel");
741 #ifdef THUMB_CODE
742 	if (tf->tf_spsr & PSR_T_bit) {
743 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
744 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
745 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
746 	}
747 	else
748 #endif
749 	{
750 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
751 		    *((u_int *)tf->tf_pc));
752 	}
753 	disassemble(tf->tf_pc);
754 
755 	/* Die now if this happened in kernel mode */
756 	if (!TRAP_USERMODE(tf))
757 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
758 
759 	return (error);
760 #else
761 	return (ABORT_FIXUP_OK);
762 #endif /* CPU_ABORT_FIXUP_REQUIRED */
763 }
764 
765 /*
766  * void prefetch_abort_handler(trapframe_t *tf)
767  *
768  * Abort handler called when instruction execution occurs at
769  * a non existent or restricted (access permissions) memory page.
770  * If the address is invalid and we were in SVC mode then panic as
771  * the kernel should never prefetch abort.
772  * If the address is invalid and the page is mapped then the user process
773  * does no have read permission so send it a signal.
774  * Otherwise fault the page in and try again.
775  */
776 void
777 prefetch_abort_handler(trapframe_t *tf)
778 {
779 	struct lwp *l;
780 	struct pcb *pcb __diagused;
781 	struct vm_map *map;
782 	vaddr_t fault_pc, va;
783 	ksiginfo_t ksi;
784 	int error, user;
785 
786 	UVMHIST_FUNC(__func__);
787 	UVMHIST_CALLED(maphist);
788 
789 	/* Update vmmeter statistics */
790 	curcpu()->ci_data.cpu_ntrap++;
791 
792 	l = curlwp;
793 	pcb = lwp_getpcb(l);
794 
795 	if ((user = TRAP_USERMODE(tf)) != 0)
796 		LWP_CACHE_CREDS(l, l->l_proc);
797 
798 	/*
799 	 * Enable IRQ's (disabled by the abort) This always comes
800 	 * from user mode so we know interrupts were not disabled.
801 	 * But we check anyway.
802 	 */
803 	KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
804 	if (__predict_true((tf->tf_spsr & I32_bit) != IF32_bits))
805 		restore_interrupts(tf->tf_spsr & IF32_bits);
806 
807 	/* See if the CPU state needs to be fixed up */
808 	switch (prefetch_abort_fixup(tf)) {
809 	case ABORT_FIXUP_RETURN:
810 		KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
811 		return;
812 	case ABORT_FIXUP_FAILED:
813 		/* Deliver a SIGILL to the process */
814 		KSI_INIT_TRAP(&ksi);
815 		ksi.ksi_signo = SIGILL;
816 		ksi.ksi_code = ILL_ILLOPC;
817 		ksi.ksi_addr = (uint32_t *)(intptr_t) tf->tf_pc;
818 		lwp_settrapframe(l, tf);
819 		goto do_trapsignal;
820 	default:
821 		break;
822 	}
823 
824 	/* Prefetch aborts cannot happen in kernel mode */
825 	if (__predict_false(!user))
826 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
827 
828 	/* Get fault address */
829 	fault_pc = tf->tf_pc;
830 	lwp_settrapframe(l, tf);
831 	UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, tf=0x%x)",
832 	    fault_pc, l, tf, 0);
833 
834 	/* Ok validate the address, can only execute in USER space */
835 	if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
836 	    (fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
837 		KSI_INIT_TRAP(&ksi);
838 		ksi.ksi_signo = SIGSEGV;
839 		ksi.ksi_code = SEGV_ACCERR;
840 		ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
841 		ksi.ksi_trap = fault_pc;
842 		goto do_trapsignal;
843 	}
844 
845 	map = &l->l_proc->p_vmspace->vm_map;
846 	va = trunc_page(fault_pc);
847 
848 	/*
849 	 * See if the pmap can handle this fault on its own...
850 	 */
851 #ifdef DEBUG
852 	last_fault_code = -1;
853 #endif
854 	if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ|VM_PROT_EXECUTE, 1)) {
855 		UVMHIST_LOG (maphist, " <- emulated", 0, 0, 0, 0);
856 		goto out;
857 	}
858 
859 #ifdef DIAGNOSTIC
860 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
861 		printf("\nNon-emulated prefetch abort with intr_depth > 0\n");
862 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
863 	}
864 #endif
865 
866 	KASSERT(pcb->pcb_onfault == NULL);
867 	error = uvm_fault(map, va, VM_PROT_READ|VM_PROT_EXECUTE);
868 
869 	if (__predict_true(error == 0)) {
870 		UVMHIST_LOG (maphist, " <- uvm", 0, 0, 0, 0);
871 		goto out;
872 	}
873 	KSI_INIT_TRAP(&ksi);
874 
875 	UVMHIST_LOG (maphist, " <- fatal (%d)", error, 0, 0, 0);
876 
877 	if (error == ENOMEM) {
878 		printf("UVM: pid %d (%s), uid %d killed: "
879 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
880 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
881 		ksi.ksi_signo = SIGKILL;
882 	} else
883 		ksi.ksi_signo = SIGSEGV;
884 
885 	ksi.ksi_code = SEGV_MAPERR;
886 	ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
887 	ksi.ksi_trap = fault_pc;
888 
889 do_trapsignal:
890 	call_trapsignal(l, tf, &ksi);
891 
892 out:
893 	KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
894 	userret(l);
895 }
896 
897 /*
898  * Tentatively read an 8, 16, or 32-bit value from 'addr'.
899  * If the read succeeds, the value is written to 'rptr' and zero is returned.
900  * Else, return EFAULT.
901  */
902 int
903 badaddr_read(void *addr, size_t size, void *rptr)
904 {
905 	extern int badaddr_read_1(const uint8_t *, uint8_t *);
906 	extern int badaddr_read_2(const uint16_t *, uint16_t *);
907 	extern int badaddr_read_4(const uint32_t *, uint32_t *);
908 	union {
909 		uint8_t v1;
910 		uint16_t v2;
911 		uint32_t v4;
912 	} u;
913 	int rv, s;
914 
915 	cpu_drain_writebuf();
916 
917 	s = splhigh();
918 
919 	/* Read from the test address. */
920 	switch (size) {
921 	case sizeof(uint8_t):
922 		rv = badaddr_read_1(addr, &u.v1);
923 		if (rv == 0 && rptr)
924 			*(uint8_t *) rptr = u.v1;
925 		break;
926 
927 	case sizeof(uint16_t):
928 		rv = badaddr_read_2(addr, &u.v2);
929 		if (rv == 0 && rptr)
930 			*(uint16_t *) rptr = u.v2;
931 		break;
932 
933 	case sizeof(uint32_t):
934 		rv = badaddr_read_4(addr, &u.v4);
935 		if (rv == 0 && rptr)
936 			*(uint32_t *) rptr = u.v4;
937 		break;
938 
939 	default:
940 		panic("%s: invalid size (%zu)", __func__, size);
941 	}
942 
943 	splx(s);
944 
945 	/* Return EFAULT if the address was invalid, else zero */
946 	return (rv);
947 }
948