xref: /netbsd-src/sys/arch/arm/arm32/fault.c (revision 48fb7bfab72acd4281a53bbee5ccf3f809019e75)
1 /*	$NetBSD: fault.c,v 1.96 2014/02/26 07:48:29 skrll Exp $	*/
2 
3 /*
4  * Copyright 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 /*
38  * Copyright (c) 1994-1997 Mark Brinicombe.
39  * Copyright (c) 1994 Brini.
40  * All rights reserved.
41  *
42  * This code is derived from software written for Brini by Mark Brinicombe
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Brini.
55  * 4. The name of the company nor the name of the author may be used to
56  *    endorse or promote products derived from this software without specific
57  *    prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  * RiscBSD kernel project
72  *
73  * fault.c
74  *
75  * Fault handlers
76  *
77  * Created      : 28/11/94
78  */
79 
80 #include "opt_ddb.h"
81 #include "opt_kgdb.h"
82 
83 #include <sys/types.h>
84 __KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.96 2014/02/26 07:48:29 skrll Exp $");
85 
86 #include <sys/param.h>
87 #include <sys/systm.h>
88 #include <sys/proc.h>
89 #include <sys/kernel.h>
90 #include <sys/kauth.h>
91 #include <sys/cpu.h>
92 #include <sys/intr.h>
93 
94 #include <uvm/uvm_extern.h>
95 #include <uvm/uvm_stat.h>
96 #ifdef UVMHIST
97 #include <uvm/uvm.h>
98 #endif
99 
100 #include <arm/locore.h>
101 
102 #include <arm/arm32/katelib.h>
103 
104 #include <machine/pcb.h>
105 #if defined(DDB) || defined(KGDB)
106 #include <machine/db_machdep.h>
107 #ifdef KGDB
108 #include <sys/kgdb.h>
109 #endif
110 #if !defined(DDB)
111 #define kdb_trap	kgdb_trap
112 #endif
113 #endif
114 
115 #include <arch/arm/arm/disassem.h>
116 #include <arm/arm32/machdep.h>
117 
118 extern char fusubailout[];
119 
120 #ifdef DEBUG
121 int last_fault_code;	/* For the benefit of pmap_fault_fixup() */
122 #endif
123 
124 #if defined(CPU_ARM3) || defined(CPU_ARM6) || \
125     defined(CPU_ARM7) || defined(CPU_ARM7TDMI)
126 /* These CPUs may need data/prefetch abort fixups */
127 #define	CPU_ABORT_FIXUP_REQUIRED
128 #endif
129 
130 struct data_abort {
131 	int (*func)(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
132 	const char *desc;
133 };
134 
135 static int dab_fatal(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
136 static int dab_align(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
137 static int dab_buserr(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
138 
139 static const struct data_abort data_aborts[] = {
140 	{dab_fatal,	"Vector Exception"},
141 	{dab_align,	"Alignment Fault 1"},
142 	{dab_fatal,	"Terminal Exception"},
143 	{dab_align,	"Alignment Fault 3"},
144 	{dab_buserr,	"External Linefetch Abort (S)"},
145 	{NULL,		"Translation Fault (S)"},
146 	{dab_buserr,	"External Linefetch Abort (P)"},
147 	{NULL,		"Translation Fault (P)"},
148 	{dab_buserr,	"External Non-Linefetch Abort (S)"},
149 	{NULL,		"Domain Fault (S)"},
150 	{dab_buserr,	"External Non-Linefetch Abort (P)"},
151 	{NULL,		"Domain Fault (P)"},
152 	{dab_buserr,	"External Translation Abort (L1)"},
153 	{NULL,		"Permission Fault (S)"},
154 	{dab_buserr,	"External Translation Abort (L2)"},
155 	{NULL,		"Permission Fault (P)"}
156 };
157 
158 /* Determine if 'x' is a permission fault */
159 #define	IS_PERMISSION_FAULT(x)					\
160 	(((1 << ((x) & FAULT_TYPE_MASK)) &			\
161 	  ((1 << FAULT_PERM_P) | (1 << FAULT_PERM_S))) != 0)
162 
163 #if 0
164 /* maybe one day we'll do emulations */
165 #define	TRAPSIGNAL(l,k)	(*(l)->l_proc->p_emul->e_trapsignal)((l), (k))
166 #else
167 #define	TRAPSIGNAL(l,k)	trapsignal((l), (k))
168 #endif
169 
170 static inline void
171 call_trapsignal(struct lwp *l, const struct trapframe *tf, ksiginfo_t *ksi)
172 {
173 	if (l->l_proc->p_pid == 1 || cpu_printfataltraps) {
174 		printf("%d.%d(%s): trap: signo=%d code=%d addr=%p trap=%#x\n",
175 		    l->l_proc->p_pid, l->l_lid, l->l_proc->p_comm,
176 		    ksi->ksi_signo, ksi->ksi_code, ksi->ksi_addr,
177 		    ksi->ksi_trap);
178 		printf("r0=%08x r1=%08x r2=%08x r3=%08x\n",
179 		    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
180 		printf("r4=%08x r5=%08x r6=%08x r7=%08x\n",
181 		    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
182 		printf("r8=%08x r9=%08x rA=%08x rB=%08x\n",
183 		    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
184 		printf("ip=%08x sp=%08x lr=%08x pc=%08x spsr=%08x\n",
185 		    tf->tf_r12, tf->tf_usr_sp, tf->tf_usr_lr, tf->tf_pc,
186 		    tf->tf_spsr);
187 	}
188 
189 	TRAPSIGNAL(l, ksi);
190 }
191 
192 static inline int
193 data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l)
194 {
195 #ifdef CPU_ABORT_FIXUP_REQUIRED
196 	int error;
197 
198 	/* Call the CPU specific data abort fixup routine */
199 	error = cpu_dataabt_fixup(tf);
200 	if (__predict_true(error != ABORT_FIXUP_FAILED))
201 		return (error);
202 
203 	/*
204 	 * Oops, couldn't fix up the instruction
205 	 */
206 	printf("%s: fixup for %s mode data abort failed.\n", __func__,
207 	    TRAP_USERMODE(tf) ? "user" : "kernel");
208 #ifdef THUMB_CODE
209 	if (tf->tf_spsr & PSR_T_bit) {
210 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
211 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
212 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
213 	}
214 	else
215 #endif
216 	{
217 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
218 		    *((u_int *)tf->tf_pc));
219 	}
220 	disassemble(tf->tf_pc);
221 
222 	/* Die now if this happened in kernel mode */
223 	if (!TRAP_USERMODE(tf))
224 		dab_fatal(tf, fsr, far, l, NULL);
225 
226 	return (error);
227 #else
228 	return (ABORT_FIXUP_OK);
229 #endif /* CPU_ABORT_FIXUP_REQUIRED */
230 }
231 
232 void
233 data_abort_handler(trapframe_t *tf)
234 {
235 	struct vm_map *map;
236 	struct lwp * const l = curlwp;
237 	struct cpu_info * const ci = curcpu();
238 	u_int far, fsr;
239 	vm_prot_t ftype;
240 	void *onfault;
241 	vaddr_t va;
242 	int error;
243 	ksiginfo_t ksi;
244 
245 	UVMHIST_FUNC(__func__); UVMHIST_CALLED(maphist);
246 
247 	/* Grab FAR/FSR before enabling interrupts */
248 	far = cpu_faultaddress();
249 	fsr = cpu_faultstatus();
250 
251 	/* Update vmmeter statistics */
252 	ci->ci_data.cpu_ntrap++;
253 
254 	/* Re-enable interrupts if they were enabled previously */
255 	KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
256 	if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
257 		restore_interrupts(tf->tf_spsr & IF32_bits);
258 
259 	/* Get the current lwp structure */
260 
261 	UVMHIST_LOG(maphist, " (l=%#x, far=%#x, fsr=%#x",
262 	    l, far, fsr, 0);
263 	UVMHIST_LOG(maphist, "  tf=%#x, pc=%#x)",
264 	    tf, tf->tf_pc, 0, 0);
265 
266 	/* Data abort came from user mode? */
267 	bool user = (TRAP_USERMODE(tf) != 0);
268 	if (user)
269 		LWP_CACHE_CREDS(l, l->l_proc);
270 
271 	/* Grab the current pcb */
272 	struct pcb * const pcb = lwp_getpcb(l);
273 
274 	curcpu()->ci_abt_evs[fsr & FAULT_TYPE_MASK].ev_count++;
275 
276 	/* Invoke the appropriate handler, if necessary */
277 	if (__predict_false(data_aborts[fsr & FAULT_TYPE_MASK].func != NULL)) {
278 #ifdef DIAGNOSTIC
279 		printf("%s: data_aborts fsr=0x%x far=0x%x\n",
280 		    __func__, fsr, far);
281 #endif
282 		if ((data_aborts[fsr & FAULT_TYPE_MASK].func)(tf, fsr, far,
283 		    l, &ksi))
284 			goto do_trapsignal;
285 		goto out;
286 	}
287 
288 	/*
289 	 * At this point, we're dealing with one of the following data aborts:
290 	 *
291 	 *  FAULT_TRANS_S  - Translation -- Section
292 	 *  FAULT_TRANS_P  - Translation -- Page
293 	 *  FAULT_DOMAIN_S - Domain -- Section
294 	 *  FAULT_DOMAIN_P - Domain -- Page
295 	 *  FAULT_PERM_S   - Permission -- Section
296 	 *  FAULT_PERM_P   - Permission -- Page
297 	 *
298 	 * These are the main virtual memory-related faults signalled by
299 	 * the MMU.
300 	 */
301 
302 	/* fusubailout is used by [fs]uswintr to avoid page faulting */
303 	if (__predict_false(pcb->pcb_onfault == fusubailout)) {
304 		tf->tf_r0 = EFAULT;
305 		tf->tf_pc = (intptr_t) pcb->pcb_onfault;
306 		return;
307 	}
308 
309 	if (user) {
310 		lwp_settrapframe(l, tf);
311 	}
312 
313 	/*
314 	 * Make sure the Program Counter is sane. We could fall foul of
315 	 * someone executing Thumb code, in which case the PC might not
316 	 * be word-aligned. This would cause a kernel alignment fault
317 	 * further down if we have to decode the current instruction.
318 	 */
319 #ifdef THUMB_CODE
320 	/*
321 	 * XXX: It would be nice to be able to support Thumb in the kernel
322 	 * at some point.
323 	 */
324 	if (__predict_false(!user && (tf->tf_pc & 3) != 0)) {
325 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
326 		    __func__);
327 		dab_fatal(tf, fsr, far, l, NULL);
328 	}
329 #else
330 	if (__predict_false((tf->tf_pc & 3) != 0)) {
331 		if (user) {
332 			/*
333 			 * Give the user an illegal instruction signal.
334 			 */
335 			/* Deliver a SIGILL to the process */
336 			KSI_INIT_TRAP(&ksi);
337 			ksi.ksi_signo = SIGILL;
338 			ksi.ksi_code = ILL_ILLOPC;
339 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
340 			ksi.ksi_trap = fsr;
341 			goto do_trapsignal;
342 		}
343 
344 		/*
345 		 * The kernel never executes Thumb code.
346 		 */
347 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
348 		    __func__);
349 		dab_fatal(tf, fsr, far, l, NULL);
350 	}
351 #endif
352 
353 	/* See if the CPU state needs to be fixed up */
354 	switch (data_abort_fixup(tf, fsr, far, l)) {
355 	case ABORT_FIXUP_RETURN:
356 		return;
357 	case ABORT_FIXUP_FAILED:
358 		/* Deliver a SIGILL to the process */
359 		KSI_INIT_TRAP(&ksi);
360 		ksi.ksi_signo = SIGILL;
361 		ksi.ksi_code = ILL_ILLOPC;
362 		ksi.ksi_addr = (uint32_t *)(intptr_t) far;
363 		ksi.ksi_trap = fsr;
364 		goto do_trapsignal;
365 	default:
366 		break;
367 	}
368 
369 	va = trunc_page((vaddr_t)far);
370 
371 	/*
372 	 * It is only a kernel address space fault iff:
373 	 *	1. user == 0  and
374 	 *	2. pcb_onfault not set or
375 	 *	3. pcb_onfault set and not LDRT/LDRBT/STRT/STRBT instruction.
376 	 */
377 	if (!user && (va >= VM_MIN_KERNEL_ADDRESS ||
378 	    (va < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW)) &&
379 	    __predict_true((pcb->pcb_onfault == NULL ||
380 	     (read_insn(tf->tf_pc, false) & 0x05200000) != 0x04200000))) {
381 		map = kernel_map;
382 
383 		/* Was the fault due to the FPE/IPKDB ? */
384 		if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
385 			KSI_INIT_TRAP(&ksi);
386 			ksi.ksi_signo = SIGSEGV;
387 			ksi.ksi_code = SEGV_ACCERR;
388 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
389 			ksi.ksi_trap = fsr;
390 
391 			/*
392 			 * Force exit via userret()
393 			 * This is necessary as the FPE is an extension to
394 			 * userland that actually runs in a priveledged mode
395 			 * but uses USR mode permissions for its accesses.
396 			 */
397 			user = true;
398 			goto do_trapsignal;
399 		}
400 	} else {
401 		map = &l->l_proc->p_vmspace->vm_map;
402 	}
403 
404 	/*
405 	 * We need to know whether the page should be mapped as R or R/W.
406 	 * Before ARMv6, the MMU did not give us the info as to whether the
407 	 * fault was caused by a read or a write.
408 	 *
409 	 * However, we know that a permission fault can only be the result of
410 	 * a write to a read-only location, so we can deal with those quickly.
411 	 *
412 	 * Otherwise we need to disassemble the instruction responsible to
413 	 * determine if it was a write.
414 	 */
415 	if (CPU_IS_ARMV6_P() || CPU_IS_ARMV7_P()) {
416 		ftype = (fsr & FAULT_WRITE) ? VM_PROT_WRITE : VM_PROT_READ;
417 	} else if (IS_PERMISSION_FAULT(fsr)) {
418 		ftype = VM_PROT_WRITE;
419 	} else {
420 #ifdef THUMB_CODE
421 		/* Fast track the ARM case.  */
422 		if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
423 			u_int insn = read_thumb_insn(tf->tf_pc, user);
424 			u_int insn_f8 = insn & 0xf800;
425 			u_int insn_fe = insn & 0xfe00;
426 
427 			if (insn_f8 == 0x6000 || /* STR(1) */
428 			    insn_f8 == 0x7000 || /* STRB(1) */
429 			    insn_f8 == 0x8000 || /* STRH(1) */
430 			    insn_f8 == 0x9000 || /* STR(3) */
431 			    insn_f8 == 0xc000 || /* STM */
432 			    insn_fe == 0x5000 || /* STR(2) */
433 			    insn_fe == 0x5200 || /* STRH(2) */
434 			    insn_fe == 0x5400)   /* STRB(2) */
435 				ftype = VM_PROT_WRITE;
436 			else
437 				ftype = VM_PROT_READ;
438 		}
439 		else
440 #endif
441 		{
442 			u_int insn = read_insn(tf->tf_pc, user);
443 
444 			if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
445 			    ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
446 			    ((insn & 0x0a100000) == 0x08000000) || /* STM/CDT*/
447 			    ((insn & 0x0f9000f0) == 0x01800090))   /* STREX[BDH] */
448 				ftype = VM_PROT_WRITE;
449 			else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */
450 				ftype = VM_PROT_READ | VM_PROT_WRITE;
451 			else
452 				ftype = VM_PROT_READ;
453 		}
454 	}
455 
456 	/*
457 	 * See if the fault is as a result of ref/mod emulation,
458 	 * or domain mismatch.
459 	 */
460 #ifdef DEBUG
461 	last_fault_code = fsr;
462 #endif
463 	if (pmap_fault_fixup(map->pmap, va, ftype, user)) {
464 		UVMHIST_LOG(maphist, " <- ref/mod emul", 0, 0, 0, 0);
465 		goto out;
466 	}
467 
468 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
469 		if (pcb->pcb_onfault) {
470 			tf->tf_r0 = EINVAL;
471 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
472 			return;
473 		}
474 		printf("\nNon-emulated page fault with intr_depth > 0\n");
475 		dab_fatal(tf, fsr, far, l, NULL);
476 	}
477 
478 	onfault = pcb->pcb_onfault;
479 	pcb->pcb_onfault = NULL;
480 	error = uvm_fault(map, va, ftype);
481 	pcb->pcb_onfault = onfault;
482 
483 	if (__predict_true(error == 0)) {
484 		if (user)
485 			uvm_grow(l->l_proc, va); /* Record any stack growth */
486 		else
487 			ucas_ras_check(tf);
488 		UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0);
489 		goto out;
490 	}
491 
492 	if (user == 0) {
493 		if (pcb->pcb_onfault) {
494 			tf->tf_r0 = error;
495 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
496 			return;
497 		}
498 
499 		printf("\nuvm_fault(%p, %lx, %x) -> %x\n", map, va, ftype,
500 		    error);
501 		dab_fatal(tf, fsr, far, l, NULL);
502 	}
503 
504 	KSI_INIT_TRAP(&ksi);
505 
506 	if (error == ENOMEM) {
507 		printf("UVM: pid %d (%s), uid %d killed: "
508 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
509 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
510 		ksi.ksi_signo = SIGKILL;
511 	} else
512 		ksi.ksi_signo = SIGSEGV;
513 
514 	ksi.ksi_code = (error == EACCES) ? SEGV_ACCERR : SEGV_MAPERR;
515 	ksi.ksi_addr = (uint32_t *)(intptr_t) far;
516 	ksi.ksi_trap = fsr;
517 	UVMHIST_LOG(maphist, " <- error (%d)", error, 0, 0, 0);
518 
519 do_trapsignal:
520 	call_trapsignal(l, tf, &ksi);
521 out:
522 	/* If returning to user mode, make sure to invoke userret() */
523 	if (user)
524 		userret(l);
525 }
526 
527 /*
528  * dab_fatal() handles the following data aborts:
529  *
530  *  FAULT_WRTBUF_0 - Vector Exception
531  *  FAULT_WRTBUF_1 - Terminal Exception
532  *
533  * We should never see these on a properly functioning system.
534  *
535  * This function is also called by the other handlers if they
536  * detect a fatal problem.
537  *
538  * Note: If 'l' is NULL, we assume we're dealing with a prefetch abort.
539  */
540 static int
541 dab_fatal(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
542 {
543 	const char * const mode = TRAP_USERMODE(tf) ? "user" : "kernel";
544 
545 	if (l != NULL) {
546 		printf("Fatal %s mode data abort: '%s'\n", mode,
547 		    data_aborts[fsr & FAULT_TYPE_MASK].desc);
548 		printf("trapframe: %p\nFSR=%08x, FAR=", tf, fsr);
549 		if ((fsr & FAULT_IMPRECISE) == 0)
550 			printf("%08x, ", far);
551 		else
552 			printf("Invalid,  ");
553 		printf("spsr=%08x\n", tf->tf_spsr);
554 	} else {
555 		printf("Fatal %s mode prefetch abort at 0x%08x\n",
556 		    mode, tf->tf_pc);
557 		printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
558 	}
559 
560 	printf("r0 =%08x, r1 =%08x, r2 =%08x, r3 =%08x\n",
561 	    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
562 	printf("r4 =%08x, r5 =%08x, r6 =%08x, r7 =%08x\n",
563 	    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
564 	printf("r8 =%08x, r9 =%08x, r10=%08x, r11=%08x\n",
565 	    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
566 	printf("r12=%08x, ", tf->tf_r12);
567 
568 	if (TRAP_USERMODE(tf))
569 		printf("usp=%08x, ulr=%08x",
570 		    tf->tf_usr_sp, tf->tf_usr_lr);
571 	else
572 		printf("ssp=%08x, slr=%08x",
573 		    tf->tf_svc_sp, tf->tf_svc_lr);
574 	printf(", pc =%08x\n\n", tf->tf_pc);
575 
576 #if defined(DDB) || defined(KGDB)
577 	kdb_trap(T_FAULT, tf);
578 #endif
579 	panic("Fatal abort");
580 	/*NOTREACHED*/
581 }
582 
583 /*
584  * dab_align() handles the following data aborts:
585  *
586  *  FAULT_ALIGN_0 - Alignment fault
587  *  FAULT_ALIGN_0 - Alignment fault
588  *
589  * These faults are fatal if they happen in kernel mode. Otherwise, we
590  * deliver a bus error to the process.
591  */
592 static int
593 dab_align(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
594 {
595 	/* Alignment faults are always fatal if they occur in kernel mode */
596 	if (!TRAP_USERMODE(tf))
597 		dab_fatal(tf, fsr, far, l, NULL);
598 
599 	/* pcb_onfault *must* be NULL at this point */
600 	KDASSERT(((struct pcb *)lwp_getpcb(l))->pcb_onfault == NULL);
601 
602 	/* See if the CPU state needs to be fixed up */
603 	(void) data_abort_fixup(tf, fsr, far, l);
604 
605 	/* Deliver a bus error signal to the process */
606 	KSI_INIT_TRAP(ksi);
607 	ksi->ksi_signo = SIGBUS;
608 	ksi->ksi_code = BUS_ADRALN;
609 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
610 	ksi->ksi_trap = fsr;
611 
612 	lwp_settrapframe(l, tf);
613 
614 	return (1);
615 }
616 
617 /*
618  * dab_buserr() handles the following data aborts:
619  *
620  *  FAULT_BUSERR_0 - External Abort on Linefetch -- Section
621  *  FAULT_BUSERR_1 - External Abort on Linefetch -- Page
622  *  FAULT_BUSERR_2 - External Abort on Non-linefetch -- Section
623  *  FAULT_BUSERR_3 - External Abort on Non-linefetch -- Page
624  *  FAULT_BUSTRNL1 - External abort on Translation -- Level 1
625  *  FAULT_BUSTRNL2 - External abort on Translation -- Level 2
626  *
627  * If pcb_onfault is set, flag the fault and return to the handler.
628  * If the fault occurred in user mode, give the process a SIGBUS.
629  *
630  * Note: On XScale, FAULT_BUSERR_0, FAULT_BUSERR_1, and FAULT_BUSERR_2
631  * can be flagged as imprecise in the FSR. This causes a real headache
632  * since some of the machine state is lost. In this case, tf->tf_pc
633  * may not actually point to the offending instruction. In fact, if
634  * we've taken a double abort fault, it generally points somewhere near
635  * the top of "data_abort_entry" in exception.S.
636  *
637  * In all other cases, these data aborts are considered fatal.
638  */
639 static int
640 dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l,
641     ksiginfo_t *ksi)
642 {
643 	struct pcb *pcb = lwp_getpcb(l);
644 
645 #ifdef __XSCALE__
646 	if ((fsr & FAULT_IMPRECISE) != 0 &&
647 	    (tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
648 		/*
649 		 * Oops, an imprecise, double abort fault. We've lost the
650 		 * r14_abt/spsr_abt values corresponding to the original
651 		 * abort, and the spsr saved in the trapframe indicates
652 		 * ABT mode.
653 		 */
654 		tf->tf_spsr &= ~PSR_MODE;
655 
656 		/*
657 		 * We use a simple heuristic to determine if the double abort
658 		 * happened as a result of a kernel or user mode access.
659 		 * If the current trapframe is at the top of the kernel stack,
660 		 * the fault _must_ have come from user mode.
661 		 */
662 		if (tf != ((trapframe_t *)pcb->pcb_ksp) - 1) {
663 			/*
664 			 * Kernel mode. We're either about to die a
665 			 * spectacular death, or pcb_onfault will come
666 			 * to our rescue. Either way, the current value
667 			 * of tf->tf_pc is irrelevant.
668 			 */
669 			tf->tf_spsr |= PSR_SVC32_MODE;
670 			if (pcb->pcb_onfault == NULL)
671 				printf("\nKernel mode double abort!\n");
672 		} else {
673 			/*
674 			 * User mode. We've lost the program counter at the
675 			 * time of the fault (not that it was accurate anyway;
676 			 * it's not called an imprecise fault for nothing).
677 			 * About all we can do is copy r14_usr to tf_pc and
678 			 * hope for the best. The process is about to get a
679 			 * SIGBUS, so it's probably history anyway.
680 			 */
681 			tf->tf_spsr |= PSR_USR32_MODE;
682 			tf->tf_pc = tf->tf_usr_lr;
683 #ifdef THUMB_CODE
684 			tf->tf_spsr &= ~PSR_T_bit;
685 			if (tf->tf_usr_lr & 1)
686 				tf->tf_spsr |= PSR_T_bit;
687 #endif
688 		}
689 	}
690 
691 	/* FAR is invalid for imprecise exceptions */
692 	if ((fsr & FAULT_IMPRECISE) != 0)
693 		far = 0;
694 #endif /* __XSCALE__ */
695 
696 	if (pcb->pcb_onfault) {
697 		KDASSERT(TRAP_USERMODE(tf) == 0);
698 		tf->tf_r0 = EFAULT;
699 		tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
700 		return (0);
701 	}
702 
703 	/* See if the CPU state needs to be fixed up */
704 	(void) data_abort_fixup(tf, fsr, far, l);
705 
706 	/*
707 	 * At this point, if the fault happened in kernel mode, we're toast
708 	 */
709 	if (!TRAP_USERMODE(tf))
710 		dab_fatal(tf, fsr, far, l, NULL);
711 
712 	/* Deliver a bus error signal to the process */
713 	KSI_INIT_TRAP(ksi);
714 	ksi->ksi_signo = SIGBUS;
715 	ksi->ksi_code = BUS_ADRERR;
716 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
717 	ksi->ksi_trap = fsr;
718 
719 	lwp_settrapframe(l, tf);
720 
721 	return (1);
722 }
723 
724 static inline int
725 prefetch_abort_fixup(trapframe_t *tf)
726 {
727 #ifdef CPU_ABORT_FIXUP_REQUIRED
728 	int error;
729 
730 	/* Call the CPU specific prefetch abort fixup routine */
731 	error = cpu_prefetchabt_fixup(tf);
732 	if (__predict_true(error != ABORT_FIXUP_FAILED))
733 		return (error);
734 
735 	/*
736 	 * Oops, couldn't fix up the instruction
737 	 */
738 	printf("%s: fixup for %s mode prefetch abort failed.\n", __func__,
739 	    TRAP_USERMODE(tf) ? "user" : "kernel");
740 #ifdef THUMB_CODE
741 	if (tf->tf_spsr & PSR_T_bit) {
742 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
743 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
744 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
745 	}
746 	else
747 #endif
748 	{
749 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
750 		    *((u_int *)tf->tf_pc));
751 	}
752 	disassemble(tf->tf_pc);
753 
754 	/* Die now if this happened in kernel mode */
755 	if (!TRAP_USERMODE(tf))
756 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
757 
758 	return (error);
759 #else
760 	return (ABORT_FIXUP_OK);
761 #endif /* CPU_ABORT_FIXUP_REQUIRED */
762 }
763 
764 /*
765  * void prefetch_abort_handler(trapframe_t *tf)
766  *
767  * Abort handler called when instruction execution occurs at
768  * a non existent or restricted (access permissions) memory page.
769  * If the address is invalid and we were in SVC mode then panic as
770  * the kernel should never prefetch abort.
771  * If the address is invalid and the page is mapped then the user process
772  * does no have read permission so send it a signal.
773  * Otherwise fault the page in and try again.
774  */
775 void
776 prefetch_abort_handler(trapframe_t *tf)
777 {
778 	struct lwp *l;
779 	struct pcb *pcb __diagused;
780 	struct vm_map *map;
781 	vaddr_t fault_pc, va;
782 	ksiginfo_t ksi;
783 	int error, user;
784 
785 	UVMHIST_FUNC(__func__); UVMHIST_CALLED(maphist);
786 
787 	/* Update vmmeter statistics */
788 	curcpu()->ci_data.cpu_ntrap++;
789 
790 	l = curlwp;
791 	pcb = lwp_getpcb(l);
792 
793 	if ((user = TRAP_USERMODE(tf)) != 0)
794 		LWP_CACHE_CREDS(l, l->l_proc);
795 
796 	/*
797 	 * Enable IRQ's (disabled by the abort) This always comes
798 	 * from user mode so we know interrupts were not disabled.
799 	 * But we check anyway.
800 	 */
801 	KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
802 	if (__predict_true((tf->tf_spsr & I32_bit) != IF32_bits))
803 		restore_interrupts(tf->tf_spsr & IF32_bits);
804 
805 	/* See if the CPU state needs to be fixed up */
806 	switch (prefetch_abort_fixup(tf)) {
807 	case ABORT_FIXUP_RETURN:
808 		KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
809 		return;
810 	case ABORT_FIXUP_FAILED:
811 		/* Deliver a SIGILL to the process */
812 		KSI_INIT_TRAP(&ksi);
813 		ksi.ksi_signo = SIGILL;
814 		ksi.ksi_code = ILL_ILLOPC;
815 		ksi.ksi_addr = (uint32_t *)(intptr_t) tf->tf_pc;
816 		lwp_settrapframe(l, tf);
817 		goto do_trapsignal;
818 	default:
819 		break;
820 	}
821 
822 	/* Prefetch aborts cannot happen in kernel mode */
823 	if (__predict_false(!user))
824 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
825 
826 	/* Get fault address */
827 	fault_pc = tf->tf_pc;
828 	lwp_settrapframe(l, tf);
829 	UVMHIST_LOG(maphist, " (pc=0x%x, l=0x%x, tf=0x%x)", fault_pc, l, tf,
830 	    0);
831 
832 	/* Ok validate the address, can only execute in USER space */
833 	if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
834 	    (fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
835 		KSI_INIT_TRAP(&ksi);
836 		ksi.ksi_signo = SIGSEGV;
837 		ksi.ksi_code = SEGV_ACCERR;
838 		ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
839 		ksi.ksi_trap = fault_pc;
840 		goto do_trapsignal;
841 	}
842 
843 	map = &l->l_proc->p_vmspace->vm_map;
844 	va = trunc_page(fault_pc);
845 
846 	/*
847 	 * See if the pmap can handle this fault on its own...
848 	 */
849 #ifdef DEBUG
850 	last_fault_code = -1;
851 #endif
852 	if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ|VM_PROT_EXECUTE, 1)) {
853 		UVMHIST_LOG (maphist, " <- emulated", 0, 0, 0, 0);
854 		goto out;
855 	}
856 
857 #ifdef DIAGNOSTIC
858 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
859 		printf("\nNon-emulated prefetch abort with intr_depth > 0\n");
860 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
861 	}
862 #endif
863 
864 	KASSERT(pcb->pcb_onfault == NULL);
865 	error = uvm_fault(map, va, VM_PROT_READ);
866 
867 	if (__predict_true(error == 0)) {
868 		UVMHIST_LOG (maphist, " <- uvm", 0, 0, 0, 0);
869 		goto out;
870 	}
871 	KSI_INIT_TRAP(&ksi);
872 
873 	UVMHIST_LOG (maphist, " <- fatal (%d)", error, 0, 0, 0);
874 	if (error == ENOMEM) {
875 		printf("UVM: pid %d (%s), uid %d killed: "
876 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
877 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
878 		ksi.ksi_signo = SIGKILL;
879 	} else
880 		ksi.ksi_signo = SIGSEGV;
881 
882 	ksi.ksi_code = SEGV_MAPERR;
883 	ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
884 	ksi.ksi_trap = fault_pc;
885 
886 do_trapsignal:
887 	call_trapsignal(l, tf, &ksi);
888 
889 out:
890 	KASSERT(!TRAP_USERMODE(tf) || (tf->tf_spsr & IF32_bits) == 0);
891 	userret(l);
892 }
893 
894 /*
895  * Tentatively read an 8, 16, or 32-bit value from 'addr'.
896  * If the read succeeds, the value is written to 'rptr' and zero is returned.
897  * Else, return EFAULT.
898  */
899 int
900 badaddr_read(void *addr, size_t size, void *rptr)
901 {
902 	extern int badaddr_read_1(const uint8_t *, uint8_t *);
903 	extern int badaddr_read_2(const uint16_t *, uint16_t *);
904 	extern int badaddr_read_4(const uint32_t *, uint32_t *);
905 	union {
906 		uint8_t v1;
907 		uint16_t v2;
908 		uint32_t v4;
909 	} u;
910 	int rv, s;
911 
912 	cpu_drain_writebuf();
913 
914 	s = splhigh();
915 
916 	/* Read from the test address. */
917 	switch (size) {
918 	case sizeof(uint8_t):
919 		rv = badaddr_read_1(addr, &u.v1);
920 		if (rv == 0 && rptr)
921 			*(uint8_t *) rptr = u.v1;
922 		break;
923 
924 	case sizeof(uint16_t):
925 		rv = badaddr_read_2(addr, &u.v2);
926 		if (rv == 0 && rptr)
927 			*(uint16_t *) rptr = u.v2;
928 		break;
929 
930 	case sizeof(uint32_t):
931 		rv = badaddr_read_4(addr, &u.v4);
932 		if (rv == 0 && rptr)
933 			*(uint32_t *) rptr = u.v4;
934 		break;
935 
936 	default:
937 		panic("%s: invalid size (%zu)", __func__, size);
938 	}
939 
940 	splx(s);
941 
942 	/* Return EFAULT if the address was invalid, else zero */
943 	return (rv);
944 }
945