xref: /netbsd-src/sys/arch/arm/arm32/fault.c (revision 154bfe8e089c1a0a4e9ed8414f08d3da90949162)
1 /*	$NetBSD: fault.c,v 1.113 2020/06/20 15:45:22 skrll Exp $	*/
2 
3 /*
4  * Copyright 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 /*
38  * Copyright (c) 1994-1997 Mark Brinicombe.
39  * Copyright (c) 1994 Brini.
40  * All rights reserved.
41  *
42  * This code is derived from software written for Brini by Mark Brinicombe
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Brini.
55  * 4. The name of the company nor the name of the author may be used to
56  *    endorse or promote products derived from this software without specific
57  *    prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
60  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
61  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
63  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
64  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
65  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  * RiscBSD kernel project
72  *
73  * fault.c
74  *
75  * Fault handlers
76  *
77  * Created      : 28/11/94
78  */
79 
80 #include "opt_ddb.h"
81 #include "opt_kgdb.h"
82 
83 #include <sys/types.h>
84 __KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.113 2020/06/20 15:45:22 skrll Exp $");
85 
86 #include <sys/param.h>
87 
88 #include <sys/cpu.h>
89 #include <sys/intr.h>
90 #include <sys/kauth.h>
91 #include <sys/kernel.h>
92 #include <sys/proc.h>
93 #include <sys/systm.h>
94 
95 #include <uvm/uvm_extern.h>
96 #include <uvm/uvm_stat.h>
97 #ifdef UVMHIST
98 #include <uvm/uvm.h>
99 #endif
100 
101 #include <arm/locore.h>
102 
103 #include <machine/pcb.h>
104 #if defined(DDB) || defined(KGDB)
105 #include <machine/db_machdep.h>
106 #ifdef KGDB
107 #include <sys/kgdb.h>
108 #endif
109 #if !defined(DDB)
110 #define kdb_trap	kgdb_trap
111 #endif
112 #endif
113 
114 #include <arch/arm/arm/disassem.h>
115 #include <arm/arm32/machdep.h>
116 
117 #ifdef DEBUG
118 int last_fault_code;	/* For the benefit of pmap_fault_fixup() */
119 #endif
120 
121 #if defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI)
122 /* These CPUs may need data/prefetch abort fixups */
123 #define	CPU_ABORT_FIXUP_REQUIRED
124 #endif
125 
126 struct data_abort {
127 	int (*func)(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
128 	const char *desc;
129 };
130 
131 static int dab_fatal(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
132 static int dab_align(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
133 static int dab_buserr(trapframe_t *, u_int, u_int, struct lwp *, ksiginfo_t *);
134 
135 static const struct data_abort data_aborts[] = {
136 	{dab_fatal,	"Vector Exception"},
137 	{dab_align,	"Alignment Fault 1"},
138 	{dab_fatal,	"Terminal Exception"},
139 	{dab_align,	"Alignment Fault 3"},
140 	{dab_buserr,	"External Linefetch Abort (S)"},
141 	{NULL,		"Translation Fault (S)"},
142 	{dab_buserr,	"External Linefetch Abort (P)"},
143 	{NULL,		"Translation Fault (P)"},
144 	{dab_buserr,	"External Non-Linefetch Abort (S)"},
145 	{NULL,		"Domain Fault (S)"},
146 	{dab_buserr,	"External Non-Linefetch Abort (P)"},
147 	{NULL,		"Domain Fault (P)"},
148 	{dab_buserr,	"External Translation Abort (L1)"},
149 	{NULL,		"Permission Fault (S)"},
150 	{dab_buserr,	"External Translation Abort (L2)"},
151 	{NULL,		"Permission Fault (P)"}
152 };
153 
154 /* Determine if 'x' is a permission fault */
155 #define	IS_PERMISSION_FAULT(x)					\
156 	(((1 << ((x) & FAULT_TYPE_MASK)) &			\
157 	  ((1 << FAULT_PERM_P) | (1 << FAULT_PERM_S))) != 0)
158 
159 #if 0
160 /* maybe one day we'll do emulations */
161 #define	TRAPSIGNAL(l,k)	(*(l)->l_proc->p_emul->e_trapsignal)((l), (k))
162 #else
163 #define	TRAPSIGNAL(l,k)	trapsignal((l), (k))
164 #endif
165 
166 static inline void
167 call_trapsignal(struct lwp *l, const struct trapframe *tf, ksiginfo_t *ksi)
168 {
169 	if (l->l_proc->p_pid == 1 || cpu_printfataltraps) {
170 		printf("%d.%d(%s): trap: signo=%d code=%d addr=%p trap=%#x\n",
171 		    l->l_proc->p_pid, l->l_lid, l->l_proc->p_comm,
172 		    ksi->ksi_signo, ksi->ksi_code, ksi->ksi_addr,
173 		    ksi->ksi_trap);
174 		printf("r0=%08x r1=%08x r2=%08x r3=%08x\n",
175 		    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
176 		printf("r4=%08x r5=%08x r6=%08x r7=%08x\n",
177 		    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
178 		printf("r8=%08x r9=%08x rA=%08x rB=%08x\n",
179 		    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
180 		printf("ip=%08x sp=%08x lr=%08x pc=%08x spsr=%08x\n",
181 		    tf->tf_r12, tf->tf_usr_sp, tf->tf_usr_lr, tf->tf_pc,
182 		    tf->tf_spsr);
183 	}
184 
185 	TRAPSIGNAL(l, ksi);
186 }
187 
188 static inline int
189 data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l)
190 {
191 #ifdef CPU_ABORT_FIXUP_REQUIRED
192 	int error;
193 
194 	/* Call the CPU specific data abort fixup routine */
195 	error = cpu_dataabt_fixup(tf);
196 	if (__predict_true(error != ABORT_FIXUP_FAILED))
197 		return error;
198 
199 	/*
200 	 * Oops, couldn't fix up the instruction
201 	 */
202 	printf("%s: fixup for %s mode data abort failed.\n", __func__,
203 	    TRAP_USERMODE(tf) ? "user" : "kernel");
204 #ifdef THUMB_CODE
205 	if (tf->tf_spsr & PSR_T_bit) {
206 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
207 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
208 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
209 	}
210 	else
211 #endif
212 	{
213 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
214 		    *((u_int *)tf->tf_pc));
215 	}
216 	disassemble(tf->tf_pc);
217 
218 	/* Die now if this happened in kernel mode */
219 	if (!TRAP_USERMODE(tf))
220 		dab_fatal(tf, fsr, far, l, NULL);
221 
222 	return error;
223 #else
224 	return ABORT_FIXUP_OK;
225 #endif /* CPU_ABORT_FIXUP_REQUIRED */
226 }
227 
228 void
229 data_abort_handler(trapframe_t *tf)
230 {
231 	struct vm_map *map;
232 	struct lwp * const l = curlwp;
233 	struct cpu_info * const ci = curcpu();
234 	u_int far, fsr;
235 	vm_prot_t ftype;
236 	void *onfault;
237 	vaddr_t va;
238 	int error;
239 	ksiginfo_t ksi;
240 
241 	UVMHIST_FUNC(__func__);
242 	UVMHIST_CALLED(maphist);
243 
244 	/* Grab FAR/FSR before enabling interrupts */
245 	far = cpu_faultaddress();
246 	fsr = cpu_faultstatus();
247 
248 	/* Update vmmeter statistics */
249 	ci->ci_data.cpu_ntrap++;
250 
251 	/* Re-enable interrupts if they were enabled previously */
252 	KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
253 #ifdef __NO_FIQ
254 	if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
255 		restore_interrupts(tf->tf_spsr & IF32_bits);
256 #else
257 	if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
258 		restore_interrupts(tf->tf_spsr & IF32_bits);
259 #endif
260 
261 	/* Get the current lwp structure */
262 
263 	UVMHIST_LOG(maphist, " (l=%#jx, far=%#jx, fsr=%#jx",
264 	    (uintptr_t)l, far, fsr, 0);
265 	UVMHIST_LOG(maphist, "  tf=%#jx, pc=%#jx)",
266 	    (uintptr_t)tf, (uintptr_t)tf->tf_pc, 0, 0);
267 
268 	/* Data abort came from user mode? */
269 	bool user = (TRAP_USERMODE(tf) != 0);
270 	if (user)
271 		LWP_CACHE_CREDS(l, l->l_proc);
272 
273 	/* Grab the current pcb */
274 	struct pcb * const pcb = lwp_getpcb(l);
275 
276 	curcpu()->ci_abt_evs[fsr & FAULT_TYPE_MASK].ev_count++;
277 
278 	/* Invoke the appropriate handler, if necessary */
279 	if (__predict_false(data_aborts[fsr & FAULT_TYPE_MASK].func != NULL)) {
280 #ifdef DIAGNOSTIC
281 		printf("%s: data_aborts fsr=0x%x far=0x%x\n",
282 		    __func__, fsr, far);
283 #endif
284 		if ((data_aborts[fsr & FAULT_TYPE_MASK].func)(tf, fsr, far,
285 		    l, &ksi))
286 			goto do_trapsignal;
287 		goto out;
288 	}
289 
290 	/*
291 	 * At this point, we're dealing with one of the following data aborts:
292 	 *
293 	 *  FAULT_TRANS_S  - Translation -- Section
294 	 *  FAULT_TRANS_P  - Translation -- Page
295 	 *  FAULT_DOMAIN_S - Domain -- Section
296 	 *  FAULT_DOMAIN_P - Domain -- Page
297 	 *  FAULT_PERM_S   - Permission -- Section
298 	 *  FAULT_PERM_P   - Permission -- Page
299 	 *
300 	 * These are the main virtual memory-related faults signalled by
301 	 * the MMU.
302 	 */
303 
304 	KASSERTMSG(!user || tf == lwp_trapframe(l), "tf %p vs %p", tf,
305 	    lwp_trapframe(l));
306 
307 	/*
308 	 * Make sure the Program Counter is sane. We could fall foul of
309 	 * someone executing Thumb code, in which case the PC might not
310 	 * be word-aligned. This would cause a kernel alignment fault
311 	 * further down if we have to decode the current instruction.
312 	 */
313 #ifdef THUMB_CODE
314 	/*
315 	 * XXX: It would be nice to be able to support Thumb in the kernel
316 	 * at some point.
317 	 */
318 	if (__predict_false(!user && (tf->tf_pc & 3) != 0)) {
319 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
320 		    __func__);
321 		dab_fatal(tf, fsr, far, l, NULL);
322 	}
323 #else
324 	if (__predict_false((tf->tf_pc & 3) != 0)) {
325 		if (user) {
326 			/*
327 			 * Give the user an illegal instruction signal.
328 			 */
329 			/* Deliver a SIGILL to the process */
330 			KSI_INIT_TRAP(&ksi);
331 			ksi.ksi_signo = SIGILL;
332 			ksi.ksi_code = ILL_ILLOPC;
333 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
334 			ksi.ksi_trap = fsr;
335 			goto do_trapsignal;
336 		}
337 
338 		/*
339 		 * The kernel never executes Thumb code.
340 		 */
341 		printf("\n%s: Misaligned Kernel-mode Program Counter\n",
342 		    __func__);
343 		dab_fatal(tf, fsr, far, l, NULL);
344 	}
345 #endif
346 
347 	/* See if the CPU state needs to be fixed up */
348 	switch (data_abort_fixup(tf, fsr, far, l)) {
349 	case ABORT_FIXUP_RETURN:
350 		return;
351 	case ABORT_FIXUP_FAILED:
352 		/* Deliver a SIGILL to the process */
353 		KSI_INIT_TRAP(&ksi);
354 		ksi.ksi_signo = SIGILL;
355 		ksi.ksi_code = ILL_ILLOPC;
356 		ksi.ksi_addr = (uint32_t *)(intptr_t) far;
357 		ksi.ksi_trap = fsr;
358 		goto do_trapsignal;
359 	default:
360 		break;
361 	}
362 
363 	va = trunc_page((vaddr_t)far);
364 
365 	/*
366 	 * It is only a kernel address space fault iff:
367 	 *	1. user == 0  and
368 	 *	2. pcb_onfault not set or
369 	 *	3. pcb_onfault set and not LDRT/LDRBT/STRT/STRBT instruction.
370 	 */
371 	if (!user && (va >= VM_MIN_KERNEL_ADDRESS ||
372 	    (va < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW)) &&
373 	    __predict_true((pcb->pcb_onfault == NULL ||
374 	     (read_insn(tf->tf_pc, false) & 0x05200000) != 0x04200000))) {
375 		map = kernel_map;
376 
377 		/* Was the fault due to the FPE ? */
378 		if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
379 			KSI_INIT_TRAP(&ksi);
380 			ksi.ksi_signo = SIGSEGV;
381 			ksi.ksi_code = SEGV_ACCERR;
382 			ksi.ksi_addr = (uint32_t *)(intptr_t) far;
383 			ksi.ksi_trap = fsr;
384 
385 			/*
386 			 * Force exit via userret()
387 			 * This is necessary as the FPE is an extension to
388 			 * userland that actually runs in a priveledged mode
389 			 * but uses USR mode permissions for its accesses.
390 			 */
391 			user = true;
392 			goto do_trapsignal;
393 		}
394 	} else {
395 		map = &l->l_proc->p_vmspace->vm_map;
396 	}
397 
398 	/*
399 	 * We need to know whether the page should be mapped as R or R/W.
400 	 * Before ARMv6, the MMU did not give us the info as to whether the
401 	 * fault was caused by a read or a write.
402 	 *
403 	 * However, we know that a permission fault can only be the result of
404 	 * a write to a read-only location, so we can deal with those quickly.
405 	 *
406 	 * Otherwise we need to disassemble the instruction responsible to
407 	 * determine if it was a write.
408 	 */
409 	if (CPU_IS_ARMV6_P() || CPU_IS_ARMV7_P()) {
410 		ftype = (fsr & FAULT_WRITE) ? VM_PROT_WRITE : VM_PROT_READ;
411 	} else if (IS_PERMISSION_FAULT(fsr)) {
412 		ftype = VM_PROT_WRITE;
413 	} else {
414 #ifdef THUMB_CODE
415 		/* Fast track the ARM case.  */
416 		if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
417 			u_int insn = read_thumb_insn(tf->tf_pc, user);
418 			u_int insn_f8 = insn & 0xf800;
419 			u_int insn_fe = insn & 0xfe00;
420 
421 			if (insn_f8 == 0x6000 || /* STR(1) */
422 			    insn_f8 == 0x7000 || /* STRB(1) */
423 			    insn_f8 == 0x8000 || /* STRH(1) */
424 			    insn_f8 == 0x9000 || /* STR(3) */
425 			    insn_f8 == 0xc000 || /* STM */
426 			    insn_fe == 0x5000 || /* STR(2) */
427 			    insn_fe == 0x5200 || /* STRH(2) */
428 			    insn_fe == 0x5400)   /* STRB(2) */
429 				ftype = VM_PROT_WRITE;
430 			else
431 				ftype = VM_PROT_READ;
432 		}
433 		else
434 #endif
435 		{
436 			u_int insn = read_insn(tf->tf_pc, user);
437 
438 			if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
439 			    ((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
440 			    ((insn & 0x0a100000) == 0x08000000) || /* STM/CDT*/
441 			    ((insn & 0x0f9000f0) == 0x01800090))   /* STREX[BDH] */
442 				ftype = VM_PROT_WRITE;
443 			else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */
444 				ftype = VM_PROT_READ | VM_PROT_WRITE;
445 			else
446 				ftype = VM_PROT_READ;
447 		}
448 	}
449 
450 	/*
451 	 * See if the fault is as a result of ref/mod emulation,
452 	 * or domain mismatch.
453 	 */
454 #ifdef DEBUG
455 	last_fault_code = fsr;
456 #endif
457 	if (pmap_fault_fixup(map->pmap, va, ftype, user)) {
458 		UVMHIST_LOG(maphist, " <- ref/mod emul", 0, 0, 0, 0);
459 		goto out;
460 	}
461 
462 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
463 		if (pcb->pcb_onfault) {
464 			tf->tf_r0 = EINVAL;
465 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
466 			return;
467 		}
468 		printf("\nNon-emulated page fault with intr_depth > 0\n");
469 		dab_fatal(tf, fsr, far, l, NULL);
470 	}
471 
472 #ifdef PMAP_FAULTINFO
473 	struct pcb_faultinfo * const pfi = &pcb->pcb_faultinfo;
474 	struct proc * const p = curproc;
475 
476 	if (p->p_pid == pfi->pfi_lastpid && va == pfi->pfi_faultaddr) {
477 		if (++pfi->pfi_repeats > 4) {
478 			tlb_asid_t asid = tlb_get_asid();
479 			pt_entry_t *ptep = pfi->pfi_faultptep;
480 
481 			printf("%s: fault #%u (%x/%s) for %#" PRIxVADDR
482 			    "(%#x) at pc %#" PRIxREGISTER " curpid=%u/%u "
483 			    "ptep@%p=%#" PRIxPTE ")\n", __func__,
484 			    pfi->pfi_repeats, fsr & FAULT_TYPE_MASK,
485 			    data_aborts[fsr & FAULT_TYPE_MASK].desc, va,
486 			    far, tf->tf_pc, map->pmap->pm_pai[0].pai_asid,
487 			    asid, ptep, ptep ? *ptep : 0);
488 			cpu_Debugger();
489 		}
490 	} else {
491 		pfi->pfi_lastpid = p->p_pid;
492 		pfi->pfi_faultaddr = va;
493 		pfi->pfi_repeats = 0;
494 		pfi->pfi_faultptep = NULL;
495 		pfi->pfi_faulttype = fsr & FAULT_TYPE_MASK;
496 	}
497 #endif /* PMAP_FAULTINFO */
498 
499 	onfault = pcb->pcb_onfault;
500 	pcb->pcb_onfault = NULL;
501 	error = uvm_fault(map, va, ftype);
502 	pcb->pcb_onfault = onfault;
503 
504 	if (__predict_true(error == 0)) {
505 		if (user)
506 			uvm_grow(l->l_proc, va); /* Record any stack growth */
507 		UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0);
508 		goto out;
509 	}
510 
511 	if (user == 0) {
512 		if (pcb->pcb_onfault) {
513 			tf->tf_r0 = error;
514 			tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
515 			return;
516 		}
517 
518 		printf("\nuvm_fault(%p, %lx, %x) -> %x\n", map, va, ftype,
519 		    error);
520 		dab_fatal(tf, fsr, far, l, NULL);
521 	}
522 
523 	KSI_INIT_TRAP(&ksi);
524 
525 	switch (error) {
526 	case ENOMEM:
527 		printf("UVM: pid %d (%s), uid %d killed: "
528 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
529 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
530 		ksi.ksi_signo = SIGKILL;
531 		break;
532 	case EACCES:
533 		ksi.ksi_signo = SIGSEGV;
534 		ksi.ksi_code = SEGV_ACCERR;
535 		break;
536 	case EINVAL:
537 		ksi.ksi_signo = SIGBUS;
538 		ksi.ksi_code = BUS_ADRERR;
539 		break;
540 	default:
541 		ksi.ksi_signo = SIGSEGV;
542 		ksi.ksi_code = SEGV_MAPERR;
543 		break;
544 	}
545 	ksi.ksi_addr = (uint32_t *)(intptr_t) far;
546 	ksi.ksi_trap = fsr;
547 	UVMHIST_LOG(maphist, " <- error (%jd)", error, 0, 0, 0);
548 
549 do_trapsignal:
550 	call_trapsignal(l, tf, &ksi);
551 out:
552 	/* If returning to user mode, make sure to invoke userret() */
553 	if (user)
554 		userret(l);
555 }
556 
557 /*
558  * dab_fatal() handles the following data aborts:
559  *
560  *  FAULT_WRTBUF_0 - Vector Exception
561  *  FAULT_WRTBUF_1 - Terminal Exception
562  *
563  * We should never see these on a properly functioning system.
564  *
565  * This function is also called by the other handlers if they
566  * detect a fatal problem.
567  *
568  * Note: If 'l' is NULL, we assume we're dealing with a prefetch abort.
569  */
570 static int
571 dab_fatal(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
572 {
573 	const char * const mode = TRAP_USERMODE(tf) ? "user" : "kernel";
574 
575 	if (l != NULL) {
576 		printf("Fatal %s mode data abort: '%s'\n", mode,
577 		    data_aborts[fsr & FAULT_TYPE_MASK].desc);
578 		printf("trapframe: %p\nFSR=%08x, FAR=", tf, fsr);
579 		if ((fsr & FAULT_IMPRECISE) == 0)
580 			printf("%08x, ", far);
581 		else
582 			printf("Invalid,  ");
583 		printf("spsr=%08x\n", tf->tf_spsr);
584 	} else {
585 		printf("Fatal %s mode prefetch abort at 0x%08x\n",
586 		    mode, tf->tf_pc);
587 		printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
588 	}
589 
590 	printf("r0 =%08x, r1 =%08x, r2 =%08x, r3 =%08x\n",
591 	    tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
592 	printf("r4 =%08x, r5 =%08x, r6 =%08x, r7 =%08x\n",
593 	    tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
594 	printf("r8 =%08x, r9 =%08x, r10=%08x, r11=%08x\n",
595 	    tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
596 	printf("r12=%08x, ", tf->tf_r12);
597 
598 	if (TRAP_USERMODE(tf))
599 		printf("usp=%08x, ulr=%08x",
600 		    tf->tf_usr_sp, tf->tf_usr_lr);
601 	else
602 		printf("ssp=%08x, slr=%08x",
603 		    tf->tf_svc_sp, tf->tf_svc_lr);
604 	printf(", pc =%08x\n\n", tf->tf_pc);
605 
606 #if defined(DDB) || defined(KGDB)
607 	kdb_trap(T_FAULT, tf);
608 #endif
609 	panic("Fatal abort");
610 	/*NOTREACHED*/
611 }
612 
613 /*
614  * dab_align() handles the following data aborts:
615  *
616  *  FAULT_ALIGN_0 - Alignment fault
617  *  FAULT_ALIGN_0 - Alignment fault
618  *
619  * These faults are fatal if they happen in kernel mode. Otherwise, we
620  * deliver a bus error to the process.
621  */
622 static int
623 dab_align(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l, ksiginfo_t *ksi)
624 {
625 	/* Alignment faults are always fatal if they occur in kernel mode */
626 	if (!TRAP_USERMODE(tf))
627 		dab_fatal(tf, fsr, far, l, NULL);
628 
629 	/* pcb_onfault *must* be NULL at this point */
630 	KDASSERT(((struct pcb *)lwp_getpcb(l))->pcb_onfault == NULL);
631 
632 	/* See if the CPU state needs to be fixed up */
633 	(void) data_abort_fixup(tf, fsr, far, l);
634 
635 	/* Deliver a bus error signal to the process */
636 	KSI_INIT_TRAP(ksi);
637 	ksi->ksi_signo = SIGBUS;
638 	ksi->ksi_code = BUS_ADRALN;
639 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
640 	ksi->ksi_trap = fsr;
641 
642 	KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf, lwp_trapframe(l));
643 
644 	return 1;
645 }
646 
647 /*
648  * dab_buserr() handles the following data aborts:
649  *
650  *  FAULT_BUSERR_0 - External Abort on Linefetch -- Section
651  *  FAULT_BUSERR_1 - External Abort on Linefetch -- Page
652  *  FAULT_BUSERR_2 - External Abort on Non-linefetch -- Section
653  *  FAULT_BUSERR_3 - External Abort on Non-linefetch -- Page
654  *  FAULT_BUSTRNL1 - External abort on Translation -- Level 1
655  *  FAULT_BUSTRNL2 - External abort on Translation -- Level 2
656  *
657  * If pcb_onfault is set, flag the fault and return to the handler.
658  * If the fault occurred in user mode, give the process a SIGBUS.
659  *
660  * Note: On XScale, FAULT_BUSERR_0, FAULT_BUSERR_1, and FAULT_BUSERR_2
661  * can be flagged as imprecise in the FSR. This causes a real headache
662  * since some of the machine state is lost. In this case, tf->tf_pc
663  * may not actually point to the offending instruction. In fact, if
664  * we've taken a double abort fault, it generally points somewhere near
665  * the top of "data_abort_entry" in exception.S.
666  *
667  * In all other cases, these data aborts are considered fatal.
668  */
669 static int
670 dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l,
671     ksiginfo_t *ksi)
672 {
673 	struct pcb *pcb = lwp_getpcb(l);
674 
675 #ifdef __XSCALE__
676 	if ((fsr & FAULT_IMPRECISE) != 0 &&
677 	    (tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
678 		/*
679 		 * Oops, an imprecise, double abort fault. We've lost the
680 		 * r14_abt/spsr_abt values corresponding to the original
681 		 * abort, and the spsr saved in the trapframe indicates
682 		 * ABT mode.
683 		 */
684 		tf->tf_spsr &= ~PSR_MODE;
685 
686 		/*
687 		 * We use a simple heuristic to determine if the double abort
688 		 * happened as a result of a kernel or user mode access.
689 		 * If the current trapframe is at the top of the kernel stack,
690 		 * the fault _must_ have come from user mode.
691 		 */
692 		if (tf != ((trapframe_t *)pcb->pcb_ksp) - 1) {
693 			/*
694 			 * Kernel mode. We're either about to die a
695 			 * spectacular death, or pcb_onfault will come
696 			 * to our rescue. Either way, the current value
697 			 * of tf->tf_pc is irrelevant.
698 			 */
699 			tf->tf_spsr |= PSR_SVC32_MODE;
700 			if (pcb->pcb_onfault == NULL)
701 				printf("\nKernel mode double abort!\n");
702 		} else {
703 			/*
704 			 * User mode. We've lost the program counter at the
705 			 * time of the fault (not that it was accurate anyway;
706 			 * it's not called an imprecise fault for nothing).
707 			 * About all we can do is copy r14_usr to tf_pc and
708 			 * hope for the best. The process is about to get a
709 			 * SIGBUS, so it's probably history anyway.
710 			 */
711 			tf->tf_spsr |= PSR_USR32_MODE;
712 			tf->tf_pc = tf->tf_usr_lr;
713 #ifdef THUMB_CODE
714 			tf->tf_spsr &= ~PSR_T_bit;
715 			if (tf->tf_usr_lr & 1)
716 				tf->tf_spsr |= PSR_T_bit;
717 #endif
718 		}
719 	}
720 
721 	/* FAR is invalid for imprecise exceptions */
722 	if ((fsr & FAULT_IMPRECISE) != 0)
723 		far = 0;
724 #endif /* __XSCALE__ */
725 
726 	if (pcb->pcb_onfault) {
727 		KDASSERT(TRAP_USERMODE(tf) == 0);
728 		tf->tf_r0 = EFAULT;
729 		tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
730 		return 0;
731 	}
732 
733 	/* See if the CPU state needs to be fixed up */
734 	(void) data_abort_fixup(tf, fsr, far, l);
735 
736 	/*
737 	 * At this point, if the fault happened in kernel mode, we're toast
738 	 */
739 	if (!TRAP_USERMODE(tf))
740 		dab_fatal(tf, fsr, far, l, NULL);
741 
742 	/* Deliver a bus error signal to the process */
743 	KSI_INIT_TRAP(ksi);
744 	ksi->ksi_signo = SIGBUS;
745 	ksi->ksi_code = BUS_ADRERR;
746 	ksi->ksi_addr = (uint32_t *)(intptr_t)far;
747 	ksi->ksi_trap = fsr;
748 
749 	KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf, lwp_trapframe(l));
750 
751 	return 1;
752 }
753 
754 static inline int
755 prefetch_abort_fixup(trapframe_t *tf)
756 {
757 #ifdef CPU_ABORT_FIXUP_REQUIRED
758 	int error;
759 
760 	/* Call the CPU specific prefetch abort fixup routine */
761 	error = cpu_prefetchabt_fixup(tf);
762 	if (__predict_true(error != ABORT_FIXUP_FAILED))
763 		return error;
764 
765 	/*
766 	 * Oops, couldn't fix up the instruction
767 	 */
768 	printf("%s: fixup for %s mode prefetch abort failed.\n", __func__,
769 	    TRAP_USERMODE(tf) ? "user" : "kernel");
770 #ifdef THUMB_CODE
771 	if (tf->tf_spsr & PSR_T_bit) {
772 		printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
773 		    tf->tf_pc, *((uint16 *)(tf->tf_pc & ~1)),
774 		    *((uint16 *)((tf->tf_pc + 2) & ~1)));
775 	}
776 	else
777 #endif
778 	{
779 		printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
780 		    *((u_int *)tf->tf_pc));
781 	}
782 	disassemble(tf->tf_pc);
783 
784 	/* Die now if this happened in kernel mode */
785 	if (!TRAP_USERMODE(tf))
786 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
787 
788 	return error;
789 #else
790 	return ABORT_FIXUP_OK;
791 #endif /* CPU_ABORT_FIXUP_REQUIRED */
792 }
793 
794 /*
795  * void prefetch_abort_handler(trapframe_t *tf)
796  *
797  * Abort handler called when instruction execution occurs at
798  * a non existent or restricted (access permissions) memory page.
799  * If the address is invalid and we were in SVC mode then panic as
800  * the kernel should never prefetch abort.
801  * If the address is invalid and the page is mapped then the user process
802  * does no have read permission so send it a signal.
803  * Otherwise fault the page in and try again.
804  */
805 void
806 prefetch_abort_handler(trapframe_t *tf)
807 {
808 	struct lwp *l;
809 	struct pcb *pcb __diagused;
810 	struct vm_map *map;
811 	vaddr_t fault_pc, va;
812 	ksiginfo_t ksi;
813 	int error, user;
814 
815 	UVMHIST_FUNC(__func__);
816 	UVMHIST_CALLED(maphist);
817 
818 	/* Update vmmeter statistics */
819 	curcpu()->ci_data.cpu_ntrap++;
820 
821 	l = curlwp;
822 	pcb = lwp_getpcb(l);
823 
824 	if ((user = TRAP_USERMODE(tf)) != 0)
825 		LWP_CACHE_CREDS(l, l->l_proc);
826 
827 	/*
828 	 * Enable IRQ's (disabled by the abort) This always comes
829 	 * from user mode so we know interrupts were not disabled.
830 	 * But we check anyway.
831 	 */
832 	KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
833 #ifdef __NO_FIQ
834 	if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
835 		restore_interrupts(tf->tf_spsr & IF32_bits);
836 #else
837 	if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
838 		restore_interrupts(tf->tf_spsr & IF32_bits);
839 #endif
840 
841 	/* See if the CPU state needs to be fixed up */
842 	switch (prefetch_abort_fixup(tf)) {
843 	case ABORT_FIXUP_RETURN:
844 		KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
845 		return;
846 	case ABORT_FIXUP_FAILED:
847 		/* Deliver a SIGILL to the process */
848 		KSI_INIT_TRAP(&ksi);
849 		ksi.ksi_signo = SIGILL;
850 		ksi.ksi_code = ILL_ILLOPC;
851 		ksi.ksi_addr = (uint32_t *)(intptr_t) tf->tf_pc;
852 		KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf,
853 		    lwp_trapframe(l));
854 		goto do_trapsignal;
855 	default:
856 		break;
857 	}
858 
859 	/* Prefetch aborts cannot happen in kernel mode */
860 	if (__predict_false(!user))
861 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
862 
863 	/* Get fault address */
864 	fault_pc = tf->tf_pc;
865 	KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf, lwp_trapframe(l));
866 	UVMHIST_LOG(maphist, " (pc=%#jx, l=%#jx, tf=%#jx)",
867 	    fault_pc, (uintptr_t)l, (uintptr_t)tf, 0);
868 
869 #ifdef THUMB_CODE
870  recheck:
871 #endif
872 	/* Ok validate the address, can only execute in USER space */
873 	if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
874 	    (fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
875 		KSI_INIT_TRAP(&ksi);
876 		ksi.ksi_signo = SIGSEGV;
877 		ksi.ksi_code = SEGV_ACCERR;
878 		ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
879 		ksi.ksi_trap = fault_pc;
880 		goto do_trapsignal;
881 	}
882 
883 	map = &l->l_proc->p_vmspace->vm_map;
884 	va = trunc_page(fault_pc);
885 
886 	/*
887 	 * See if the pmap can handle this fault on its own...
888 	 */
889 #ifdef DEBUG
890 	last_fault_code = -1;
891 #endif
892 	if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ|VM_PROT_EXECUTE, 1)) {
893 		UVMHIST_LOG (maphist, " <- emulated", 0, 0, 0, 0);
894 		goto out;
895 	}
896 
897 #ifdef DIAGNOSTIC
898 	if (__predict_false(curcpu()->ci_intr_depth > 0)) {
899 		printf("\nNon-emulated prefetch abort with intr_depth > 0\n");
900 		dab_fatal(tf, 0, tf->tf_pc, NULL, NULL);
901 	}
902 #endif
903 
904 	KASSERT(pcb->pcb_onfault == NULL);
905 	error = uvm_fault(map, va, VM_PROT_READ|VM_PROT_EXECUTE);
906 
907 	if (__predict_true(error == 0)) {
908 		UVMHIST_LOG (maphist, " <- uvm", 0, 0, 0, 0);
909 		goto out;
910 	}
911 	KSI_INIT_TRAP(&ksi);
912 
913 	UVMHIST_LOG (maphist, " <- fatal (%jd)", error, 0, 0, 0);
914 
915 	if (error == ENOMEM) {
916 		printf("UVM: pid %d (%s), uid %d killed: "
917 		    "out of swap\n", l->l_proc->p_pid, l->l_proc->p_comm,
918 		    l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
919 		ksi.ksi_signo = SIGKILL;
920 	} else
921 		ksi.ksi_signo = SIGSEGV;
922 
923 	ksi.ksi_code = SEGV_MAPERR;
924 	ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
925 	ksi.ksi_trap = fault_pc;
926 
927 do_trapsignal:
928 	call_trapsignal(l, tf, &ksi);
929 
930 out:
931 
932 #ifdef THUMB_CODE
933 #define THUMB_32BIT(hi) (((hi) & 0xe000) == 0xe000 && ((hi) & 0x1800))
934 	/* thumb-32 instruction was located on page boundary? */
935 	if ((tf->tf_spsr & PSR_T_bit) &&
936 	    ((fault_pc & PAGE_MASK) == (PAGE_SIZE - THUMB_INSN_SIZE)) &&
937 	    THUMB_32BIT(*(uint16_t *)tf->tf_pc)) {
938 		fault_pc = tf->tf_pc + THUMB_INSN_SIZE;
939 		goto recheck;
940 	}
941 #endif /* THUMB_CODE */
942 
943 	KASSERT(!TRAP_USERMODE(tf) || VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
944 	userret(l);
945 }
946 
947 /*
948  * Tentatively read an 8, 16, or 32-bit value from 'addr'.
949  * If the read succeeds, the value is written to 'rptr' and zero is returned.
950  * Else, return EFAULT.
951  */
952 int
953 badaddr_read(void *addr, size_t size, void *rptr)
954 {
955 	extern int badaddr_read_1(const uint8_t *, uint8_t *);
956 	extern int badaddr_read_2(const uint16_t *, uint16_t *);
957 	extern int badaddr_read_4(const uint32_t *, uint32_t *);
958 	union {
959 		uint8_t v1;
960 		uint16_t v2;
961 		uint32_t v4;
962 	} u;
963 	int rv, s;
964 
965 	cpu_drain_writebuf();
966 
967 	s = splhigh();
968 
969 	/* Read from the test address. */
970 	switch (size) {
971 	case sizeof(uint8_t):
972 		rv = badaddr_read_1(addr, &u.v1);
973 		if (rv == 0 && rptr)
974 			*(uint8_t *) rptr = u.v1;
975 		break;
976 
977 	case sizeof(uint16_t):
978 		rv = badaddr_read_2(addr, &u.v2);
979 		if (rv == 0 && rptr)
980 			*(uint16_t *) rptr = u.v2;
981 		break;
982 
983 	case sizeof(uint32_t):
984 		rv = badaddr_read_4(addr, &u.v4);
985 		if (rv == 0 && rptr)
986 			*(uint32_t *) rptr = u.v4;
987 		break;
988 
989 	default:
990 		panic("%s: invalid size (%zu)", __func__, size);
991 	}
992 
993 	splx(s);
994 
995 	/* Return EFAULT if the address was invalid, else zero */
996 	return rv;
997 }
998