xref: /netbsd-src/sys/arch/arm/arm32/db_machdep.c (revision 9ac63422b666fbe53a067de74d8af2aa4e45a08b)
1 /*	$NetBSD: db_machdep.c,v 1.13 2012/02/16 02:33:37 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 1996 Mark Brinicombe
5  *
6  * Mach Operating System
7  * Copyright (c) 1991,1990 Carnegie Mellon University
8  * All Rights Reserved.
9  *
10  * Permission to use, copy, modify and distribute this software and its
11  * documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
18  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  */
30 
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.13 2012/02/16 02:33:37 christos Exp $");
33 
34 #include <sys/param.h>
35 #include <sys/proc.h>
36 #include <sys/vnode.h>
37 #include <sys/systm.h>
38 
39 #include <arm/arm32/db_machdep.h>
40 #include <arm/cpufunc.h>
41 
42 #include <ddb/db_access.h>
43 #include <ddb/db_sym.h>
44 #include <ddb/db_output.h>
45 #include <ddb/db_variables.h>
46 #include <ddb/db_command.h>
47 
48 static long nil;
49 
50 int db_access_und_sp(const struct db_variable *, db_expr_t *, int);
51 int db_access_abt_sp(const struct db_variable *, db_expr_t *, int);
52 int db_access_irq_sp(const struct db_variable *, db_expr_t *, int);
53 
54 const struct db_variable db_regs[] = {
55 	{ "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, NULL },
56 	{ "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, NULL },
57 	{ "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, NULL },
58 	{ "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, NULL },
59 	{ "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, NULL },
60 	{ "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, NULL },
61 	{ "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, NULL },
62 	{ "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, NULL },
63 	{ "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, NULL },
64 	{ "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, NULL },
65 	{ "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, NULL },
66 	{ "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, NULL },
67 	{ "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, NULL },
68 	{ "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, NULL },
69 	{ "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, NULL },
70 	{ "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, NULL },
71 	{ "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, NULL },
72 	{ "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, NULL },
73 	{ "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, NULL },
74 	{ "und_sp", &nil, db_access_und_sp, NULL },
75 	{ "abt_sp", &nil, db_access_abt_sp, NULL },
76 	{ "irq_sp", &nil, db_access_irq_sp, NULL },
77 };
78 
79 const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
80 
81 const struct db_command db_machine_command_table[] = {
82 	{ DDB_ADD_CMD("frame",	db_show_frame_cmd,	0,
83 			"Displays the contents of a trapframe",
84 			"[address]",
85 			"   address:\taddress of trapfame to display")},
86 #ifdef _KERNEL
87 	{ DDB_ADD_CMD("panic",	db_show_panic_cmd,	0,
88 			"Displays the last panic string",
89 		     	NULL,NULL) },
90 #endif
91 #ifdef ARM32_DB_COMMANDS
92 	ARM32_DB_COMMANDS,
93 #endif
94 	{ DDB_ADD_CMD(NULL,     NULL,           0,NULL,NULL,NULL) }
95 };
96 
97 int
98 db_access_und_sp(const struct db_variable *vp, db_expr_t *valp, int rw)
99 {
100 
101 	if (rw == DB_VAR_GET)
102 		*valp = get_stackptr(PSR_UND32_MODE);
103 	return(0);
104 }
105 
106 int
107 db_access_abt_sp(const struct db_variable *vp, db_expr_t *valp, int rw)
108 {
109 
110 	if (rw == DB_VAR_GET)
111 		*valp = get_stackptr(PSR_ABT32_MODE);
112 	return(0);
113 }
114 
115 int
116 db_access_irq_sp(const struct db_variable *vp, db_expr_t *valp, int rw)
117 {
118 
119 	if (rw == DB_VAR_GET)
120 		*valp = get_stackptr(PSR_IRQ32_MODE);
121 	return(0);
122 }
123 
124 #ifdef _KERNEL
125 void
126 db_show_panic_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif)
127 {
128 	int s;
129 	s = splhigh();
130 
131 	db_printf("Panic string: %s\n", panicstr);
132 	(void)splx(s);
133 }
134 #endif
135 
136 
137 void
138 db_show_frame_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *modif)
139 {
140 	struct trapframe *frame;
141 
142 	if (!have_addr) {
143 		db_printf("frame address must be specified\n");
144 		return;
145 	}
146 
147 	frame = (struct trapframe *)addr;
148 
149 	db_printf("frame address = %08x  ", (u_int)frame);
150 	db_printf("spsr=%08x\n", frame->tf_spsr);
151 	db_printf("r0 =%08x r1 =%08x r2 =%08x r3 =%08x\n",
152 	    frame->tf_r0, frame->tf_r1, frame->tf_r2, frame->tf_r3);
153 	db_printf("r4 =%08x r5 =%08x r6 =%08x r7 =%08x\n",
154 	    frame->tf_r4, frame->tf_r5, frame->tf_r6, frame->tf_r7);
155 	db_printf("r8 =%08x r9 =%08x r10=%08x r11=%08x\n",
156 	    frame->tf_r8, frame->tf_r9, frame->tf_r10, frame->tf_r11);
157 	db_printf("r12=%08x r13=%08x r14=%08x r15=%08x\n",
158 	    frame->tf_r12, frame->tf_usr_sp, frame->tf_usr_lr, frame->tf_pc);
159 	db_printf("slr=%08x\n", frame->tf_svc_lr);
160 }
161