xref: /netbsd-src/sys/arch/arm/arm32/db_interface.c (revision 3b01aba77a7a698587faaae455bbfe740923c1f5)
1 /*	$NetBSD: db_interface.c,v 1.7 2001/07/28 18:12:43 chris Exp $	*/
2 
3 /*
4  * Copyright (c) 1996 Scott K. Stevens
5  *
6  * Mach Operating System
7  * Copyright (c) 1991,1990 Carnegie Mellon University
8  * All Rights Reserved.
9  *
10  * Permission to use, copy, modify and distribute this software and its
11  * documentation is hereby granted, provided that both the copyright
12  * notice and this permission notice appear in all copies of the
13  * software, derivative works or modified versions, and any portions
14  * thereof, and that both notices appear in supporting documentation.
15  *
16  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
18  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19  *
20  * Carnegie Mellon requests users of this software to return to
21  *
22  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
23  *  School of Computer Science
24  *  Carnegie Mellon University
25  *  Pittsburgh PA 15213-3890
26  *
27  * any improvements or extensions that they make and grant Carnegie the
28  * rights to redistribute these changes.
29  *
30  *	From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
31  */
32 
33 /*
34  * Interface to new debugger.
35  */
36 #include "opt_ddb.h"
37 
38 #include <sys/param.h>
39 #include <sys/proc.h>
40 #include <sys/reboot.h>
41 #include <sys/systm.h>	/* just for boothowto */
42 #include <sys/exec.h>
43 
44 #include <uvm/uvm_extern.h>
45 
46 #include <machine/db_machdep.h>
47 #include <machine/katelib.h>
48 #include <machine/pte.h>
49 #include <machine/undefined.h>
50 #include <ddb/db_command.h>
51 #include <ddb/db_output.h>
52 #include <ddb/db_variables.h>
53 #include <ddb/db_sym.h>
54 #include <ddb/db_extern.h>
55 #include <ddb/db_interface.h>
56 #include <dev/cons.h>
57 
58 static int nil;
59 
60 int db_access_und_sp __P((const struct db_variable *, db_expr_t *, int));
61 int db_access_abt_sp __P((const struct db_variable *, db_expr_t *, int));
62 int db_access_irq_sp __P((const struct db_variable *, db_expr_t *, int));
63 u_int db_fetch_reg __P((int, db_regs_t *));
64 
65 const struct db_variable db_regs[] = {
66 	{ "spsr", (long *)&DDB_REGS->tf_spsr, FCN_NULL, },
67 	{ "r0", (long *)&DDB_REGS->tf_r0, FCN_NULL, },
68 	{ "r1", (long *)&DDB_REGS->tf_r1, FCN_NULL, },
69 	{ "r2", (long *)&DDB_REGS->tf_r2, FCN_NULL, },
70 	{ "r3", (long *)&DDB_REGS->tf_r3, FCN_NULL, },
71 	{ "r4", (long *)&DDB_REGS->tf_r4, FCN_NULL, },
72 	{ "r5", (long *)&DDB_REGS->tf_r5, FCN_NULL, },
73 	{ "r6", (long *)&DDB_REGS->tf_r6, FCN_NULL, },
74 	{ "r7", (long *)&DDB_REGS->tf_r7, FCN_NULL, },
75 	{ "r8", (long *)&DDB_REGS->tf_r8, FCN_NULL, },
76 	{ "r9", (long *)&DDB_REGS->tf_r9, FCN_NULL, },
77 	{ "r10", (long *)&DDB_REGS->tf_r10, FCN_NULL, },
78 	{ "r11", (long *)&DDB_REGS->tf_r11, FCN_NULL, },
79 	{ "r12", (long *)&DDB_REGS->tf_r12, FCN_NULL, },
80 	{ "usr_sp", (long *)&DDB_REGS->tf_usr_sp, FCN_NULL, },
81 	{ "usr_lr", (long *)&DDB_REGS->tf_usr_lr, FCN_NULL, },
82 	{ "svc_sp", (long *)&DDB_REGS->tf_svc_sp, FCN_NULL, },
83 	{ "svc_lr", (long *)&DDB_REGS->tf_svc_lr, FCN_NULL, },
84 	{ "pc", (long *)&DDB_REGS->tf_pc, FCN_NULL, },
85 	{ "und_sp", (long *)&nil, db_access_und_sp, },
86 	{ "abt_sp", (long *)&nil, db_access_abt_sp, },
87 	{ "irq_sp", (long *)&nil, db_access_irq_sp, },
88 };
89 
90 const struct db_variable * const db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
91 
92 extern label_t	*db_recover;
93 
94 int	db_active = 0;
95 
96 int db_access_und_sp(vp, valp, rw)
97 	const struct db_variable *vp;
98 	db_expr_t *valp;
99 	int rw;
100 {
101 	if (rw == DB_VAR_GET)
102 		*valp = get_stackptr(PSR_UND32_MODE);
103 	return(0);
104 }
105 
106 int db_access_abt_sp(vp, valp, rw)
107 	const struct db_variable *vp;
108 	db_expr_t *valp;
109 	int rw;
110 {
111 	if (rw == DB_VAR_GET)
112 		*valp = get_stackptr(PSR_ABT32_MODE);
113 	return(0);
114 }
115 
116 int db_access_irq_sp(vp, valp, rw)
117 	const struct db_variable *vp;
118 	db_expr_t *valp;
119 	int rw;
120 {
121 	if (rw == DB_VAR_GET)
122 		*valp = get_stackptr(PSR_IRQ32_MODE);
123 	return(0);
124 }
125 
126 /*
127  *  kdb_trap - field a TRACE or BPT trap
128  */
129 int
130 kdb_trap(type, regs)
131 	int type;
132 	db_regs_t *regs;
133 {
134 	int s;
135 
136 	switch (type) {
137 	case T_BREAKPOINT:	/* breakpoint */
138 	case -1:		/* keyboard interrupt */
139 		break;
140 	default:
141 		db_printf("kernel: trap");
142 		if (db_recover != 0) {
143 			db_error("Faulted in DDB; continuing...\n");
144 			/*NOTREACHED*/
145 		}
146 	}
147 
148 	/* Should switch to kdb`s own stack here. */
149 
150 	ddb_regs = *regs;
151 
152 	s = splhigh();
153 	db_active++;
154 	cnpollc(TRUE);
155 	db_trap(type, 0/*code*/);
156 	cnpollc(FALSE);
157 	db_active--;
158 	splx(s);
159 
160 	*regs = ddb_regs;
161 
162 	return (1);
163 }
164 
165 
166 /*
167  * Received keyboard interrupt sequence.
168  */
169 void
170 kdb_kbd_trap(regs)
171 	db_regs_t *regs;
172 {
173 	if (db_active == 0 && (boothowto & RB_KDB)) {
174 		printf("\n\nkernel: keyboard interrupt\n");
175 		kdb_trap(-1, regs);
176 	}
177 }
178 
179 
180 static int
181 db_validate_address(addr)
182 	vm_offset_t addr;
183 {
184 	pt_entry_t *ptep;
185 	pd_entry_t *pdep;
186 	struct proc *p = curproc;
187 
188 	/*
189 	 * If we have a valid pmap for curproc, use it's page directory
190 	 * otherwise use the kernel pmap's page directory.
191 	 */
192 	if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap)
193 		pdep = pmap_kernel()->pm_pdir;
194 	else
195 		pdep = p->p_vmspace->vm_map.pmap->pm_pdir;
196 
197 	/* Make sure the address we are reading is valid */
198 	switch ((pdep[(addr >> 20) + 0] & L1_MASK)) {
199 	case L1_SECTION:
200 		break;
201 	case L1_PAGE:
202 		/* Check the L2 page table for validity */
203 		ptep = vtopte(addr);
204 		if ((*ptep & L2_MASK) != L2_INVAL)
205 			break;
206 		/* FALLTHROUGH */
207 	default:
208 		return 1;
209 	}
210 
211 	return 0;
212 }
213 
214 /*
215  * Read bytes from kernel address space for debugger.
216  */
217 void
218 db_read_bytes(addr, size, data)
219 	vm_offset_t	addr;
220 	int	size;
221 	char	*data;
222 {
223 	char	*src;
224 
225 	src = (char *)addr;
226 	while (--size >= 0) {
227 		if (db_validate_address((u_int)src)) {
228 			db_printf("address %p is invalid\n", src);
229 			return;
230 		}
231 		*data++ = *src++;
232 	}
233 }
234 
235 static void
236 db_write_text(dst, ch)
237 	unsigned char *dst;
238 	int ch;
239 {
240 	pt_entry_t *ptep, pteo;
241 	vm_offset_t va;
242 
243 	va = (unsigned long)dst & (~PGOFSET);
244 	ptep = vtopte(va);
245 
246 	if (db_validate_address((u_int)dst)) {
247 		db_printf(" address %p not a valid page\n", dst);
248 		return;
249 	}
250 
251 	pteo = *ptep;
252 	*ptep = pteo | PT_AP(AP_KRW);
253 	cpu_tlb_flushD_SE(va);
254 
255 	*dst = (unsigned char)ch;
256 
257 	/* make sure the caches and memory are in sync */
258 	cpu_cache_syncI_rng((u_int)dst, 4);
259 
260 	*ptep = pteo;
261 	cpu_tlb_flushD_SE(va);
262 }
263 
264 /*
265  * Write bytes to kernel address space for debugger.
266  */
267 void
268 db_write_bytes(addr, size, data)
269 	vm_offset_t	addr;
270 	int	size;
271 	char	*data;
272 {
273 	extern char	etext[];
274 	char	*dst;
275 	int	loop;
276 
277 	dst = (char *)addr;
278 	loop = size;
279 	while (--loop >= 0) {
280 		if ((dst >= (char *)KERNEL_TEXT_BASE) && (dst < etext))
281 			db_write_text(dst, *data);
282 		else {
283 			if (db_validate_address((u_int)dst)) {
284 				db_printf("address %p is invalid\n", dst);
285 				return;
286 			}
287 			*dst = *data;
288 		}
289 		dst++, data++;
290 	}
291 	/* make sure the caches and memory are in sync */
292 	cpu_cache_syncI_rng(addr, size);
293 
294 	/* In case the current page tables have been modified ... */
295 	cpu_tlb_flushID();
296 }
297 
298 void
299 cpu_Debugger()
300 {
301 	asm(".word	0xe7ffffff");
302 }
303 
304 void db_show_intrchain_cmd	__P((db_expr_t addr, int have_addr, db_expr_t count, char *modif));
305 void db_show_panic_cmd	__P((db_expr_t addr, int have_addr, db_expr_t count, char *modif));
306 void db_show_frame_cmd	__P((db_expr_t addr, int have_addr, db_expr_t count, char *modif));
307 
308 const struct db_command db_machine_command_table[] = {
309 	{ "frame",	db_show_frame_cmd,	0, NULL },
310 	{ "intrchain",	db_show_intrchain_cmd,	0, NULL },
311 	{ "panic",	db_show_panic_cmd,	0, NULL },
312 #ifdef ARM32_DB_COMMANDS
313 	ARM32_DB_COMMANDS,
314 #endif
315 	{ NULL, 	NULL, 			0, NULL }
316 };
317 
318 int
319 db_trapper(addr, inst, frame, fault_code)
320 	u_int		addr;
321 	u_int		inst;
322 	trapframe_t	*frame;
323 	int		fault_code;
324 {
325 	if (fault_code == 0) {
326 		if ((inst & ~INSN_COND_MASK) == (BKPT_INST & ~INSN_COND_MASK))
327 			kdb_trap(T_BREAKPOINT, frame);
328 		else
329 			kdb_trap(-1, frame);
330 	} else
331 		return (1);
332 	return (0);
333 }
334 
335 extern u_int esym;
336 extern u_int end;
337 
338 static struct undefined_handler db_uh;
339 
340 void
341 db_machine_init()
342 {
343 #ifndef __ELF__
344 	struct exec *kernexec = (struct exec *)KERNEL_TEXT_BASE;
345 	int len;
346 #endif
347 
348 #ifdef __ELF__
349 	printf("[ ELF symbol tables not supported ]\n");
350 #else
351 	/*
352 	 * The boot loader currently loads the kernel with the a.out
353 	 * header still attached.
354 	 */
355 
356 	if (kernexec->a_syms == 0) {
357 		printf("[No symbol table]\n");
358 	} else {
359 		/* cover the symbols themselves (what is the int for?? XXX) */
360 		esym = (int)&end + kernexec->a_syms + sizeof(int);
361 
362 		/*
363 		 * and the string table.  (int containing size of string
364 		 * table is included in string table size).
365 		 */
366 		len = *((u_int *)esym);
367 		esym += (len + (sizeof(u_int) - 1)) & ~(sizeof(u_int) - 1);
368 	}
369 #endif
370 
371 	/*
372 	 * We get called before malloc() is available, so supply a static
373 	 * struct undefined_handler.
374 	 */
375 	db_uh.uh_handler = db_trapper;
376 	install_coproc_handler_static(0, &db_uh);
377 }
378 
379 u_int
380 db_fetch_reg(reg, db_regs)
381 	int reg;
382 	db_regs_t *db_regs;
383 {
384 
385 	switch (reg) {
386 	case 0:
387 		return (db_regs->tf_r0);
388 	case 1:
389 		return (db_regs->tf_r1);
390 	case 2:
391 		return (db_regs->tf_r2);
392 	case 3:
393 		return (db_regs->tf_r3);
394 	case 4:
395 		return (db_regs->tf_r4);
396 	case 5:
397 		return (db_regs->tf_r5);
398 	case 6:
399 		return (db_regs->tf_r6);
400 	case 7:
401 		return (db_regs->tf_r7);
402 	case 8:
403 		return (db_regs->tf_r8);
404 	case 9:
405 		return (db_regs->tf_r9);
406 	case 10:
407 		return (db_regs->tf_r10);
408 	case 11:
409 		return (db_regs->tf_r11);
410 	case 12:
411 		return (db_regs->tf_r12);
412 	case 13:
413 		return (db_regs->tf_svc_sp);
414 	case 14:
415 		return (db_regs->tf_svc_lr);
416 	case 15:
417 		return (db_regs->tf_pc);
418 	default:
419 		panic("db_fetch_reg: botch");
420 	}
421 }
422 
423 u_int
424 branch_taken(insn, pc, db_regs)
425 	u_int insn;
426 	u_int pc;
427 	db_regs_t *db_regs;
428 {
429 	u_int addr, nregs;
430 
431 	switch ((insn >> 24) & 0xf) {
432 	case 0xa:	/* b ... */
433 	case 0xb:	/* bl ... */
434 		addr = ((insn << 2) & 0x03ffffff);
435 		if (addr & 0x02000000)
436 			addr |= 0xfc000000;
437 		return (pc + 8 + addr);
438 	case 0x7:	/* ldr pc, [pc, reg, lsl #2] */
439 		addr = db_fetch_reg(insn & 0xf, db_regs);
440 		addr = pc + 8 + (addr << 2);
441 		db_read_bytes(addr, 4, (char *)&addr);
442 		return (addr);
443 	case 0x1:	/* mov pc, reg */
444 		addr = db_fetch_reg(insn & 0xf, db_regs);
445 		return (addr);
446 	case 0x8:	/* ldmxx reg, {..., pc} */
447 	case 0x9:
448 		addr = db_fetch_reg((insn >> 16) & 0xf, db_regs);
449 		nregs = (insn  & 0x5555) + ((insn  >> 1) & 0x5555);
450 		nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
451 		nregs = (nregs + (nregs >> 4)) & 0x0f0f;
452 		nregs = (nregs + (nregs >> 8)) & 0x001f;
453 		switch ((insn >> 23) & 0x3) {
454 		case 0x0:	/* ldmda */
455 			addr = addr - 0;
456 			break;
457 		case 0x1:	/* ldmia */
458 			addr = addr + 0 + ((nregs - 1) << 2);
459 			break;
460 		case 0x2:	/* ldmdb */
461 			addr = addr - 4;
462 			break;
463 		case 0x3:	/* ldmib */
464 			addr = addr + 4 + ((nregs - 1) << 2);
465 			break;
466 		}
467 		db_read_bytes(addr, 4, (char *)&addr);
468 		return (addr);
469 	default:
470 		panic("branch_taken: botch");
471 	}
472 }
473