xref: /netbsd-src/sys/arch/arm/arm32/arm32_machdep.c (revision cac8e449158efc7261bebc8657cbb0125a2cfdde)
1 /*	$NetBSD: arm32_machdep.c,v 1.57 2008/07/02 17:28:55 ad Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1998 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Mark Brinicombe
21  *	for the NetBSD Project.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * Machine dependant functions for kernel setup
39  *
40  * Created      : 17/09/94
41  * Updated	: 18/04/01 updated for new wscons
42  */
43 
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.57 2008/07/02 17:28:55 ad Exp $");
46 
47 #include "opt_md.h"
48 #include "opt_cpuoptions.h"
49 #include "opt_pmap_debug.h"
50 
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/reboot.h>
54 #include <sys/proc.h>
55 #include <sys/user.h>
56 #include <sys/kernel.h>
57 #include <sys/mbuf.h>
58 #include <sys/mount.h>
59 #include <sys/buf.h>
60 #include <sys/msgbuf.h>
61 #include <sys/device.h>
62 #include <uvm/uvm_extern.h>
63 #include <sys/sysctl.h>
64 #include <sys/cpu.h>
65 
66 #include <dev/cons.h>
67 
68 #include <arm/arm32/katelib.h>
69 #include <arm/arm32/machdep.h>
70 #include <machine/bootconfig.h>
71 
72 #include "md.h"
73 
74 struct vm_map *mb_map = NULL;
75 struct vm_map *phys_map = NULL;
76 
77 extern int physmem;
78 
79 #if NMD > 0 && defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE)
80 extern size_t md_root_size;		/* Memory disc size */
81 #endif	/* NMD && MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */
82 
83 pv_addr_t kernelstack;
84 
85 /* the following is used externally (sysctl_hw) */
86 char	machine[] = MACHINE;		/* from <machine/param.h> */
87 char	machine_arch[] = MACHINE_ARCH;	/* from <machine/param.h> */
88 
89 /* Our exported CPU info; we can have only one. */
90 struct cpu_info cpu_info_store = {
91 	.ci_cpl = IPL_HIGH,
92 #ifndef PROCESS_ID_IS_CURLWP
93 	.ci_curlwp = &lwp0,
94 #endif
95 };
96 
97 void *	msgbufaddr;
98 extern paddr_t msgbufphys;
99 
100 int kernel_debug = 0;
101 
102 struct user *proc0paddr;
103 
104 /* exported variable to be filled in by the bootloaders */
105 char *booted_kernel;
106 
107 
108 /* Prototypes */
109 
110 void data_abort_handler		__P((trapframe_t *frame));
111 void prefetch_abort_handler	__P((trapframe_t *frame));
112 extern void configure		__P((void));
113 
114 /*
115  * arm32_vector_init:
116  *
117  *	Initialize the vector page, and select whether or not to
118  *	relocate the vectors.
119  *
120  *	NOTE: We expect the vector page to be mapped at its expected
121  *	destination.
122  */
123 void
124 arm32_vector_init(vaddr_t va, int which)
125 {
126 	extern unsigned int page0[], page0_data[];
127 	unsigned int *vectors = (int *) va;
128 	unsigned int *vectors_data = vectors + (page0_data - page0);
129 	int vec;
130 
131 	/*
132 	 * Loop through the vectors we're taking over, and copy the
133 	 * vector's insn and data word.
134 	 */
135 	for (vec = 0; vec < ARM_NVEC; vec++) {
136 		if ((which & (1 << vec)) == 0) {
137 			/* Don't want to take over this vector. */
138 			continue;
139 		}
140 		vectors[vec] = page0[vec];
141 		vectors_data[vec] = page0_data[vec];
142 	}
143 
144 	/* Now sync the vectors. */
145 	cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
146 
147 	vector_page = va;
148 
149 	if (va == ARM_VECTORS_HIGH) {
150 		/*
151 		 * Assume the MD caller knows what it's doing here, and
152 		 * really does want the vector page relocated.
153 		 *
154 		 * Note: This has to be done here (and not just in
155 		 * cpu_setup()) because the vector page needs to be
156 		 * accessible *before* cpu_startup() is called.
157 		 * Think ddb(9) ...
158 		 *
159 		 * NOTE: If the CPU control register is not readable,
160 		 * this will totally fail!  We'll just assume that
161 		 * any system that has high vector support has a
162 		 * readable CPU control register, for now.  If we
163 		 * ever encounter one that does not, we'll have to
164 		 * rethink this.
165 		 */
166 		cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
167 	}
168 }
169 
170 /*
171  * Debug function just to park the CPU
172  */
173 
174 void
175 halt()
176 {
177 	while (1)
178 		cpu_sleep(0);
179 }
180 
181 
182 /* Sync the discs and unmount the filesystems */
183 
184 void
185 bootsync(void)
186 {
187 	static int bootsyncdone = 0;
188 
189 	if (bootsyncdone) return;
190 
191 	bootsyncdone = 1;
192 
193 	/* Make sure we can still manage to do things */
194 	if (GetCPSR() & I32_bit) {
195 		/*
196 		 * If we get here then boot has been called without RB_NOSYNC
197 		 * and interrupts were disabled. This means the boot() call
198 		 * did not come from a user process e.g. shutdown, but must
199 		 * have come from somewhere in the kernel.
200 		 */
201 		IRQenable;
202 		printf("Warning IRQ's disabled during boot()\n");
203 	}
204 
205 	vfs_shutdown();
206 }
207 
208 /*
209  * void cpu_startup(void)
210  *
211  * Machine dependant startup code.
212  *
213  */
214 void
215 cpu_startup()
216 {
217 	vaddr_t minaddr;
218 	vaddr_t maxaddr;
219 	u_int loop;
220 	char pbuf[9];
221 
222 	/* Set the CPU control register */
223 	cpu_setup(boot_args);
224 
225 	/* Lock down zero page */
226 	vector_page_setprot(VM_PROT_READ);
227 
228 	/*
229 	 * Give pmap a chance to set up a few more things now the vm
230 	 * is initialised
231 	 */
232 	pmap_postinit();
233 
234 	/*
235 	 * Initialize error message buffer (at end of core).
236 	 */
237 
238 	/* msgbufphys was setup during the secondary boot strap */
239 	for (loop = 0; loop < btoc(MSGBUFSIZE); ++loop)
240 		pmap_kenter_pa((vaddr_t)msgbufaddr + loop * PAGE_SIZE,
241 		    msgbufphys + loop * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE);
242 	pmap_update(pmap_kernel());
243 	initmsgbuf(msgbufaddr, round_page(MSGBUFSIZE));
244 
245 	/*
246 	 * Identify ourselves for the msgbuf (everything printed earlier will
247 	 * not be buffered).
248 	 */
249 	printf("%s%s", copyright, version);
250 
251 	format_bytes(pbuf, sizeof(pbuf), arm_ptob(physmem));
252 	printf("total memory = %s\n", pbuf);
253 
254 	minaddr = 0;
255 
256 	/*
257 	 * Allocate a submap for physio
258 	 */
259 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
260 				   VM_PHYS_SIZE, 0, false, NULL);
261 
262 	/*
263 	 * Finally, allocate mbuf cluster submap.
264 	 */
265 	mb_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
266 				 nmbclusters * mclbytes, VM_MAP_INTRSAFE,
267 				 false, NULL);
268 
269 	format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
270 	printf("avail memory = %s\n", pbuf);
271 
272 	curpcb = &lwp0.l_addr->u_pcb;
273 	curpcb->pcb_flags = 0;
274 	curpcb->pcb_un.un_32.pcb32_sp = (u_int)lwp0.l_addr +
275 	    USPACE_SVC_STACK_TOP;
276 
277         curpcb->pcb_tf = (struct trapframe *)curpcb->pcb_un.un_32.pcb32_sp - 1;
278 }
279 
280 /*
281  * machine dependent system variables.
282  */
283 static int
284 sysctl_machdep_booted_device(SYSCTLFN_ARGS)
285 {
286 	struct sysctlnode node;
287 
288 	if (booted_device == NULL)
289 		return (EOPNOTSUPP);
290 
291 	node = *rnode;
292 	node.sysctl_data = booted_device->dv_xname;
293 	node.sysctl_size = strlen(booted_device->dv_xname) + 1;
294 	return (sysctl_lookup(SYSCTLFN_CALL(&node)));
295 }
296 
297 static int
298 sysctl_machdep_booted_kernel(SYSCTLFN_ARGS)
299 {
300 	struct sysctlnode node;
301 
302 	if (booted_kernel == NULL || booted_kernel[0] == '\0')
303 		return (EOPNOTSUPP);
304 
305 	node = *rnode;
306 	node.sysctl_data = booted_kernel;
307 	node.sysctl_size = strlen(booted_kernel) + 1;
308 	return (sysctl_lookup(SYSCTLFN_CALL(&node)));
309 }
310 
311 static int
312 sysctl_machdep_powersave(SYSCTLFN_ARGS)
313 {
314 	struct sysctlnode node = *rnode;
315 	int error, newval;
316 
317 	newval = cpu_do_powersave;
318 	node.sysctl_data = &newval;
319 	if (cpufuncs.cf_sleep == (void *) cpufunc_nullop)
320 		node.sysctl_flags &= ~CTLFLAG_READWRITE;
321 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
322 	if (error || newp == NULL || newval == cpu_do_powersave)
323 		return (error);
324 
325 	if (newval < 0 || newval > 1)
326 		return (EINVAL);
327 	cpu_do_powersave = newval;
328 
329 	return (0);
330 }
331 
332 SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup")
333 {
334 
335 	sysctl_createv(clog, 0, NULL, NULL,
336 		       CTLFLAG_PERMANENT,
337 		       CTLTYPE_NODE, "machdep", NULL,
338 		       NULL, 0, NULL, 0,
339 		       CTL_MACHDEP, CTL_EOL);
340 
341 	sysctl_createv(clog, 0, NULL, NULL,
342 		       CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
343 		       CTLTYPE_INT, "debug", NULL,
344 		       NULL, 0, &kernel_debug, 0,
345 		       CTL_MACHDEP, CPU_DEBUG, CTL_EOL);
346 	sysctl_createv(clog, 0, NULL, NULL,
347 		       CTLFLAG_PERMANENT,
348 		       CTLTYPE_STRING, "booted_device", NULL,
349 		       sysctl_machdep_booted_device, 0, NULL, 0,
350 		       CTL_MACHDEP, CPU_BOOTED_DEVICE, CTL_EOL);
351 	sysctl_createv(clog, 0, NULL, NULL,
352 		       CTLFLAG_PERMANENT,
353 		       CTLTYPE_STRING, "booted_kernel", NULL,
354 		       sysctl_machdep_booted_kernel, 0, NULL, 0,
355 		       CTL_MACHDEP, CPU_BOOTED_KERNEL, CTL_EOL);
356 	sysctl_createv(clog, 0, NULL, NULL,
357 		       CTLFLAG_PERMANENT,
358 		       CTLTYPE_STRUCT, "console_device", NULL,
359 		       sysctl_consdev, 0, NULL, sizeof(dev_t),
360 		       CTL_MACHDEP, CPU_CONSDEV, CTL_EOL);
361 	sysctl_createv(clog, 0, NULL, NULL,
362 		       CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
363 		       CTLTYPE_INT, "powersave", NULL,
364 		       sysctl_machdep_powersave, 0, &cpu_do_powersave, 0,
365 		       CTL_MACHDEP, CPU_POWERSAVE, CTL_EOL);
366 }
367 
368 void
369 parse_mi_bootargs(args)
370 	char *args;
371 {
372 	int integer;
373 
374 	if (get_bootconf_option(args, "single", BOOTOPT_TYPE_BOOLEAN, &integer)
375 	    || get_bootconf_option(args, "-s", BOOTOPT_TYPE_BOOLEAN, &integer))
376 		if (integer)
377 			boothowto |= RB_SINGLE;
378 	if (get_bootconf_option(args, "kdb", BOOTOPT_TYPE_BOOLEAN, &integer)
379 	    || get_bootconf_option(args, "-k", BOOTOPT_TYPE_BOOLEAN, &integer))
380 		if (integer)
381 			boothowto |= RB_KDB;
382 	if (get_bootconf_option(args, "ask", BOOTOPT_TYPE_BOOLEAN, &integer)
383 	    || get_bootconf_option(args, "-a", BOOTOPT_TYPE_BOOLEAN, &integer))
384 		if (integer)
385 			boothowto |= RB_ASKNAME;
386 
387 #ifdef PMAP_DEBUG
388 	if (get_bootconf_option(args, "pmapdebug", BOOTOPT_TYPE_INT, &integer)) {
389 		pmap_debug_level = integer;
390 		pmap_debug(pmap_debug_level);
391 	}
392 #endif	/* PMAP_DEBUG */
393 
394 /*	if (get_bootconf_option(args, "nbuf", BOOTOPT_TYPE_INT, &integer))
395 		bufpages = integer;*/
396 
397 #if NMD > 0 && defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE)
398 	if (get_bootconf_option(args, "memorydisc", BOOTOPT_TYPE_INT, &integer)
399 	    || get_bootconf_option(args, "memorydisk", BOOTOPT_TYPE_INT, &integer)) {
400 		md_root_size = integer;
401 		md_root_size *= 1024;
402 		if (md_root_size < 32*1024)
403 			md_root_size = 32*1024;
404 		if (md_root_size > 2048*1024)
405 			md_root_size = 2048*1024;
406 	}
407 #endif	/* NMD && MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */
408 
409 	if (get_bootconf_option(args, "quiet", BOOTOPT_TYPE_BOOLEAN, &integer)
410 	    || get_bootconf_option(args, "-q", BOOTOPT_TYPE_BOOLEAN, &integer))
411 		if (integer)
412 			boothowto |= AB_QUIET;
413 	if (get_bootconf_option(args, "verbose", BOOTOPT_TYPE_BOOLEAN, &integer)
414 	    || get_bootconf_option(args, "-v", BOOTOPT_TYPE_BOOLEAN, &integer))
415 		if (integer)
416 			boothowto |= AB_VERBOSE;
417 }
418 
419 void
420 cpu_need_resched(struct cpu_info *ci, int flags)
421 {
422 	bool immed = (flags & RESCHED_IMMED) != 0;
423 
424 	if (ci->ci_want_resched && !immed)
425 		return;
426 
427 	ci->ci_want_resched = 1;
428 	if (curlwp != ci->ci_data.cpu_idlelwp)
429 		setsoftast();
430 }
431 
432 bool
433 cpu_intr_p(void)
434 {
435 	return curcpu()->ci_intr_depth != 0;
436 }
437 
438 #ifdef __HAVE_FAST_SOFTINTS
439 #if IPL_SOFTSERIAL != IPL_SOFTNET + 1
440 #error IPLs are screwed up
441 #endif
442 #if IPL_SOFTNET != IPL_SOFTBIO + 1
443 #error IPLs are screwed up
444 #endif
445 #if IPL_SOFTBIO != IPL_SOFTCLOCK + 1
446 #error IPLs are screwed up
447 #endif
448 #if !(IPL_SOFTCLOCK > IPL_NONE)
449 #error IPLs are screwed up
450 #endif
451 #define	SOFTINT2IPLMAP \
452 	((IPL_SOFTSERIAL << (SOFTINT_SERIAL * 4)) | \
453 	 (IPL_SOFTNET    << (SOFTINT_NET    * 4)) | \
454 	 (IPL_SOFTBIO    << (SOFTINT_BIO    * 4)) | \
455 	 (IPL_SOFTCLOCK  << (SOFTINT_CLOCK  * 4)))
456 #define	SOFTINT2IPL(l)	((SOFTINT2IPLMAP >> ((l) * 4)) & 0x0f)
457 
458 /*
459  * This returns a mask of softint IPLs that be dispatch at <ipl>
460  * We want to shift 2 since we want a mask of <ipl> + 1.
461  * SOFTIPLMASK(IPL_NONE)	= 0xfffffffe
462  * SOFTIPLMASK(IPL_SOFTCLOCK)	= 0xffffffe0
463  */
464 #define	SOFTIPLMASK(ipl) ((~((2 << (ipl)) - 1)) & (15 << IPL_SOFTCLOCK))
465 
466 void softint_switch(lwp_t *, int);
467 
468 void
469 softint_trigger(uintptr_t mask)
470 {
471 	curcpu()->ci_softints |= mask;
472 }
473 
474 void
475 softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep)
476 {
477 	lwp_t ** lp = &curcpu()->ci_softlwps[level];
478 	KASSERT(*lp == NULL || *lp == l);
479 	*lp = l;
480 	*machdep = 1 << SOFTINT2IPL(level);
481 }
482 
483 void
484 dosoftints(void)
485 {
486 	struct cpu_info * const ci = curcpu();
487 	const int opl = ci->ci_cpl;
488 	const uint32_t softiplmask = SOFTIPLMASK(opl);
489 
490 	for (;;) {
491 		u_int softints = ci->ci_softints & softiplmask;
492 		if (softints == 0)
493 			return;
494 		ci->ci_cpl = IPL_HIGH;
495 #define	DOSOFTINT(n) \
496 		if (softints & (1 << IPL_SOFT ## n)) { \
497 			ci->ci_softints &= ~(1 << IPL_SOFT ## n); \
498 			softint_switch(ci->ci_softlwps[SOFTINT_ ## n], \
499 			    IPL_SOFT ## n); \
500 			ci->ci_cpl = opl; \
501 			continue; \
502 		}
503 		DOSOFTINT(SERIAL);
504 		DOSOFTINT(NET);
505 		DOSOFTINT(BIO);
506 		DOSOFTINT(CLOCK);
507 		panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl);
508 	}
509 }
510 #endif /* __HAVE_FAST_SOFTINTS */
511