1 /* $NetBSD: arm32_machdep.c,v 1.115 2017/10/31 12:37:23 martin Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * Machine dependent functions for kernel setup 39 * 40 * Created : 17/09/94 41 * Updated : 18/04/01 updated for new wscons 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.115 2017/10/31 12:37:23 martin Exp $"); 46 47 #include "opt_modular.h" 48 #include "opt_md.h" 49 #include "opt_pmap_debug.h" 50 #include "opt_multiprocessor.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/reboot.h> 55 #include <sys/proc.h> 56 #include <sys/kauth.h> 57 #include <sys/kernel.h> 58 #include <sys/mbuf.h> 59 #include <sys/mount.h> 60 #include <sys/buf.h> 61 #include <sys/msgbuf.h> 62 #include <sys/device.h> 63 #include <sys/sysctl.h> 64 #include <sys/cpu.h> 65 #include <sys/intr.h> 66 #include <sys/module.h> 67 #include <sys/atomic.h> 68 #include <sys/xcall.h> 69 #include <sys/ipi.h> 70 71 #include <uvm/uvm_extern.h> 72 73 #include <dev/cons.h> 74 #include <dev/mm.h> 75 76 #include <arm/locore.h> 77 78 #include <arm/arm32/machdep.h> 79 80 #include <machine/bootconfig.h> 81 #include <machine/pcb.h> 82 83 void (*cpu_reset_address)(void); /* Used by locore */ 84 paddr_t cpu_reset_address_paddr; /* Used by locore */ 85 86 struct vm_map *phys_map = NULL; 87 88 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 89 extern size_t md_root_size; /* Memory disc size */ 90 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 91 92 pv_addr_t kernelstack; 93 pv_addr_t abtstack; 94 pv_addr_t fiqstack; 95 pv_addr_t irqstack; 96 pv_addr_t undstack; 97 pv_addr_t idlestack; 98 99 void * msgbufaddr; 100 extern paddr_t msgbufphys; 101 102 int kernel_debug = 0; 103 int cpu_printfataltraps = 0; 104 int cpu_fpu_present; 105 int cpu_hwdiv_present; 106 int cpu_neon_present; 107 int cpu_simd_present; 108 int cpu_simdex_present; 109 int cpu_umull_present; 110 int cpu_synchprim_present; 111 int cpu_unaligned_sigbus; 112 const char *cpu_arch = ""; 113 114 int cpu_instruction_set_attributes[6]; 115 int cpu_memory_model_features[4]; 116 int cpu_processor_features[2]; 117 int cpu_media_and_vfp_features[2]; 118 119 /* exported variable to be filled in by the bootloaders */ 120 char *booted_kernel; 121 122 /* Prototypes */ 123 124 void data_abort_handler(trapframe_t *frame); 125 void prefetch_abort_handler(trapframe_t *frame); 126 extern void configure(void); 127 128 /* 129 * arm32_vector_init: 130 * 131 * Initialize the vector page, and select whether or not to 132 * relocate the vectors. 133 * 134 * NOTE: We expect the vector page to be mapped at its expected 135 * destination. 136 */ 137 void 138 arm32_vector_init(vaddr_t va, int which) 139 { 140 #if defined(CPU_ARMV7) || defined(CPU_ARM11) || defined(ARM_HAS_VBAR) 141 /* 142 * If this processor has the security extension, don't bother 143 * to move/map the vector page. Simply point VBAR to the copy 144 * that exists in the .text segment. 145 */ 146 #ifndef ARM_HAS_VBAR 147 if (va == ARM_VECTORS_LOW 148 && (armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0) { 149 #endif 150 extern const uint32_t page0rel[]; 151 vector_page = (vaddr_t)page0rel; 152 KASSERT((vector_page & 0x1f) == 0); 153 armreg_vbar_write(vector_page); 154 #ifdef VERBOSE_INIT_ARM 155 printf(" vbar=%p", page0rel); 156 #endif 157 cpu_control(CPU_CONTROL_VECRELOC, 0); 158 return; 159 #ifndef ARM_HAS_VBAR 160 } 161 #endif 162 #endif 163 #ifndef ARM_HAS_VBAR 164 if (CPU_IS_PRIMARY(curcpu())) { 165 extern unsigned int page0[], page0_data[]; 166 unsigned int *vectors = (int *) va; 167 unsigned int *vectors_data = vectors + (page0_data - page0); 168 int vec; 169 170 /* 171 * Loop through the vectors we're taking over, and copy the 172 * vector's insn and data word. 173 */ 174 for (vec = 0; vec < ARM_NVEC; vec++) { 175 if ((which & (1 << vec)) == 0) { 176 /* Don't want to take over this vector. */ 177 continue; 178 } 179 vectors[vec] = page0[vec]; 180 vectors_data[vec] = page0_data[vec]; 181 } 182 183 /* Now sync the vectors. */ 184 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 185 186 vector_page = va; 187 } 188 189 if (va == ARM_VECTORS_HIGH) { 190 /* 191 * Assume the MD caller knows what it's doing here, and 192 * really does want the vector page relocated. 193 * 194 * Note: This has to be done here (and not just in 195 * cpu_setup()) because the vector page needs to be 196 * accessible *before* cpu_startup() is called. 197 * Think ddb(9) ... 198 * 199 * NOTE: If the CPU control register is not readable, 200 * this will totally fail! We'll just assume that 201 * any system that has high vector support has a 202 * readable CPU control register, for now. If we 203 * ever encounter one that does not, we'll have to 204 * rethink this. 205 */ 206 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 207 } 208 #endif 209 } 210 211 /* 212 * Debug function just to park the CPU 213 */ 214 215 void 216 halt(void) 217 { 218 while (1) 219 cpu_sleep(0); 220 } 221 222 223 /* Sync the discs, unmount the filesystems, and adjust the todr */ 224 225 void 226 bootsync(void) 227 { 228 static bool bootsyncdone = false; 229 230 if (bootsyncdone) return; 231 232 bootsyncdone = true; 233 234 /* Make sure we can still manage to do things */ 235 if (GetCPSR() & I32_bit) { 236 /* 237 * If we get here then boot has been called without RB_NOSYNC 238 * and interrupts were disabled. This means the boot() call 239 * did not come from a user process e.g. shutdown, but must 240 * have come from somewhere in the kernel. 241 */ 242 IRQenable; 243 printf("Warning IRQ's disabled during boot()\n"); 244 } 245 246 vfs_shutdown(); 247 248 resettodr(); 249 } 250 251 /* 252 * void cpu_startup(void) 253 * 254 * Machine dependent startup code. 255 * 256 */ 257 void 258 cpu_startup(void) 259 { 260 vaddr_t minaddr; 261 vaddr_t maxaddr; 262 char pbuf[9]; 263 264 /* 265 * Until we better locking, we have to live under the kernel lock. 266 */ 267 //KERNEL_LOCK(1, NULL); 268 269 /* Set the CPU control register */ 270 cpu_setup(boot_args); 271 272 #ifndef ARM_HAS_VBAR 273 /* Lock down zero page */ 274 vector_page_setprot(VM_PROT_READ); 275 #endif 276 277 /* 278 * Give pmap a chance to set up a few more things now the vm 279 * is initialised 280 */ 281 pmap_postinit(); 282 283 /* 284 * Initialize error message buffer (at end of core). 285 */ 286 287 /* msgbufphys was setup during the secondary boot strap */ 288 if (!pmap_extract(pmap_kernel(), (vaddr_t)msgbufaddr, NULL)) { 289 for (u_int loop = 0; loop < btoc(MSGBUFSIZE); ++loop) { 290 pmap_kenter_pa((vaddr_t)msgbufaddr + loop * PAGE_SIZE, 291 msgbufphys + loop * PAGE_SIZE, 292 VM_PROT_READ|VM_PROT_WRITE, 0); 293 } 294 } 295 pmap_update(pmap_kernel()); 296 initmsgbuf(msgbufaddr, round_page(MSGBUFSIZE)); 297 298 /* 299 * Identify ourselves for the msgbuf (everything printed earlier will 300 * not be buffered). 301 */ 302 printf("%s%s", copyright, version); 303 304 format_bytes(pbuf, sizeof(pbuf), arm_ptob(physmem)); 305 printf("total memory = %s\n", pbuf); 306 307 minaddr = 0; 308 309 /* 310 * Allocate a submap for physio 311 */ 312 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 313 VM_PHYS_SIZE, 0, false, NULL); 314 315 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 316 printf("avail memory = %s\n", pbuf); 317 318 /* 319 * This is actually done by initarm_common, but not all ports use it 320 * yet so do it here to catch them as well 321 */ 322 struct lwp * const l = &lwp0; 323 struct pcb * const pcb = lwp_getpcb(l); 324 325 /* Zero out the PCB. */ 326 memset(pcb, 0, sizeof(*pcb)); 327 328 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP; 329 pcb->pcb_ksp -= sizeof(struct trapframe); 330 331 struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp; 332 333 /* Zero out the trapframe. */ 334 memset(tf, 0, sizeof(*tf)); 335 lwp_settrapframe(l, tf); 336 337 #if defined(__ARMEB__) 338 tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0); 339 #else 340 tf->tf_spsr = PSR_USR32_MODE; 341 #endif 342 } 343 344 /* 345 * machine dependent system variables. 346 */ 347 static int 348 sysctl_machdep_booted_device(SYSCTLFN_ARGS) 349 { 350 struct sysctlnode node; 351 352 if (booted_device == NULL) 353 return (EOPNOTSUPP); 354 355 node = *rnode; 356 node.sysctl_data = __UNCONST(device_xname(booted_device)); 357 node.sysctl_size = strlen(device_xname(booted_device)) + 1; 358 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 359 } 360 361 static int 362 sysctl_machdep_booted_kernel(SYSCTLFN_ARGS) 363 { 364 struct sysctlnode node; 365 366 if (booted_kernel == NULL || booted_kernel[0] == '\0') 367 return (EOPNOTSUPP); 368 369 node = *rnode; 370 node.sysctl_data = booted_kernel; 371 node.sysctl_size = strlen(booted_kernel) + 1; 372 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 373 } 374 375 static int 376 sysctl_machdep_cpu_arch(SYSCTLFN_ARGS) 377 { 378 struct sysctlnode node = *rnode; 379 node.sysctl_data = __UNCONST(cpu_arch); 380 node.sysctl_size = strlen(cpu_arch) + 1; 381 return sysctl_lookup(SYSCTLFN_CALL(&node)); 382 } 383 384 static int 385 sysctl_machdep_powersave(SYSCTLFN_ARGS) 386 { 387 struct sysctlnode node = *rnode; 388 int error, newval; 389 390 newval = cpu_do_powersave; 391 node.sysctl_data = &newval; 392 if (cpufuncs.cf_sleep == (void *) cpufunc_nullop) 393 node.sysctl_flags &= ~CTLFLAG_READWRITE; 394 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 395 if (error || newp == NULL || newval == cpu_do_powersave) 396 return (error); 397 398 if (newval < 0 || newval > 1) 399 return (EINVAL); 400 cpu_do_powersave = newval; 401 402 return (0); 403 } 404 405 SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup") 406 { 407 408 sysctl_createv(clog, 0, NULL, NULL, 409 CTLFLAG_PERMANENT, 410 CTLTYPE_NODE, "machdep", NULL, 411 NULL, 0, NULL, 0, 412 CTL_MACHDEP, CTL_EOL); 413 414 sysctl_createv(clog, 0, NULL, NULL, 415 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 416 CTLTYPE_INT, "debug", NULL, 417 NULL, 0, &kernel_debug, 0, 418 CTL_MACHDEP, CPU_DEBUG, CTL_EOL); 419 sysctl_createv(clog, 0, NULL, NULL, 420 CTLFLAG_PERMANENT, 421 CTLTYPE_STRING, "booted_device", NULL, 422 sysctl_machdep_booted_device, 0, NULL, 0, 423 CTL_MACHDEP, CPU_BOOTED_DEVICE, CTL_EOL); 424 sysctl_createv(clog, 0, NULL, NULL, 425 CTLFLAG_PERMANENT, 426 CTLTYPE_STRING, "booted_kernel", NULL, 427 sysctl_machdep_booted_kernel, 0, NULL, 0, 428 CTL_MACHDEP, CPU_BOOTED_KERNEL, CTL_EOL); 429 sysctl_createv(clog, 0, NULL, NULL, 430 CTLFLAG_PERMANENT, 431 CTLTYPE_STRUCT, "console_device", NULL, 432 sysctl_consdev, 0, NULL, sizeof(dev_t), 433 CTL_MACHDEP, CPU_CONSDEV, CTL_EOL); 434 sysctl_createv(clog, 0, NULL, NULL, 435 CTLFLAG_PERMANENT, 436 CTLTYPE_STRING, "cpu_arch", NULL, 437 sysctl_machdep_cpu_arch, 0, NULL, 0, 438 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 439 sysctl_createv(clog, 0, NULL, NULL, 440 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 441 CTLTYPE_INT, "powersave", NULL, 442 sysctl_machdep_powersave, 0, &cpu_do_powersave, 0, 443 CTL_MACHDEP, CPU_POWERSAVE, CTL_EOL); 444 sysctl_createv(clog, 0, NULL, NULL, 445 CTLFLAG_PERMANENT|CTLFLAG_IMMEDIATE, 446 CTLTYPE_INT, "cpu_id", NULL, 447 NULL, curcpu()->ci_arm_cpuid, NULL, 0, 448 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 449 #ifdef FPU_VFP 450 sysctl_createv(clog, 0, NULL, NULL, 451 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 452 CTLTYPE_INT, "fpu_id", NULL, 453 NULL, 0, &cpu_info_store.ci_vfp_id, 0, 454 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 455 #endif 456 sysctl_createv(clog, 0, NULL, NULL, 457 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 458 CTLTYPE_INT, "fpu_present", NULL, 459 NULL, 0, &cpu_fpu_present, 0, 460 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 461 sysctl_createv(clog, 0, NULL, NULL, 462 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 463 CTLTYPE_INT, "hwdiv_present", NULL, 464 NULL, 0, &cpu_hwdiv_present, 0, 465 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 466 sysctl_createv(clog, 0, NULL, NULL, 467 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 468 CTLTYPE_INT, "neon_present", NULL, 469 NULL, 0, &cpu_neon_present, 0, 470 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 471 sysctl_createv(clog, 0, NULL, NULL, 472 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 473 CTLTYPE_STRUCT, "id_isar", NULL, 474 NULL, 0, 475 cpu_instruction_set_attributes, 476 sizeof(cpu_instruction_set_attributes), 477 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 478 sysctl_createv(clog, 0, NULL, NULL, 479 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 480 CTLTYPE_STRUCT, "id_mmfr", NULL, 481 NULL, 0, 482 cpu_memory_model_features, 483 sizeof(cpu_memory_model_features), 484 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 485 sysctl_createv(clog, 0, NULL, NULL, 486 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 487 CTLTYPE_STRUCT, "id_pfr", NULL, 488 NULL, 0, 489 cpu_processor_features, 490 sizeof(cpu_processor_features), 491 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 492 sysctl_createv(clog, 0, NULL, NULL, 493 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 494 CTLTYPE_STRUCT, "id_mvfr", NULL, 495 NULL, 0, 496 cpu_media_and_vfp_features, 497 sizeof(cpu_media_and_vfp_features), 498 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 499 sysctl_createv(clog, 0, NULL, NULL, 500 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 501 CTLTYPE_INT, "simd_present", NULL, 502 NULL, 0, &cpu_simd_present, 0, 503 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 504 sysctl_createv(clog, 0, NULL, NULL, 505 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 506 CTLTYPE_INT, "simdex_present", NULL, 507 NULL, 0, &cpu_simdex_present, 0, 508 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 509 sysctl_createv(clog, 0, NULL, NULL, 510 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 511 CTLTYPE_INT, "synchprim_present", NULL, 512 NULL, 0, &cpu_synchprim_present, 0, 513 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 514 sysctl_createv(clog, 0, NULL, NULL, 515 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 516 CTLTYPE_INT, "printfataltraps", NULL, 517 NULL, 0, &cpu_printfataltraps, 0, 518 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 519 cpu_unaligned_sigbus = !CPU_IS_ARMV6_P() && !CPU_IS_ARMV7_P(); 520 sysctl_createv(clog, 0, NULL, NULL, 521 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 522 CTLTYPE_INT, "unaligned_sigbus", 523 SYSCTL_DESCR("Do SIGBUS for fixed unaligned accesses"), 524 NULL, 0, &cpu_unaligned_sigbus, 0, 525 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 526 } 527 528 void 529 parse_mi_bootargs(char *args) 530 { 531 int integer; 532 533 if (get_bootconf_option(args, "single", BOOTOPT_TYPE_BOOLEAN, &integer) 534 || get_bootconf_option(args, "-s", BOOTOPT_TYPE_BOOLEAN, &integer)) 535 if (integer) 536 boothowto |= RB_SINGLE; 537 if (get_bootconf_option(args, "kdb", BOOTOPT_TYPE_BOOLEAN, &integer) 538 || get_bootconf_option(args, "-k", BOOTOPT_TYPE_BOOLEAN, &integer) 539 || get_bootconf_option(args, "-d", BOOTOPT_TYPE_BOOLEAN, &integer)) 540 if (integer) 541 boothowto |= RB_KDB; 542 if (get_bootconf_option(args, "ask", BOOTOPT_TYPE_BOOLEAN, &integer) 543 || get_bootconf_option(args, "-a", BOOTOPT_TYPE_BOOLEAN, &integer)) 544 if (integer) 545 boothowto |= RB_ASKNAME; 546 547 #ifdef PMAP_DEBUG 548 if (get_bootconf_option(args, "pmapdebug", BOOTOPT_TYPE_INT, &integer)) { 549 pmap_debug_level = integer; 550 pmap_debug(pmap_debug_level); 551 } 552 #endif /* PMAP_DEBUG */ 553 554 /* if (get_bootconf_option(args, "nbuf", BOOTOPT_TYPE_INT, &integer)) 555 bufpages = integer;*/ 556 557 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 558 if (get_bootconf_option(args, "memorydisc", BOOTOPT_TYPE_INT, &integer) 559 || get_bootconf_option(args, "memorydisk", BOOTOPT_TYPE_INT, &integer)) { 560 md_root_size = integer; 561 md_root_size *= 1024; 562 if (md_root_size < 32*1024) 563 md_root_size = 32*1024; 564 if (md_root_size > 2048*1024) 565 md_root_size = 2048*1024; 566 } 567 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 568 569 if (get_bootconf_option(args, "quiet", BOOTOPT_TYPE_BOOLEAN, &integer) 570 || get_bootconf_option(args, "-q", BOOTOPT_TYPE_BOOLEAN, &integer)) 571 if (integer) 572 boothowto |= AB_QUIET; 573 if (get_bootconf_option(args, "verbose", BOOTOPT_TYPE_BOOLEAN, &integer) 574 || get_bootconf_option(args, "-v", BOOTOPT_TYPE_BOOLEAN, &integer)) 575 if (integer) 576 boothowto |= AB_VERBOSE; 577 if (get_bootconf_option(args, "debug", BOOTOPT_TYPE_BOOLEAN, &integer) 578 || get_bootconf_option(args, "-x", BOOTOPT_TYPE_BOOLEAN, &integer)) 579 if (integer) 580 boothowto |= AB_DEBUG; 581 } 582 583 #ifdef __HAVE_FAST_SOFTINTS 584 #if IPL_SOFTSERIAL != IPL_SOFTNET + 1 585 #error IPLs are screwed up 586 #elif IPL_SOFTNET != IPL_SOFTBIO + 1 587 #error IPLs are screwed up 588 #elif IPL_SOFTBIO != IPL_SOFTCLOCK + 1 589 #error IPLs are screwed up 590 #elif !(IPL_SOFTCLOCK > IPL_NONE) 591 #error IPLs are screwed up 592 #elif (IPL_NONE != 0) 593 #error IPLs are screwed up 594 #endif 595 596 #ifndef __HAVE_PIC_FAST_SOFTINTS 597 #define SOFTINT2IPLMAP \ 598 (((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \ 599 ((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \ 600 ((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \ 601 ((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4))) 602 #define SOFTINT2IPL(l) ((SOFTINT2IPLMAP >> ((l) * 4)) & 0x0f) 603 604 /* 605 * This returns a mask of softint IPLs that be dispatch at <ipl> 606 * SOFTIPLMASK(IPL_NONE) = 0x0000000f 607 * SOFTIPLMASK(IPL_SOFTCLOCK) = 0x0000000e 608 * SOFTIPLMASK(IPL_SOFTBIO) = 0x0000000c 609 * SOFTIPLMASK(IPL_SOFTNET) = 0x00000008 610 * SOFTIPLMASK(IPL_SOFTSERIAL) = 0x00000000 611 */ 612 #define SOFTIPLMASK(ipl) ((0x0f << (ipl)) & 0x0f) 613 614 void softint_switch(lwp_t *, int); 615 616 void 617 softint_trigger(uintptr_t mask) 618 { 619 curcpu()->ci_softints |= mask; 620 } 621 622 void 623 softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep) 624 { 625 lwp_t ** lp = &l->l_cpu->ci_softlwps[level]; 626 KASSERT(*lp == NULL || *lp == l); 627 *lp = l; 628 *machdep = 1 << SOFTINT2IPL(level); 629 KASSERT(level != SOFTINT_CLOCK || *machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK))); 630 KASSERT(level != SOFTINT_BIO || *machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK))); 631 KASSERT(level != SOFTINT_NET || *machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK))); 632 KASSERT(level != SOFTINT_SERIAL || *machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK))); 633 } 634 635 void 636 dosoftints(void) 637 { 638 struct cpu_info * const ci = curcpu(); 639 const int opl = ci->ci_cpl; 640 const uint32_t softiplmask = SOFTIPLMASK(opl); 641 642 splhigh(); 643 for (;;) { 644 u_int softints = ci->ci_softints & softiplmask; 645 KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0)); 646 KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0); 647 if (softints == 0) { 648 splx(opl); 649 return; 650 } 651 #define DOSOFTINT(n) \ 652 if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \ 653 ci->ci_softints &= \ 654 ~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \ 655 softint_switch(ci->ci_softlwps[SOFTINT_ ## n], \ 656 IPL_SOFT ## n); \ 657 continue; \ 658 } 659 DOSOFTINT(SERIAL); 660 DOSOFTINT(NET); 661 DOSOFTINT(BIO); 662 DOSOFTINT(CLOCK); 663 panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl); 664 } 665 } 666 #endif /* !__HAVE_PIC_FAST_SOFTINTS */ 667 #endif /* __HAVE_FAST_SOFTINTS */ 668 669 #ifdef MODULAR 670 /* 671 * Push any modules loaded by the boot loader. 672 */ 673 void 674 module_init_md(void) 675 { 676 } 677 #endif /* MODULAR */ 678 679 int 680 mm_md_physacc(paddr_t pa, vm_prot_t prot) 681 { 682 if (pa >= physical_start && pa < physical_end) 683 return 0; 684 685 return kauth_authorize_machdep(kauth_cred_get(), 686 KAUTH_MACHDEP_UNMANAGEDMEM, NULL, NULL, NULL, NULL); 687 } 688 689 #ifdef __HAVE_CPU_UAREA_ALLOC_IDLELWP 690 vaddr_t 691 cpu_uarea_alloc_idlelwp(struct cpu_info *ci) 692 { 693 const vaddr_t va = idlestack.pv_va + ci->ci_cpuid * USPACE; 694 // printf("%s: %s: va=%lx\n", __func__, ci->ci_data.cpu_name, va); 695 return va; 696 } 697 #endif 698 699 #ifdef MULTIPROCESSOR 700 void 701 cpu_boot_secondary_processors(void) 702 { 703 #ifdef VERBOSE_INIT_ARM 704 printf("%s: writing mbox with %#x\n", __func__, arm_cpu_hatched); 705 #endif 706 arm_cpu_mbox = arm_cpu_hatched; 707 membar_producer(); 708 #ifdef _ARM_ARCH_7 709 __asm __volatile("sev; sev; sev"); 710 #endif 711 while (arm_cpu_mbox) { 712 __asm("wfe"); 713 } 714 } 715 716 void 717 xc_send_ipi(struct cpu_info *ci) 718 { 719 KASSERT(kpreempt_disabled()); 720 KASSERT(curcpu() != ci); 721 722 intr_ipi_send(ci != NULL ? ci->ci_kcpuset : NULL, IPI_XCALL); 723 } 724 725 void 726 cpu_ipi(struct cpu_info *ci) 727 { 728 KASSERT(kpreempt_disabled()); 729 KASSERT(curcpu() != ci); 730 731 intr_ipi_send(ci != NULL ? ci->ci_kcpuset : NULL, IPI_GENERIC); 732 } 733 734 #endif /* MULTIPROCESSOR */ 735 736 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 737 bool 738 mm_md_direct_mapped_phys(paddr_t pa, vaddr_t *vap) 739 { 740 bool rv; 741 vaddr_t va = pmap_direct_mapped_phys(pa, &rv, 0); 742 if (rv) { 743 *vap = va; 744 } 745 return rv; 746 } 747 #endif 748 749 bool 750 mm_md_page_color(paddr_t pa, int *colorp) 751 { 752 #if (ARM_MMU_V6 + ARM_MMU_V7) != 0 753 *colorp = atop(pa & arm_cache_prefer_mask); 754 755 return arm_cache_prefer_mask ? false : true; 756 #else 757 *colorp = 0; 758 759 return true; 760 #endif 761 } 762