xref: /netbsd-src/sys/arch/arm/arm32/arm11_pmc.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: arm11_pmc.c,v 1.4 2013/12/01 02:53:46 joerg Exp $	*/
2 
3 /* Copyright (c) 2007 Microsoft
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Microsoft
17  *
18  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 
32 /*
33  * support for ARM 11 Performance Monitor Counters
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: arm11_pmc.c,v 1.4 2013/12/01 02:53:46 joerg Exp $");
38 #include "opt_perfctrs.h"
39 #include <sys/types.h>
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/time.h>
44 #include <sys/timetc.h>
45 #include <dev/clock_subr.h>
46 #include <arm/armreg.h>
47 #include <arm/cpufunc.h>
48 
49 #ifndef ARM11_PMC_CCNT_HZ
50 # define ARM11_PMC_CCNT_HZ	400000000	/* 400MHz */
51 #endif
52 
53 void arm11_pmc_ccnt_init(void);
54 
55 #define COUNTS_PER_USEC	(ARM11_PMC_CCNT_HZ / 1000000)
56 
57 static uint32_t counts_per_wrap = ~0UL;		/* XXX off by 1 */
58 
59 static inline uint32_t
60 arm11_pmc_ctrl_read(void)
61 {
62 	uint32_t val;
63 
64 	__asm volatile ("mrc p15, 0, %0, c15, c12, 0" : "=r" (val));
65 
66 	return val;
67 }
68 
69 static inline void
70 arm11_pmc_ctrl_write(uint32_t val)
71 {
72 	__asm volatile ("mcr p15, 0, %0, c15, c12, 0" :: "r" (val));
73 }
74 
75 static inline uint32_t
76 arm11_pmc_ccnt_read(void)
77 {
78 	uint32_t val;
79 
80 	__asm volatile ("mrc p15, 0, %0, c15, c12, 1" : "=r" (val));
81 
82 	return val;
83 }
84 
85 __unused static inline void
86 arm11_pmc_ccnt_write(uint32_t val)
87 {
88 	__asm volatile ("mcr p15, 0, %0, c15, c12, 1;" :: "r" (val));
89 }
90 
91 /*
92  * enable the PMC CCNT for delay()
93  */
94 void
95 arm11_pmc_ccnt_init(void)
96 {
97 	uint32_t val;
98 
99 	val = ARM11_PMCCTL_E | ARM11_PMCCTL_P | ARM11_PMCCTL_C;
100 
101 	arm11_pmc_ctrl_write(val);
102 }
103 
104 /*
105  * delay - for "at least" arg usec
106  *
107  *	NOTE: at 400MHz we are restricted to (uint32_t)~0 "counts"
108  *	if this is a problem, accumulate counts in LL vars
109  */
110 #define DELAY_ARG_LIMIT (((uint32_t)~0) / COUNTS_PER_USEC)	/* about 10 sec */
111 void
112 delay(u_int arg)
113 {
114 	uint32_t ctrl;
115 	uint32_t cur;
116 	uint32_t last;
117 	uint32_t delta = 0;
118 	uint32_t usecs = 0;
119 
120 	if (arg > DELAY_ARG_LIMIT)
121 		panic("delay: arg %u overflow, limit is %d usec\n", arg, DELAY_ARG_LIMIT);
122 
123 	last = arm11_pmc_ccnt_read();
124 	delta = usecs = 0;
125 
126 	while (arg > usecs) {
127 		cur  = arm11_pmc_ccnt_read();
128 		ctrl = arm11_pmc_ctrl_read();
129 		if (ctrl & ARM11_PMCCTL_CCR) {
130 			/*
131 			 * reset CCR, do not reset other write-to-clear flags;
132 			 * keep the rest of the PMC Control Reg configuration
133 			 */
134 			ctrl &= ~(ARM11_PMCCTL_CR0|ARM11_PMCCTL_CR1);
135 			arm11_pmc_ctrl_write(ctrl);
136 			delta += (last + (counts_per_wrap - cur));
137 		} else {
138 			delta += (cur - last);
139 		}
140 		last = cur;
141 		if (delta >= COUNTS_PER_USEC) {
142 			usecs += delta / COUNTS_PER_USEC;
143 			delta %= COUNTS_PER_USEC;
144 		}
145 	}
146 }
147