xref: /netbsd-src/sys/arch/arm/arm/undefined.c (revision fc4f42693f9b1c31f39f9cf50af1bf2010325808)
1 /*	$NetBSD: undefined.c,v 1.61 2018/01/24 09:04:44 skrll Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Ben Harris.
5  * Copyright (c) 1995 Mark Brinicombe.
6  * Copyright (c) 1995 Brini.
7  * All rights reserved.
8  *
9  * This code is derived from software written for Brini by Mark Brinicombe
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by Brini.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * RiscBSD kernel project
39  *
40  * undefined.c
41  *
42  * Fault handler
43  *
44  * Created      : 06/01/95
45  */
46 
47 #define FAST_FPE
48 
49 #include "opt_ddb.h"
50 #include "opt_dtrace.h"
51 #include "opt_kgdb.h"
52 
53 #include <sys/param.h>
54 #ifdef KGDB
55 #include <sys/kgdb.h>
56 #endif
57 
58 __KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.61 2018/01/24 09:04:44 skrll Exp $");
59 
60 #include <sys/kmem.h>
61 #include <sys/queue.h>
62 #include <sys/signal.h>
63 #include <sys/systm.h>
64 #include <sys/proc.h>
65 #include <sys/syslog.h>
66 #include <sys/vmmeter.h>
67 #include <sys/cpu.h>
68 #ifdef FAST_FPE
69 #include <sys/acct.h>
70 #endif
71 #include <sys/userret.h>
72 
73 #include <uvm/uvm_extern.h>
74 
75 #include <arm/locore.h>
76 #include <arm/undefined.h>
77 
78 #include <machine/pcb.h>
79 #include <machine/trap.h>
80 
81 #include <arch/arm/arm/disassem.h>
82 
83 #ifdef DDB
84 #include <ddb/db_output.h>
85 #include <machine/db_machdep.h>
86 #endif
87 
88 static int gdb_trapper(u_int, u_int, struct trapframe *, int);
89 
90 LIST_HEAD(, undefined_handler) undefined_handlers[NUM_UNKNOWN_HANDLERS];
91 
92 
93 void *
94 install_coproc_handler(int coproc, undef_handler_t handler)
95 {
96 	struct undefined_handler *uh;
97 
98 	KASSERT(coproc >= 0 && coproc < NUM_UNKNOWN_HANDLERS);
99 	KASSERT(handler != NULL); /* Used to be legal. */
100 
101 	uh = kmem_alloc(sizeof(*uh), KM_NOSLEEP);
102 	KASSERT(uh != NULL);
103 	uh->uh_handler = handler;
104 	install_coproc_handler_static(coproc, uh);
105 	return uh;
106 }
107 
108 void
109 install_coproc_handler_static(int coproc, struct undefined_handler *uh)
110 {
111 
112 	LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link);
113 }
114 
115 void
116 remove_coproc_handler(void *cookie)
117 {
118 	struct undefined_handler *uh = cookie;
119 
120 	LIST_REMOVE(uh, uh_link);
121 	kmem_free(uh, sizeof(*uh));
122 }
123 
124 static int
125 cp15_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
126 {
127 	struct lwp * const l = curlwp;
128 
129 #if defined(THUMB_CODE) && !defined(CPU_ARMV7)
130 	if (tf->tf_spsr & PSR_T_bit)
131 		return 1;
132 #endif
133 	if (code != FAULT_USER)
134 		return 1;
135 
136 	/*
137 	 * Don't overwrite sp, pc, etc.
138 	 */
139 	const u_int regno = (insn >> 12) & 15;
140 	if (regno > 12)
141 		return 1;
142 
143 	/*
144 	 * Get a pointer to the register used in the instruction to be emulated.
145 	 */
146 	register_t * const regp = &tf->tf_r0 + regno;
147 
148 	/*
149 	 * Handle MRC p15, 0, <Rd>, c13, c0, 3 (Read User read-only thread id)
150 	 */
151 	if ((insn & 0xffff0fff) == 0xee1d0f70) {
152 		*regp = (uintptr_t)l->l_private;
153 		tf->tf_pc += INSN_SIZE;
154 		curcpu()->ci_und_cp15_ev.ev_count++;
155 		return 0;
156 	}
157 
158 	/*
159 	 * Handle {MRC,MCR} p15, 0, <Rd>, c13, c0, 2 (User read/write thread id)
160 	 */
161 	if ((insn & 0xffef0fff) == 0xee0d0f50) {
162 		struct pcb * const pcb = lwp_getpcb(l);
163 		if (insn & 0x00100000)
164 			*regp = pcb->pcb_user_pid_rw;
165 		else
166 			pcb->pcb_user_pid_rw = *regp;
167 		tf->tf_pc += INSN_SIZE;
168 		curcpu()->ci_und_cp15_ev.ev_count++;
169 		return 0;
170 	}
171 
172 	return 1;
173 }
174 
175 static int
176 gdb_trapper(u_int addr, u_int insn, struct trapframe *tf, int code)
177 {
178 	struct lwp * const l = curlwp;
179 
180 #ifdef THUMB_CODE
181 	if (tf->tf_spsr & PSR_T_bit) {
182 		if (insn == GDB_THUMB_BREAKPOINT)
183 			goto bkpt;
184 	}
185 	else
186 #endif
187 	{
188 		if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
189 #ifdef THUMB_CODE
190 		bkpt:
191 #endif
192 			if (code == FAULT_USER) {
193 				ksiginfo_t ksi;
194 
195 				KSI_INIT_TRAP(&ksi);
196 				ksi.ksi_signo = SIGTRAP;
197 				ksi.ksi_code = TRAP_BRKPT;
198 				ksi.ksi_addr = (uint32_t *)addr;
199 				ksi.ksi_trap = 0;
200 				trapsignal(l, &ksi);
201 				return 0;
202 			}
203 #ifdef KGDB
204 			return !kgdb_trap(T_BREAKPOINT, tf);
205 #endif
206 		}
207 	}
208 	return 1;
209 }
210 
211 static struct undefined_handler cp15_uh;
212 static struct undefined_handler gdb_uh;
213 #ifdef THUMB_CODE
214 static struct undefined_handler gdb_uh_thumb;
215 #endif
216 
217 #ifdef KDTRACE_HOOKS
218 #include <sys/dtrace_bsd.h>
219 
220 /* Not used for now, but needed for dtrace/fbt modules */
221 dtrace_doubletrap_func_t	dtrace_doubletrap_func = NULL;
222 dtrace_trap_func_t		dtrace_trap_func = NULL;
223 
224 int (* dtrace_invop_jump_addr)(uintptr_t, struct trapframe *, uintptr_t);
225 void (* dtrace_emulation_jump_addr)(int, struct trapframe *);
226 
227 static int
228 dtrace_trapper(u_int addr, struct trapframe *frame)
229 {
230 	int op;
231 	struct trapframe back;
232 	u_int insn = read_insn(addr, false);
233 
234 	if (dtrace_invop_jump_addr == NULL || dtrace_emulation_jump_addr == NULL)
235 		return 1;
236 
237 	if (!DTRACE_IS_BREAKPOINT(insn))
238 		return 1;
239 
240 	/* cond value is encoded in the first byte */
241 	if (!arm_cond_ok_p(__SHIFTIN(insn, INSN_COND_MASK), frame->tf_spsr)) {
242 		frame->tf_pc += INSN_SIZE;
243 		return 0;
244 	}
245 
246 	back = *frame;
247 	op = dtrace_invop_jump_addr(addr, frame, frame->tf_r0);
248 	*frame = back;
249 
250 	dtrace_emulation_jump_addr(op, frame);
251 
252 	return 0;
253 }
254 #endif
255 
256 void
257 undefined_init(void)
258 {
259 	int loop;
260 
261 	/* Not actually necessary -- the initialiser is just NULL */
262 	for (loop = 0; loop < NUM_UNKNOWN_HANDLERS; ++loop)
263 		LIST_INIT(&undefined_handlers[loop]);
264 
265 	/* Install handler for CP15 emulation */
266 	cp15_uh.uh_handler = cp15_trapper;
267 	install_coproc_handler_static(SYSTEM_COPROC, &cp15_uh);
268 
269 	/* Install handler for GDB breakpoints */
270 	gdb_uh.uh_handler = gdb_trapper;
271 	install_coproc_handler_static(CORE_UNKNOWN_HANDLER, &gdb_uh);
272 #ifdef THUMB_CODE
273 	gdb_uh_thumb.uh_handler = gdb_trapper;
274 	install_coproc_handler_static(THUMB_UNKNOWN_HANDLER, &gdb_uh_thumb);
275 #endif
276 }
277 
278 void
279 undefinedinstruction(trapframe_t *tf)
280 {
281 	struct lwp *l;
282 	vaddr_t fault_pc;
283 	int fault_instruction;
284 	int fault_code;
285 	int coprocessor;
286 	int user;
287 	struct undefined_handler *uh;
288 #ifdef VERBOSE_ARM32
289 	int s;
290 #endif
291 
292 	curcpu()->ci_und_ev.ev_count++;
293 
294 #ifdef KDTRACE_HOOKS
295 	if ((tf->tf_spsr & PSR_MODE) != PSR_USR32_MODE) {
296 		tf->tf_pc -= INSN_SIZE;
297 		if (dtrace_trapper(tf->tf_pc, tf) == 0)
298 			return;
299 		tf->tf_pc += INSN_SIZE; /* Reset for the rest code */
300 	}
301 #endif
302 
303 	/* Enable interrupts if they were enabled before the exception. */
304 	restore_interrupts(tf->tf_spsr & IF32_bits);
305 
306 #ifdef THUMB_CODE
307 	if (tf->tf_spsr & PSR_T_bit)
308 		tf->tf_pc -= THUMB_INSN_SIZE;
309 	else
310 #endif
311 	{
312 		tf->tf_pc -= INSN_SIZE;
313 	}
314 
315 	fault_pc = tf->tf_pc;
316 
317 	/* Get the current lwp/proc structure or lwp0/proc0 if there is none. */
318 	l = curlwp;
319 
320 	if ((tf->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
321 		user = 1;
322 		LWP_CACHE_CREDS(l, l->l_proc);
323 	} else
324 		user = 0;
325 
326 
327 #ifdef THUMB_CODE
328 	if (tf->tf_spsr & PSR_T_bit) {
329 		fault_instruction = read_thumb_insn(fault_pc, user);
330 		if (fault_instruction >= 0xe000) {
331 			fault_instruction = (fault_instruction << 16)
332 			    | read_thumb_insn(fault_pc + 2, user);
333 		}
334 	}
335 	else
336 #endif
337 	{
338 		/*
339 		 * Make sure the program counter is correctly aligned so we
340 		 * don't take an alignment fault trying to read the opcode.
341 		 */
342 		if (__predict_false((fault_pc & 3) != 0)) {
343 			ksiginfo_t ksi;
344 			/* Give the user an illegal instruction signal. */
345 			KSI_INIT_TRAP(&ksi);
346 			ksi.ksi_signo = SIGILL;
347 			ksi.ksi_code = ILL_ILLOPC;
348 			ksi.ksi_addr = (uint32_t *)(intptr_t) fault_pc;
349 			trapsignal(l, &ksi);
350 			userret(l);
351 			return;
352 		}
353 	 	/*
354 		 * Should use fuword() here .. but in the interests of
355 		 * squeezing every  bit of speed we will just use
356 		 * ReadWord(). We know the instruction can be read
357 		 * as was just executed so this will never fail unless
358 		 * the kernel is screwed up in which case it does
359 		 * not really matter does it ?
360 		 */
361 		fault_instruction = read_insn(fault_pc, user);
362 	}
363 
364 	/* Update vmmeter statistics */
365 	curcpu()->ci_data.cpu_ntrap++;
366 
367 #ifdef THUMB_CODE
368 	if ((tf->tf_spsr & PSR_T_bit) && !CPU_IS_ARMV7_P()) {
369 		coprocessor = THUMB_UNKNOWN_HANDLER;
370 	}
371 	else
372 #endif
373 	{
374 		/* Check for coprocessor instruction */
375 
376 		/*
377 		 * According to the datasheets you only need to look at
378 		 * bit 27 of the instruction to tell the difference
379 		 * between and undefined instruction and a coprocessor
380 		 * instruction following an undefined instruction trap.
381 		 *
382 		 * ARMv5 adds undefined instructions in the NV space,
383 		 * even when bit 27 is set.
384 		 */
385 
386 		if ((fault_instruction & (1 << 27)) != 0
387 		    && (fault_instruction & 0xf0000000) != 0xf0000000) {
388 			coprocessor = (fault_instruction >> 8) & 0x0f;
389 #ifdef THUMB_CODE
390 		} else if ((tf->tf_spsr & PSR_T_bit) && !CPU_IS_ARMV7_P()) {
391 			coprocessor = THUMB_UNKNOWN_HANDLER;
392 #endif
393 		} else {
394 			coprocessor = CORE_UNKNOWN_HANDLER;
395 		}
396 	}
397 
398 	if (user) {
399 		/*
400 		 * Modify the fault_code to reflect the USR/SVC state at
401 		 * time of fault.
402 		 */
403 		fault_code = FAULT_USER;
404 		KASSERTMSG(tf == lwp_trapframe(l), "tf %p vs %p", tf,
405 		    lwp_trapframe(l));
406 	} else
407 		fault_code = 0;
408 
409 	/* OK this is were we do something about the instruction. */
410 	LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link)
411 	    if (uh->uh_handler(fault_pc, fault_instruction, tf,
412 			       fault_code) == 0)
413 		    break;
414 
415 	if (uh == NULL) {
416 		/* Fault has not been handled */
417 		ksiginfo_t ksi;
418 
419 #ifdef VERBOSE_ARM32
420 		s = spltty();
421 
422 		if ((fault_instruction & 0x0f000010) == 0x0e000000) {
423 			printf("CDP\n");
424 			disassemble(fault_pc);
425 		} else if ((fault_instruction & 0x0e000000) == 0x0c000000) {
426 			printf("LDC/STC\n");
427 			disassemble(fault_pc);
428 		} else if ((fault_instruction & 0x0f000010) == 0x0e000010) {
429 			printf("MRC/MCR\n");
430 			disassemble(fault_pc);
431 		} else if ((fault_instruction & ~INSN_COND_MASK)
432 			 != (KERNEL_BREAKPOINT & ~INSN_COND_MASK)) {
433 			printf("Undefined instruction\n");
434 			disassemble(fault_pc);
435 		}
436 
437 		splx(s);
438 #endif
439 
440 		if ((fault_code & FAULT_USER) == 0) {
441 #ifdef DDB
442 			db_printf("Undefined instruction %#x in kernel at %#lx (LR %#x SP %#x)\n",
443 			    fault_instruction, fault_pc, tf->tf_svc_lr, tf->tf_svc_sp);
444 			kdb_trap(T_FAULT, tf);
445 #else
446 			panic("undefined instruction %#x in kernel at %#lx", fault_instruction, fault_pc);
447 #endif
448 		}
449 		KSI_INIT_TRAP(&ksi);
450 		ksi.ksi_signo = SIGILL;
451 		ksi.ksi_code = ILL_ILLOPC;
452 		ksi.ksi_addr = (uint32_t *)fault_pc;
453 		ksi.ksi_trap = fault_instruction;
454 		trapsignal(l, &ksi);
455 	}
456 
457 	if ((fault_code & FAULT_USER) == 0)
458 		return;
459 
460 	userret(l);
461 }
462