xref: /netbsd-src/sys/arch/arm/arm/undefined.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: undefined.c,v 1.32 2007/11/05 20:43:02 ad Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Ben Harris.
5  * Copyright (c) 1995 Mark Brinicombe.
6  * Copyright (c) 1995 Brini.
7  * All rights reserved.
8  *
9  * This code is derived from software written for Brini by Mark Brinicombe
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by Brini.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * RiscBSD kernel project
39  *
40  * undefined.c
41  *
42  * Fault handler
43  *
44  * Created      : 06/01/95
45  */
46 
47 #define FAST_FPE
48 
49 #include "opt_ddb.h"
50 #include "opt_kgdb.h"
51 
52 #include <sys/param.h>
53 #ifdef KGDB
54 #include <sys/kgdb.h>
55 #endif
56 
57 __KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.32 2007/11/05 20:43:02 ad Exp $");
58 
59 #include <sys/malloc.h>
60 #include <sys/queue.h>
61 #include <sys/signal.h>
62 #include <sys/systm.h>
63 #include <sys/proc.h>
64 #include <sys/user.h>
65 #include <sys/syslog.h>
66 #include <sys/vmmeter.h>
67 #ifdef FAST_FPE
68 #include <sys/acct.h>
69 #endif
70 #include <sys/userret.h>
71 
72 #include <uvm/uvm_extern.h>
73 
74 #include <machine/cpu.h>
75 #include <machine/frame.h>
76 #include <arm/undefined.h>
77 #include <machine/trap.h>
78 
79 #include <arch/arm/arm/disassem.h>
80 
81 #ifdef DDB
82 #include <ddb/db_output.h>
83 #include <machine/db_machdep.h>
84 #endif
85 
86 #ifdef acorn26
87 #include <machine/machdep.h>
88 #endif
89 
90 static int gdb_trapper(u_int, u_int, struct trapframe *, int);
91 
92 LIST_HEAD(, undefined_handler) undefined_handlers[NUM_UNKNOWN_HANDLERS];
93 
94 
95 void *
96 install_coproc_handler(int coproc, undef_handler_t handler)
97 {
98 	struct undefined_handler *uh;
99 
100 	KASSERT(coproc >= 0 && coproc < NUM_UNKNOWN_HANDLERS);
101 	KASSERT(handler != NULL); /* Used to be legal. */
102 
103 	/* XXX: M_TEMP??? */
104 	MALLOC(uh, struct undefined_handler *, sizeof(*uh), M_TEMP, M_WAITOK);
105 	uh->uh_handler = handler;
106 	install_coproc_handler_static(coproc, uh);
107 	return uh;
108 }
109 
110 void
111 install_coproc_handler_static(int coproc, struct undefined_handler *uh)
112 {
113 
114 	LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link);
115 }
116 
117 void
118 remove_coproc_handler(void *cookie)
119 {
120 	struct undefined_handler *uh = cookie;
121 
122 	LIST_REMOVE(uh, uh_link);
123 	FREE(uh, M_TEMP);
124 }
125 
126 
127 static int
128 gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code)
129 {
130 	struct lwp *l;
131 	l = (curlwp == NULL) ? &lwp0 : curlwp;
132 
133 #ifdef THUMB_CODE
134 	if (frame->tf_spsr & PSR_T_bit) {
135 		if (insn == GDB_THUMB_BREAKPOINT)
136 			goto bkpt;
137 	}
138 	else
139 #endif
140 	{
141 		if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
142 #ifdef THUMB_CODE
143 		bkpt:
144 #endif
145 			if (code == FAULT_USER) {
146 				ksiginfo_t ksi;
147 
148 				KSI_INIT_TRAP(&ksi);
149 				ksi.ksi_signo = SIGTRAP;
150 				ksi.ksi_code = TRAP_BRKPT;
151 				ksi.ksi_addr = (u_int32_t *)addr;
152 				ksi.ksi_trap = 0;
153 				KERNEL_LOCK(1, l);
154 				trapsignal(l, &ksi);
155 				KERNEL_UNLOCK_LAST(l);
156 				return 0;
157 			}
158 #ifdef KGDB
159 			return !kgdb_trap(T_BREAKPOINT, frame);
160 #endif
161 		}
162 	}
163 	return 1;
164 }
165 
166 static struct undefined_handler gdb_uh;
167 #ifdef THUMB_CODE
168 static struct undefined_handler gdb_uh_thumb;
169 #endif
170 
171 void
172 undefined_init()
173 {
174 	int loop;
175 
176 	/* Not actually necessary -- the initialiser is just NULL */
177 	for (loop = 0; loop < NUM_UNKNOWN_HANDLERS; ++loop)
178 		LIST_INIT(&undefined_handlers[loop]);
179 
180 	/* Install handler for GDB breakpoints */
181 	gdb_uh.uh_handler = gdb_trapper;
182 	install_coproc_handler_static(CORE_UNKNOWN_HANDLER, &gdb_uh);
183 #ifdef THUMB_CODE
184 	gdb_uh_thumb.uh_handler = gdb_trapper;
185 	install_coproc_handler_static(THUMB_UNKNOWN_HANDLER, &gdb_uh_thumb);
186 #endif
187 }
188 
189 void
190 undefinedinstruction(trapframe_t *frame)
191 {
192 	struct lwp *l;
193 	u_int fault_pc;
194 	int fault_instruction;
195 	int fault_code;
196 	int coprocessor;
197 	int user;
198 	struct undefined_handler *uh;
199 #ifdef VERBOSE_ARM32
200 	int s;
201 #endif
202 
203 	/* Enable interrupts if they were enabled before the exception. */
204 #ifdef acorn26
205 	if ((frame->tf_r15 & R15_IRQ_DISABLE) == 0)
206 		int_on();
207 #else
208 	if (!(frame->tf_spsr & I32_bit))
209 		enable_interrupts(I32_bit);
210 #endif
211 
212 #ifndef acorn26
213 #ifdef THUMB_CODE
214 	if (frame->tf_spsr & PSR_T_bit)
215 		frame->tf_pc -= THUMB_INSN_SIZE;
216 	else
217 #endif
218 	{
219 		frame->tf_pc -= INSN_SIZE;
220 	}
221 #endif
222 
223 #ifdef __PROG26
224 	fault_pc = frame->tf_r15 & R15_PC;
225 #else
226 	fault_pc = frame->tf_pc;
227 #endif
228 
229 	/* Get the current lwp/proc structure or lwp0/proc0 if there is none. */
230 	l = curlwp == NULL ? &lwp0 : curlwp;
231 
232 #ifdef __PROG26
233 	if ((frame->tf_r15 & R15_MODE) == R15_MODE_USR) {
234 #else
235 	if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
236 #endif
237 		user = 1;
238 		LWP_CACHE_CREDS(l, l->l_proc);
239 	} else
240 		user = 0;
241 
242 
243 #ifdef THUMB_CODE
244 	if (frame->tf_spsr & PSR_T_bit) {
245 		fault_instruction = fusword((void *)(fault_pc & ~1));
246 	}
247 	else
248 #endif
249 	{
250 		/*
251 		 * Make sure the program counter is correctly aligned so we
252 		 * don't take an alignment fault trying to read the opcode.
253 		 */
254 		if (__predict_false((fault_pc & 3) != 0)) {
255 			ksiginfo_t ksi;
256 			/* Give the user an illegal instruction signal. */
257 			KSI_INIT_TRAP(&ksi);
258 			ksi.ksi_signo = SIGILL;
259 			ksi.ksi_code = ILL_ILLOPC;
260 			ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc;
261 			KERNEL_LOCK(1, l);
262 			trapsignal(l, &ksi);
263 			KERNEL_UNLOCK_LAST(l);
264 			userret(l);
265 			return;
266 		}
267 	 	/*
268 		 * Should use fuword() here .. but in the interests of
269 		 * squeezing every  bit of speed we will just use
270 		 * ReadWord(). We know the instruction can be read
271 		 * as was just executed so this will never fail unless
272 		 * the kernel is screwed up in which case it does
273 		 * not really matter does it ?
274 		 */
275 
276 		fault_instruction = *(u_int32_t *)fault_pc;
277 	}
278 
279 	/* Update vmmeter statistics */
280 	uvmexp.traps++;
281 
282 #ifdef THUMB_CODE
283 	if (frame->tf_spsr & PSR_T_bit) {
284 		coprocessor = THUMB_UNKNOWN_HANDLER;
285 	}
286 	else
287 #endif
288 	{
289 		/* Check for coprocessor instruction */
290 
291 		/*
292 		 * According to the datasheets you only need to look at
293 		 * bit 27 of the instruction to tell the difference
294 		 * between and undefined instruction and a coprocessor
295 		 * instruction following an undefined instruction trap.
296 		 *
297 		 * ARMv5 adds undefined instructions in the NV space,
298 		 * even when bit 27 is set.
299 		 */
300 
301 		if ((fault_instruction & (1 << 27)) != 0
302 		    && (fault_instruction & 0xf0000000) != 0xf0000000)
303 			coprocessor = (fault_instruction >> 8) & 0x0f;
304 		else
305 			coprocessor = CORE_UNKNOWN_HANDLER;
306 	}
307 
308 	if (user) {
309 		/*
310 		 * Modify the fault_code to reflect the USR/SVC state at
311 		 * time of fault.
312 		 */
313 		fault_code = FAULT_USER;
314 		l->l_addr->u_pcb.pcb_tf = frame;
315 	} else
316 		fault_code = 0;
317 
318 	/* OK this is were we do something about the instruction. */
319 	LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link)
320 	    if (uh->uh_handler(fault_pc, fault_instruction, frame,
321 			       fault_code) == 0)
322 		    break;
323 
324 	if (uh == NULL) {
325 		/* Fault has not been handled */
326 		ksiginfo_t ksi;
327 
328 #ifdef VERBOSE_ARM32
329 		s = spltty();
330 
331 		if ((fault_instruction & 0x0f000010) == 0x0e000000) {
332 			printf("CDP\n");
333 			disassemble(fault_pc);
334 		} else if ((fault_instruction & 0x0e000000) == 0x0c000000) {
335 			printf("LDC/STC\n");
336 			disassemble(fault_pc);
337 		} else if ((fault_instruction & 0x0f000010) == 0x0e000010) {
338 			printf("MRC/MCR\n");
339 			disassemble(fault_pc);
340 		} else if ((fault_instruction & ~INSN_COND_MASK)
341 			 != (KERNEL_BREAKPOINT & ~INSN_COND_MASK)) {
342 			printf("Undefined instruction\n");
343 			disassemble(fault_pc);
344 		}
345 
346 		splx(s);
347 #endif
348 
349 		if ((fault_code & FAULT_USER) == 0) {
350 #ifdef DDB
351 			db_printf("Undefined instruction in kernel\n");
352 			kdb_trap(T_FAULT, frame);
353 #else
354 			panic("undefined instruction in kernel");
355 #endif
356 		}
357 		KSI_INIT_TRAP(&ksi);
358 		ksi.ksi_signo = SIGILL;
359 		ksi.ksi_code = ILL_ILLOPC;
360 		ksi.ksi_addr = (u_int32_t *)fault_pc;
361 		ksi.ksi_trap = fault_instruction;
362 		KERNEL_LOCK(1, l);
363 		trapsignal(l, &ksi);
364 		KERNEL_UNLOCK_LAST(l);
365 	}
366 
367 	if ((fault_code & FAULT_USER) == 0)
368 		return;
369 
370 #ifdef FAST_FPE
371 	/* Optimised exit code */
372 	{
373 
374 		/*
375 		 * Check for reschedule request, at the moment there is only
376 		 * 1 ast so this code should always be run
377 		 */
378 
379 		if (curcpu()->ci_want_resched) {
380 			/*
381 			 * We are being preempted.
382 			 */
383 			preempt();
384 		}
385 
386 		/* Invoke MI userret code */
387 		mi_userret(l);
388 	}
389 
390 #else
391 	userret(l);
392 #endif
393 }
394