xref: /netbsd-src/sys/arch/arm/arm/undefined.c (revision 46f5119e40af2e51998f686b2fdcc76b5488f7f3)
1 /*	$NetBSD: undefined.c,v 1.41 2011/04/07 11:02:24 matt Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Ben Harris.
5  * Copyright (c) 1995 Mark Brinicombe.
6  * Copyright (c) 1995 Brini.
7  * All rights reserved.
8  *
9  * This code is derived from software written for Brini by Mark Brinicombe
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by Brini.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * RiscBSD kernel project
39  *
40  * undefined.c
41  *
42  * Fault handler
43  *
44  * Created      : 06/01/95
45  */
46 
47 #define FAST_FPE
48 
49 #include "opt_ddb.h"
50 #include "opt_kgdb.h"
51 
52 #include <sys/param.h>
53 #ifdef KGDB
54 #include <sys/kgdb.h>
55 #endif
56 
57 __KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.41 2011/04/07 11:02:24 matt Exp $");
58 
59 #include <sys/malloc.h>
60 #include <sys/queue.h>
61 #include <sys/signal.h>
62 #include <sys/systm.h>
63 #include <sys/proc.h>
64 #include <sys/syslog.h>
65 #include <sys/vmmeter.h>
66 #ifdef FAST_FPE
67 #include <sys/acct.h>
68 #endif
69 #include <sys/userret.h>
70 
71 #include <uvm/uvm_extern.h>
72 
73 #include <machine/cpu.h>
74 #include <machine/frame.h>
75 #include <arm/undefined.h>
76 #include <machine/trap.h>
77 
78 #include <arch/arm/arm/disassem.h>
79 
80 #ifdef DDB
81 #include <ddb/db_output.h>
82 #include <machine/db_machdep.h>
83 #endif
84 
85 #ifdef acorn26
86 #include <machine/machdep.h>
87 #endif
88 
89 static int gdb_trapper(u_int, u_int, struct trapframe *, int);
90 
91 LIST_HEAD(, undefined_handler) undefined_handlers[NUM_UNKNOWN_HANDLERS];
92 
93 
94 void *
95 install_coproc_handler(int coproc, undef_handler_t handler)
96 {
97 	struct undefined_handler *uh;
98 
99 	KASSERT(coproc >= 0 && coproc < NUM_UNKNOWN_HANDLERS);
100 	KASSERT(handler != NULL); /* Used to be legal. */
101 
102 	/* XXX: M_TEMP??? */
103 	uh = malloc(sizeof(*uh), M_TEMP, M_WAITOK);
104 	uh->uh_handler = handler;
105 	install_coproc_handler_static(coproc, uh);
106 	return uh;
107 }
108 
109 void
110 install_coproc_handler_static(int coproc, struct undefined_handler *uh)
111 {
112 
113 	LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link);
114 }
115 
116 void
117 remove_coproc_handler(void *cookie)
118 {
119 	struct undefined_handler *uh = cookie;
120 
121 	LIST_REMOVE(uh, uh_link);
122 	free(uh, M_TEMP);
123 }
124 
125 static int
126 cp15_trapper(u_int addr, u_int insn, struct trapframe *frame, int code)
127 {
128 	struct lwp * const l = curlwp;
129 
130 #ifdef THUMB_CODE
131 	if (frame->tf_spsr & PSR_T_bit)
132 		return 1;
133 #endif
134 	if (code != FAULT_USER)
135 		return 1;
136 
137 	/*
138 	 * Don't overwrite sp, pc, etc.
139 	 */
140 	const u_int regno = (insn >> 12) & 15;
141 	if (regno > 12)
142 		return 1;
143 
144 	/*
145 	 * Get a pointer to the register used in the instruction to be emulated.
146 	 */
147 	register_t * const regp = &frame->tf_r0 + regno;
148 
149 	/*
150 	 * Handle MRC p15, 0, <Rd>, c13, c0, 3 (Read User read-only thread id)
151 	 */
152 	if ((insn & 0xffff0fff) == 0xee1d0f70) {
153 		*regp = (uintptr_t)l->l_private;
154 		return 0;
155 	}
156 
157 	/*
158 	 * Handle {MRC,MCR} p15, 0, <Rd>, c13, c0, 2 (User read/write thread id)
159 	 */
160 	if ((insn & 0xffef0fff) == 0xee0d0f50) {
161 		struct pcb * const pcb = lwp_getpcb(l);
162 		if (insn & 0x00100000)
163 			*regp = pcb->pcb_user_pid_rw;
164 		else
165 			pcb->pcb_user_pid_rw = *regp;
166 		return 0;
167 	}
168 
169 	return 1;
170 }
171 
172 static int
173 gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code)
174 {
175 	struct lwp * const l = curlwp;
176 
177 #ifdef THUMB_CODE
178 	if (frame->tf_spsr & PSR_T_bit) {
179 		if (insn == GDB_THUMB_BREAKPOINT)
180 			goto bkpt;
181 	}
182 	else
183 #endif
184 	{
185 		if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
186 #ifdef THUMB_CODE
187 		bkpt:
188 #endif
189 			if (code == FAULT_USER) {
190 				ksiginfo_t ksi;
191 
192 				KSI_INIT_TRAP(&ksi);
193 				ksi.ksi_signo = SIGTRAP;
194 				ksi.ksi_code = TRAP_BRKPT;
195 				ksi.ksi_addr = (u_int32_t *)addr;
196 				ksi.ksi_trap = 0;
197 				trapsignal(l, &ksi);
198 				return 0;
199 			}
200 #ifdef KGDB
201 			return !kgdb_trap(T_BREAKPOINT, frame);
202 #endif
203 		}
204 	}
205 	return 1;
206 }
207 
208 static struct undefined_handler cp15_uh;
209 static struct undefined_handler gdb_uh;
210 #ifdef THUMB_CODE
211 static struct undefined_handler gdb_uh_thumb;
212 #endif
213 
214 void
215 undefined_init(void)
216 {
217 	int loop;
218 
219 	/* Not actually necessary -- the initialiser is just NULL */
220 	for (loop = 0; loop < NUM_UNKNOWN_HANDLERS; ++loop)
221 		LIST_INIT(&undefined_handlers[loop]);
222 
223 	/* Install handler for CP15 emulation */
224 	cp15_uh.uh_handler = cp15_trapper;
225 	install_coproc_handler_static(SYSTEM_COPROC, &cp15_uh);
226 
227 	/* Install handler for GDB breakpoints */
228 	gdb_uh.uh_handler = gdb_trapper;
229 	install_coproc_handler_static(CORE_UNKNOWN_HANDLER, &gdb_uh);
230 #ifdef THUMB_CODE
231 	gdb_uh_thumb.uh_handler = gdb_trapper;
232 	install_coproc_handler_static(THUMB_UNKNOWN_HANDLER, &gdb_uh_thumb);
233 #endif
234 }
235 
236 void
237 undefinedinstruction(trapframe_t *frame)
238 {
239 	struct lwp *l;
240 	u_int fault_pc;
241 	int fault_instruction;
242 	int fault_code;
243 	int coprocessor;
244 	int user;
245 	struct undefined_handler *uh;
246 #ifdef VERBOSE_ARM32
247 	int s;
248 #endif
249 
250 	/* Enable interrupts if they were enabled before the exception. */
251 #ifdef acorn26
252 	if ((frame->tf_r15 & R15_IRQ_DISABLE) == 0)
253 		int_on();
254 #else
255 	restore_interrupts(frame->tf_spsr & IF32_bits);
256 #endif
257 
258 #ifndef acorn26
259 #ifdef THUMB_CODE
260 	if (frame->tf_spsr & PSR_T_bit)
261 		frame->tf_pc -= THUMB_INSN_SIZE;
262 	else
263 #endif
264 	{
265 		frame->tf_pc -= INSN_SIZE;
266 	}
267 #endif
268 
269 #ifdef __PROG26
270 	fault_pc = frame->tf_r15 & R15_PC;
271 #else
272 	fault_pc = frame->tf_pc;
273 #endif
274 
275 	/* Get the current lwp/proc structure or lwp0/proc0 if there is none. */
276 	l = curlwp;
277 
278 #ifdef __PROG26
279 	if ((frame->tf_r15 & R15_MODE) == R15_MODE_USR) {
280 #else
281 	if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
282 #endif
283 		user = 1;
284 		LWP_CACHE_CREDS(l, l->l_proc);
285 	} else
286 		user = 0;
287 
288 
289 #ifdef THUMB_CODE
290 	if (frame->tf_spsr & PSR_T_bit) {
291 		fault_instruction = fusword((void *)(fault_pc & ~1));
292 	}
293 	else
294 #endif
295 	{
296 		/*
297 		 * Make sure the program counter is correctly aligned so we
298 		 * don't take an alignment fault trying to read the opcode.
299 		 */
300 		if (__predict_false((fault_pc & 3) != 0)) {
301 			ksiginfo_t ksi;
302 			/* Give the user an illegal instruction signal. */
303 			KSI_INIT_TRAP(&ksi);
304 			ksi.ksi_signo = SIGILL;
305 			ksi.ksi_code = ILL_ILLOPC;
306 			ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc;
307 			trapsignal(l, &ksi);
308 			userret(l);
309 			return;
310 		}
311 	 	/*
312 		 * Should use fuword() here .. but in the interests of
313 		 * squeezing every  bit of speed we will just use
314 		 * ReadWord(). We know the instruction can be read
315 		 * as was just executed so this will never fail unless
316 		 * the kernel is screwed up in which case it does
317 		 * not really matter does it ?
318 		 */
319 
320 		fault_instruction = *(u_int32_t *)fault_pc;
321 	}
322 
323 	/* Update vmmeter statistics */
324 	curcpu()->ci_data.cpu_ntrap++;
325 
326 #ifdef THUMB_CODE
327 	if (frame->tf_spsr & PSR_T_bit) {
328 		coprocessor = THUMB_UNKNOWN_HANDLER;
329 	}
330 	else
331 #endif
332 	{
333 		/* Check for coprocessor instruction */
334 
335 		/*
336 		 * According to the datasheets you only need to look at
337 		 * bit 27 of the instruction to tell the difference
338 		 * between and undefined instruction and a coprocessor
339 		 * instruction following an undefined instruction trap.
340 		 *
341 		 * ARMv5 adds undefined instructions in the NV space,
342 		 * even when bit 27 is set.
343 		 */
344 
345 		if ((fault_instruction & (1 << 27)) != 0
346 		    && (fault_instruction & 0xf0000000) != 0xf0000000)
347 			coprocessor = (fault_instruction >> 8) & 0x0f;
348 		else
349 			coprocessor = CORE_UNKNOWN_HANDLER;
350 	}
351 
352 	if (user) {
353 		struct pcb *pcb = lwp_getpcb(l);
354 		/*
355 		 * Modify the fault_code to reflect the USR/SVC state at
356 		 * time of fault.
357 		 */
358 		fault_code = FAULT_USER;
359 		pcb->pcb_tf = frame;
360 	} else
361 		fault_code = 0;
362 
363 	/* OK this is were we do something about the instruction. */
364 	LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link)
365 	    if (uh->uh_handler(fault_pc, fault_instruction, frame,
366 			       fault_code) == 0)
367 		    break;
368 
369 	if (uh == NULL) {
370 		/* Fault has not been handled */
371 		ksiginfo_t ksi;
372 
373 #ifdef VERBOSE_ARM32
374 		s = spltty();
375 
376 		if ((fault_instruction & 0x0f000010) == 0x0e000000) {
377 			printf("CDP\n");
378 			disassemble(fault_pc);
379 		} else if ((fault_instruction & 0x0e000000) == 0x0c000000) {
380 			printf("LDC/STC\n");
381 			disassemble(fault_pc);
382 		} else if ((fault_instruction & 0x0f000010) == 0x0e000010) {
383 			printf("MRC/MCR\n");
384 			disassemble(fault_pc);
385 		} else if ((fault_instruction & ~INSN_COND_MASK)
386 			 != (KERNEL_BREAKPOINT & ~INSN_COND_MASK)) {
387 			printf("Undefined instruction\n");
388 			disassemble(fault_pc);
389 		}
390 
391 		splx(s);
392 #endif
393 
394 		if ((fault_code & FAULT_USER) == 0) {
395 #ifdef DDB
396 			db_printf("Undefined instruction in kernel\n");
397 			kdb_trap(T_FAULT, frame);
398 #else
399 			panic("undefined instruction in kernel");
400 #endif
401 		}
402 		KSI_INIT_TRAP(&ksi);
403 		ksi.ksi_signo = SIGILL;
404 		ksi.ksi_code = ILL_ILLOPC;
405 		ksi.ksi_addr = (u_int32_t *)fault_pc;
406 		ksi.ksi_trap = fault_instruction;
407 		trapsignal(l, &ksi);
408 	}
409 
410 	if ((fault_code & FAULT_USER) == 0)
411 		return;
412 
413 #ifdef FAST_FPE
414 	/* Optimised exit code */
415 	{
416 		/*
417 		 * Check for reschedule request, at the moment there is only
418 		 * 1 ast so this code should always be run
419 		 */
420 		if (curcpu()->ci_want_resched) {
421 			/*
422 			 * We are being preempted.
423 			 */
424 			preempt();
425 		}
426 
427 		/* Invoke MI userret code */
428 		mi_userret(l);
429 	}
430 #else
431 	userret(l);
432 #endif
433 }
434