xref: /netbsd-src/sys/arch/arm/arm/undefined.c (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: undefined.c,v 1.25 2004/10/24 06:58:14 skrll Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Ben Harris.
5  * Copyright (c) 1995 Mark Brinicombe.
6  * Copyright (c) 1995 Brini.
7  * All rights reserved.
8  *
9  * This code is derived from software written for Brini by Mark Brinicombe
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by Brini.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * RiscBSD kernel project
39  *
40  * undefined.c
41  *
42  * Fault handler
43  *
44  * Created      : 06/01/95
45  */
46 
47 #define FAST_FPE
48 
49 #include "opt_ddb.h"
50 #include "opt_kgdb.h"
51 
52 #include <sys/param.h>
53 #ifdef KGDB
54 #include <sys/kgdb.h>
55 #endif
56 
57 __KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.25 2004/10/24 06:58:14 skrll Exp $");
58 
59 #include <sys/malloc.h>
60 #include <sys/queue.h>
61 #include <sys/signal.h>
62 #include <sys/systm.h>
63 #include <sys/proc.h>
64 #include <sys/user.h>
65 #include <sys/syslog.h>
66 #include <sys/vmmeter.h>
67 #include <sys/savar.h>
68 #ifdef FAST_FPE
69 #include <sys/acct.h>
70 #endif
71 #include <sys/userret.h>
72 
73 #include <uvm/uvm_extern.h>
74 
75 #include <machine/cpu.h>
76 #include <machine/frame.h>
77 #include <arm/undefined.h>
78 #include <machine/trap.h>
79 
80 #include <arch/arm/arm/disassem.h>
81 
82 #ifdef DDB
83 #include <ddb/db_output.h>
84 #include <machine/db_machdep.h>
85 #endif
86 
87 #ifdef acorn26
88 #include <machine/machdep.h>
89 #endif
90 
91 static int gdb_trapper(u_int, u_int, struct trapframe *, int);
92 
93 #ifdef FAST_FPE
94 extern int want_resched;
95 #endif
96 
97 LIST_HEAD(, undefined_handler) undefined_handlers[NUM_UNKNOWN_HANDLERS];
98 
99 
100 void *
101 install_coproc_handler(int coproc, undef_handler_t handler)
102 {
103 	struct undefined_handler *uh;
104 
105 	KASSERT(coproc >= 0 && coproc < NUM_UNKNOWN_HANDLERS);
106 	KASSERT(handler != NULL); /* Used to be legal. */
107 
108 	/* XXX: M_TEMP??? */
109 	MALLOC(uh, struct undefined_handler *, sizeof(*uh), M_TEMP, M_WAITOK);
110 	uh->uh_handler = handler;
111 	install_coproc_handler_static(coproc, uh);
112 	return uh;
113 }
114 
115 void
116 install_coproc_handler_static(int coproc, struct undefined_handler *uh)
117 {
118 
119 	LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link);
120 }
121 
122 void
123 remove_coproc_handler(void *cookie)
124 {
125 	struct undefined_handler *uh = cookie;
126 
127 	LIST_REMOVE(uh, uh_link);
128 	FREE(uh, M_TEMP);
129 }
130 
131 
132 static int
133 gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code)
134 {
135 	struct lwp *l;
136 	l = (curlwp == NULL) ? &lwp0 : curlwp;
137 
138 #ifdef THUMB_CODE
139 	if (frame->tf_spsr & PSR_T_bit) {
140 		if (insn == GDB_THUMB_BREAKPOINT)
141 			goto bkpt;
142 	}
143 	else
144 #endif
145 	{
146 		if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
147 #ifdef THUMB_CODE
148 		bkpt:
149 #endif
150 			if (code == FAULT_USER) {
151 				ksiginfo_t ksi;
152 
153 				KSI_INIT_TRAP(&ksi);
154 				ksi.ksi_signo = SIGTRAP;
155 				ksi.ksi_code = TRAP_BRKPT;
156 				ksi.ksi_addr = (u_int32_t *)addr;
157 				ksi.ksi_trap = 0;
158 				KERNEL_PROC_LOCK(l);
159 				trapsignal(l, &ksi);
160 				KERNEL_PROC_UNLOCK(l);
161 				return 0;
162 			}
163 #ifdef KGDB
164 			return !kgdb_trap(T_BREAKPOINT, frame);
165 #endif
166 		}
167 	}
168 	return 1;
169 }
170 
171 static struct undefined_handler gdb_uh;
172 
173 void
174 undefined_init()
175 {
176 	int loop;
177 
178 	/* Not actually necessary -- the initialiser is just NULL */
179 	for (loop = 0; loop < NUM_UNKNOWN_HANDLERS; ++loop)
180 		LIST_INIT(&undefined_handlers[loop]);
181 
182 	/* Install handler for GDB breakpoints */
183 	gdb_uh.uh_handler = gdb_trapper;
184 	install_coproc_handler_static(CORE_UNKNOWN_HANDLER, &gdb_uh);
185 #ifdef THUMB_CODE
186 	install_coproc_handler_static(THUMB_UNKNOWN_HANDLER, &gdb_uh);
187 #endif
188 }
189 
190 void
191 undefinedinstruction(trapframe_t *frame)
192 {
193 	struct lwp *l;
194 	u_int fault_pc;
195 	int fault_instruction;
196 	int fault_code;
197 	int coprocessor;
198 	struct undefined_handler *uh;
199 #ifdef VERBOSE_ARM32
200 	int s;
201 #endif
202 
203 	/* Enable interrupts if they were enabled before the exception. */
204 #ifdef acorn26
205 	if ((frame->tf_r15 & R15_IRQ_DISABLE) == 0)
206 		int_on();
207 #else
208 	if (!(frame->tf_spsr & I32_bit))
209 		enable_interrupts(I32_bit);
210 #endif
211 
212 #ifndef acorn26
213 #ifdef THUMB_CODE
214 	if (frame->tf_spsr & PSR_T_bit)
215 		frame->tf_pc -= THUMB_INSN_SIZE;
216 	else
217 #endif
218 	{
219 		frame->tf_pc -= INSN_SIZE;
220 	}
221 #endif
222 
223 #ifdef __PROG26
224 	fault_pc = frame->tf_r15 & R15_PC;
225 #else
226 	fault_pc = frame->tf_pc;
227 #endif
228 
229 	/* Get the current lwp/proc structure or lwp0/proc0 if there is none. */
230 	l = curlwp == NULL ? &lwp0 : curlwp;
231 
232 #ifdef THUMB_CODE
233 	if (frame->tf_spsr & PSR_T_bit) {
234 		fault_instruction = fusword((void *)(fault_pc & ~1));
235 	}
236 	else
237 #endif
238 	{
239 		/*
240 		 * Make sure the program counter is correctly aligned so we
241 		 * don't take an alignment fault trying to read the opcode.
242 		 */
243 		if (__predict_false((fault_pc & 3) != 0)) {
244 			ksiginfo_t ksi;
245 			/* Give the user an illegal instruction signal. */
246 			KSI_INIT_TRAP(&ksi);
247 			ksi.ksi_signo = SIGILL;
248 			ksi.ksi_code = ILL_ILLOPC;
249 			ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc;
250 			KERNEL_PROC_LOCK(l);
251 			trapsignal(l, &ksi);
252 			KERNEL_PROC_UNLOCK(l);
253 			userret(l);
254 			return;
255 		}
256 	 	/*
257 		 * Should use fuword() here .. but in the interests of
258 		 * squeezing every  bit of speed we will just use
259 		 * ReadWord(). We know the instruction can be read
260 		 * as was just executed so this will never fail unless
261 		 * the kernel is screwed up in which case it does
262 		 * not really matter does it ?
263 		 */
264 
265 		fault_instruction = *(u_int32_t *)fault_pc;
266 	}
267 
268 	/* Update vmmeter statistics */
269 	uvmexp.traps++;
270 
271 #ifdef THUMB_CODE
272 	if (frame->tf_spsr & PSR_T_bit) {
273 		coprocessor = THUMB_UNKNOWN_HANDLER;
274 	}
275 	else
276 #endif
277 	{
278 		/* Check for coprocessor instruction */
279 
280 		/*
281 		 * According to the datasheets you only need to look at
282 		 * bit 27 of the instruction to tell the difference
283 		 * between and undefined instruction and a coprocessor
284 		 * instruction following an undefined instruction trap.
285 		 *
286 		 * ARMv5 adds undefined instructions in the NV space,
287 		 * even when bit 27 is set.
288 		 */
289 
290 		if ((fault_instruction & (1 << 27)) != 0
291 		    && (fault_instruction & 0xf0000000) != 0xf0000000)
292 			coprocessor = (fault_instruction >> 8) & 0x0f;
293 		else
294 			coprocessor = CORE_UNKNOWN_HANDLER;
295 	}
296 
297 #ifdef __PROG26
298 	if ((frame->tf_r15 & R15_MODE) == R15_MODE_USR) {
299 #else
300 	if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
301 #endif
302 		/*
303 		 * Modify the fault_code to reflect the USR/SVC state at
304 		 * time of fault.
305 		 */
306 		fault_code = FAULT_USER;
307 		l->l_addr->u_pcb.pcb_tf = frame;
308 	} else
309 		fault_code = 0;
310 
311 	/* OK this is were we do something about the instruction. */
312 	LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link)
313 	    if (uh->uh_handler(fault_pc, fault_instruction, frame,
314 			       fault_code) == 0)
315 		    break;
316 
317 	if (uh == NULL) {
318 		/* Fault has not been handled */
319 		ksiginfo_t ksi;
320 
321 #ifdef VERBOSE_ARM32
322 		s = spltty();
323 
324 		if ((fault_instruction & 0x0f000010) == 0x0e000000) {
325 			printf("CDP\n");
326 			disassemble(fault_pc);
327 		} else if ((fault_instruction & 0x0e000000) == 0x0c000000) {
328 			printf("LDC/STC\n");
329 			disassemble(fault_pc);
330 		} else if ((fault_instruction & 0x0f000010) == 0x0e000010) {
331 			printf("MRC/MCR\n");
332 			disassemble(fault_pc);
333 		} else if ((fault_instruction & ~INSN_COND_MASK)
334 			 != (KERNEL_BREAKPOINT & ~INSN_COND_MASK)) {
335 			printf("Undefined instruction\n");
336 			disassemble(fault_pc);
337 		}
338 
339 		splx(s);
340 #endif
341 
342 		if ((fault_code & FAULT_USER) == 0) {
343 #ifdef DDB
344 			db_printf("Undefined instruction in kernel\n");
345 			kdb_trap(T_FAULT, frame);
346 #else
347 			panic("undefined instruction in kernel");
348 #endif
349 		}
350 		KSI_INIT_TRAP(&ksi);
351 		ksi.ksi_signo = SIGILL;
352 		ksi.ksi_code = ILL_ILLOPC;
353 		ksi.ksi_addr = (u_int32_t *)fault_pc;
354 		ksi.ksi_trap = fault_instruction;
355 		KERNEL_PROC_LOCK(l);
356 		trapsignal(l, &ksi);
357 		KERNEL_PROC_UNLOCK(l);
358 	}
359 
360 	if ((fault_code & FAULT_USER) == 0)
361 		return;
362 
363 #ifdef FAST_FPE
364 	/* Optimised exit code */
365 	{
366 
367 		/*
368 		 * Check for reschedule request, at the moment there is only
369 		 * 1 ast so this code should always be run
370 		 */
371 
372 		if (want_resched) {
373 			/*
374 			 * We are being preempted.
375 			 */
376 			preempt(0);
377 		}
378 
379 		/* Invoke MI userret code */
380 		mi_userret(l);
381 
382 		l->l_priority = l->l_usrpri;
383 
384 		curcpu()->ci_schedstate.spc_curpriority = l->l_priority;
385 	}
386 
387 #else
388 	userret(l);
389 #endif
390 }
391