xref: /netbsd-src/sys/arch/arm/amlogic/meson_clk_pll.c (revision 181254a7b1bdde6873432bffef2d2decc4b5c22f)
1 /* $NetBSD: meson_clk_pll.c,v 1.2 2019/02/25 19:30:17 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: meson_clk_pll.c,v 1.2 2019/02/25 19:30:17 jmcneill Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 
35 #include <dev/clk/clk_backend.h>
36 
37 #include <arm/amlogic/meson_clk.h>
38 
39 u_int
40 meson_clk_pll_get_rate(struct meson_clk_softc *sc,
41     struct meson_clk_clk *clk)
42 {
43 	struct meson_clk_pll *pll = &clk->u.pll;
44 	struct clk *clkp, *clkp_parent;
45 	u_int n, m, frac;
46 	uint64_t parent_rate, rate;
47 	uint32_t val;
48 
49 	KASSERT(clk->type == MESON_CLK_PLL);
50 
51 	clkp = &clk->base;
52 	clkp_parent = clk_get_parent(clkp);
53 	if (clkp_parent == NULL)
54 		return 0;
55 
56 	parent_rate = clk_get_rate(clkp_parent);
57 	if (parent_rate == 0)
58 		return 0;
59 
60 	CLK_LOCK(sc);
61 
62 	val = CLK_READ(sc, pll->n.reg);
63 	n = __SHIFTOUT(val, pll->n.mask);
64 
65 	val = CLK_READ(sc, pll->m.reg);
66 	m = __SHIFTOUT(val, pll->m.mask);
67 
68 	if (pll->frac.mask) {
69 		val = CLK_READ(sc, pll->frac.reg);
70 		frac = __SHIFTOUT(val, pll->frac.mask);
71 	} else {
72 		frac = 0;
73 	}
74 
75 	CLK_UNLOCK(sc);
76 
77 	rate = parent_rate * m;
78 	if (frac) {
79 		uint64_t frac_rate = parent_rate * frac;
80 		rate += howmany(frac_rate, __SHIFTOUT_MASK(pll->frac.mask) + 1);
81 	}
82 
83 	return (u_int)howmany(rate, n);
84 }
85 
86 const char *
87 meson_clk_pll_get_parent(struct meson_clk_softc *sc,
88     struct meson_clk_clk *clk)
89 {
90 	struct meson_clk_pll *pll = &clk->u.pll;
91 
92 	KASSERT(clk->type == MESON_CLK_PLL);
93 
94 	return pll->parent;
95 }
96