1 /* $NetBSD: meson_clk_mpll.c,v 1.2 2019/02/25 19:30:17 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: meson_clk_mpll.c,v 1.2 2019/02/25 19:30:17 jmcneill Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 35 #include <dev/clk/clk_backend.h> 36 37 #include <arm/amlogic/meson_clk.h> 38 39 #define SDM_DEN 0x4000 40 41 u_int 42 meson_clk_mpll_get_rate(struct meson_clk_softc *sc, 43 struct meson_clk_clk *clk) 44 { 45 struct meson_clk_mpll *mpll = &clk->u.mpll; 46 struct clk *clkp, *clkp_parent; 47 uint64_t parent_rate, sdm, n2; 48 uint32_t val; 49 50 KASSERT(clk->type == MESON_CLK_MPLL); 51 52 clkp = &clk->base; 53 clkp_parent = clk_get_parent(clkp); 54 if (clkp_parent == NULL) 55 return 0; 56 57 parent_rate = clk_get_rate(clkp_parent); 58 if (parent_rate == 0) 59 return 0; 60 61 CLK_LOCK(sc); 62 63 val = CLK_READ(sc, mpll->sdm.reg); 64 sdm = __SHIFTOUT(val, mpll->sdm.mask); 65 66 val = CLK_READ(sc, mpll->n2.reg); 67 n2 = __SHIFTOUT(val, mpll->n2.mask); 68 69 CLK_UNLOCK(sc); 70 71 const uint64_t div = (SDM_DEN * n2) + sdm; 72 if (div == 0) 73 return 0; 74 75 return (u_int)howmany(parent_rate * SDM_DEN, div); 76 } 77 78 const char * 79 meson_clk_mpll_get_parent(struct meson_clk_softc *sc, 80 struct meson_clk_clk *clk) 81 { 82 struct meson_clk_mpll *mpll = &clk->u.mpll; 83 84 KASSERT(clk->type == MESON_CLK_MPLL); 85 86 return mpll->parent; 87 } 88