1 /* $NetBSD: gxlphy.c,v 1.4 2020/03/28 18:37:18 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /* 30 * Amlogic Meson GXL 10/100 internal PHY 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: gxlphy.c,v 1.4 2020/03/28 18:37:18 thorpej Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/socket.h> 41 #include <sys/errno.h> 42 43 #include <net/if.h> 44 #include <net/if_media.h> 45 46 #include <dev/mii/mii.h> 47 #include <dev/mii/miivar.h> 48 #include <dev/mii/miidevs.h> 49 50 #define TSTCNTL 20 51 #define TSTCNTL_READ __BIT(15) 52 #define TSTCNTL_WRITE __BIT(14) 53 #define TSTCNTL_REG_BANK_SEL __BITS(12,11) 54 #define TSTCNTL_TEST_MODE __BIT(10) 55 #define TSTCNTL_READ_ADDR __BITS(9,5) 56 #define TSTCNTL_WRITE_ADDR __BITS(4,0) 57 #define TSTREAD1 21 58 #define TSTWRITE 23 59 60 #define BANK_WOL 1 61 #define BANK_BIST 3 62 63 #define LPI_STATUS 0x0c 64 #define LPI_STATUS_RSV12 __BIT(12) 65 66 #define BIST_PLL_CTRL 0x1b 67 #define BIST_PLL_DIV0 0x1c 68 #define BIST_PLL_DIV1 0x1d 69 70 static int gxlphymatch(device_t, cfdata_t, void *); 71 static void gxlphyattach(device_t, device_t, void *); 72 73 CFATTACH_DECL_NEW(gxlphy, sizeof(struct mii_softc), 74 gxlphymatch, gxlphyattach, mii_phy_detach, mii_phy_activate); 75 76 static int gxlphy_service(struct mii_softc *, struct mii_data *, int); 77 static void gxlphy_status(struct mii_softc *); 78 79 static const struct mii_phy_funcs gxlphy_funcs = { 80 gxlphy_service, gxlphy_status, mii_phy_reset, 81 }; 82 83 static const struct mii_phydesc gxlphys[] = { 84 MII_PHY_DESC(xxAMLOGIC, GXL), 85 MII_PHY_END, 86 }; 87 88 static void 89 gxl_openbanks(struct mii_softc *sc) 90 { 91 PHY_WRITE(sc, TSTCNTL, 0); 92 PHY_WRITE(sc, TSTCNTL, TSTCNTL_TEST_MODE); 93 PHY_WRITE(sc, TSTCNTL, 0); 94 PHY_WRITE(sc, TSTCNTL, TSTCNTL_TEST_MODE); 95 } 96 97 static void 98 gxl_closebanks(struct mii_softc *sc) 99 { 100 PHY_WRITE(sc, TSTCNTL, 0); 101 } 102 103 static uint16_t 104 gxl_readreg(struct mii_softc *sc, u_int bank, u_int reg) 105 { 106 uint16_t val; 107 108 gxl_openbanks(sc); 109 PHY_WRITE(sc, TSTCNTL, 110 TSTCNTL_READ | TSTCNTL_TEST_MODE | 111 __SHIFTIN(bank, TSTCNTL_REG_BANK_SEL) | 112 __SHIFTIN(reg, TSTCNTL_READ_ADDR)); 113 PHY_READ(sc, TSTREAD1, &val); 114 gxl_closebanks(sc); 115 116 return val; 117 } 118 119 static void 120 gxl_writereg(struct mii_softc *sc, u_int bank, u_int reg, uint16_t val) 121 { 122 gxl_openbanks(sc); 123 PHY_WRITE(sc, TSTWRITE, val); 124 PHY_WRITE(sc, TSTCNTL, 125 TSTCNTL_WRITE | TSTCNTL_TEST_MODE | 126 __SHIFTIN(bank, TSTCNTL_REG_BANK_SEL) | 127 __SHIFTIN(reg, TSTCNTL_WRITE_ADDR)); 128 gxl_closebanks(sc); 129 } 130 131 static int 132 gxlphymatch(device_t parent, cfdata_t match, void *aux) 133 { 134 struct mii_attach_args *ma = aux; 135 136 if (mii_phy_match(ma, gxlphys) != NULL) 137 return 20; 138 139 return 0; 140 } 141 142 static void 143 gxlphyattach(device_t parent, device_t self, void *aux) 144 { 145 struct mii_softc *sc = device_private(self); 146 struct mii_attach_args *ma = aux; 147 struct mii_data *mii = ma->mii_data; 148 int oui = MII_OUI(ma->mii_id1, ma->mii_id2); 149 int model = MII_MODEL(ma->mii_id2); 150 int rev = MII_REV(ma->mii_id2); 151 const char *descr; 152 153 if ((descr = mii_get_descr(oui, model)) != NULL) 154 aprint_normal(": %s (OUI 0x%06x, model 0x%04x), rev. %d\n", 155 descr, oui, model, rev); 156 else 157 aprint_normal(": OUI 0x%06x, model 0x%04x, rev. %d\n", 158 oui, model, rev); 159 aprint_naive(": Media interface\n"); 160 161 sc->mii_dev = self; 162 sc->mii_inst = mii->mii_instance; 163 sc->mii_phy = ma->mii_phyno; 164 sc->mii_mpd_oui = MII_OUI(ma->mii_id1, ma->mii_id2); 165 sc->mii_mpd_model = MII_MODEL(ma->mii_id2); 166 sc->mii_mpd_rev = MII_REV(ma->mii_id2); 167 sc->mii_funcs = &gxlphy_funcs; 168 sc->mii_pdata = mii; 169 sc->mii_flags = ma->mii_flags; 170 171 mii_lock(mii); 172 173 PHY_RESET(sc); 174 175 gxl_writereg(sc, BANK_BIST, BIST_PLL_CTRL, 0x5); 176 gxl_writereg(sc, BANK_BIST, BIST_PLL_DIV1, 0x029a); 177 gxl_writereg(sc, BANK_BIST, BIST_PLL_DIV0, 0xaaaa); 178 179 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities); 180 sc->mii_capabilities &= ma->mii_capmask; 181 if (sc->mii_capabilities & BMSR_EXTSTAT) 182 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities); 183 184 mii_unlock(mii); 185 186 mii_phy_add_media(sc); 187 } 188 189 static int 190 gxlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 191 { 192 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 193 uint16_t reg; 194 195 KASSERT(mii_locked(mii)); 196 197 switch (cmd) { 198 case MII_POLLSTAT: 199 /* If we're not polling our PHY instance, just return. */ 200 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 201 return 0; 202 break; 203 204 case MII_MEDIACHG: 205 /* 206 * If the media indicates a different PHY instance, 207 * isolate ourselves. 208 */ 209 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 210 PHY_READ(sc, MII_BMCR, ®); 211 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 212 return 0; 213 } 214 215 /* If the interface is not up, don't do anything. */ 216 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 217 break; 218 219 mii_phy_setmedia(sc); 220 break; 221 222 case MII_TICK: 223 /* If we're not currently selected, just return. */ 224 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 225 return 0; 226 227 if (mii_phy_tick(sc) == EJUSTRETURN) 228 return 0; 229 break; 230 231 case MII_DOWN: 232 mii_phy_down(sc); 233 return 0; 234 } 235 236 /* Update the media status. */ 237 mii_phy_status(sc); 238 239 /* Callback if something changed. */ 240 mii_phy_update(sc, cmd); 241 return 0; 242 } 243 244 static void 245 gxlphy_status(struct mii_softc *sc) 246 { 247 uint16_t bmcr, bmsr, wol, lpa, aner; 248 249 KASSERT(mii_locked(sc->mii_pdata)); 250 251 PHY_READ(sc, MII_BMCR, &bmcr); 252 if ((bmcr & BMCR_AUTOEN) == 0) 253 goto done; 254 255 PHY_READ(sc, MII_BMSR, &bmsr); 256 if ((bmsr & BMSR_ACOMP) == 0) 257 goto done; 258 259 wol = gxl_readreg(sc, BANK_WOL, LPI_STATUS); 260 PHY_READ(sc, MII_ANLPAR, &lpa); 261 PHY_READ(sc, MII_ANER, &aner); 262 263 if ((wol & LPI_STATUS_RSV12) == 0 || 264 ((aner & ANER_LPAN) != 0 && (lpa & ANLPAR_ACK) == 0)) { 265 device_printf(sc->mii_dev, "LPA corruption - aneg restart\n"); 266 267 bmcr &= ~BMCR_ISO; 268 bmcr |= BMCR_AUTOEN; 269 bmcr |= BMCR_STARTNEG; 270 PHY_WRITE(sc, MII_BMCR, bmcr); 271 272 return; 273 } 274 275 done: 276 ukphy_status(sc); 277 } 278