1 /* $NetBSD: cpu_acpi.c,v 1.15 2024/05/09 12:41:08 pho Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill@invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "tprof.h" 33 #include "opt_multiprocessor.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.15 2024/05/09 12:41:08 pho Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/interrupt.h> 43 #include <sys/kcpuset.h> 44 #include <sys/reboot.h> 45 46 #include <dev/acpi/acpireg.h> 47 #include <dev/acpi/acpivar.h> 48 49 #include <arm/armreg.h> 50 #include <arm/cpu.h> 51 #include <arm/cpufunc.h> 52 #include <arm/cpuvar.h> 53 #include <arm/locore.h> 54 55 #include <arm/arm/psci.h> 56 57 #if NTPROF > 0 58 #include <dev/tprof/tprof_armv8.h> 59 #endif 60 61 static int cpu_acpi_match(device_t, cfdata_t, void *); 62 static void cpu_acpi_attach(device_t, device_t, void *); 63 64 #if NTPROF > 0 65 static void cpu_acpi_tprof_init(device_t); 66 #endif 67 68 CFATTACH_DECL2_NEW(cpu_acpi, 0, 69 cpu_acpi_match, cpu_acpi_attach, NULL, NULL, 70 cpu_rescan, cpu_childdetached); 71 72 #ifdef MULTIPROCESSOR 73 static register_t 74 cpu_acpi_mpstart_pa(void) 75 { 76 77 return (register_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart); 78 } 79 #endif /* MULTIPROCESSOR */ 80 81 static int 82 cpu_acpi_match(device_t parent, cfdata_t cf, void *aux) 83 { 84 ACPI_SUBTABLE_HEADER *hdrp = aux; 85 ACPI_MADT_GENERIC_INTERRUPT *gicc; 86 87 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT) 88 return 0; 89 90 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp; 91 92 return (gicc->Flags & ACPI_MADT_ENABLED) != 0; 93 } 94 95 static void 96 cpu_acpi_attach(device_t parent, device_t self, void *aux) 97 { 98 prop_dictionary_t dict = device_properties(self); 99 ACPI_MADT_GENERIC_INTERRUPT *gicc = aux; 100 const uint64_t mpidr = gicc->ArmMpidr; 101 const int unit = device_unit(self); 102 struct cpu_info *ci = &cpu_info_store[unit]; 103 104 #ifdef MULTIPROCESSOR 105 if (cpu_mpidr_aff_read() != mpidr && (boothowto & RB_MD1) == 0) { 106 const u_int cpuindex = device_unit(self); 107 int error; 108 109 cpu_mpidr[cpuindex] = mpidr; 110 cpu_dcache_wb_range((vaddr_t)&cpu_mpidr[cpuindex], 111 sizeof(cpu_mpidr[cpuindex])); 112 113 /* XXX support spin table */ 114 error = psci_cpu_on(mpidr, cpu_acpi_mpstart_pa(), 0); 115 if (error != PSCI_SUCCESS) { 116 aprint_error_dev(self, "failed to start CPU\n"); 117 return; 118 } 119 120 sev(); 121 122 for (u_int i = 0x10000000; i > 0; i--) { 123 if (cpu_hatched_p(cpuindex)) 124 break; 125 } 126 } 127 #endif /* MULTIPROCESSOR */ 128 129 /* Assume that less efficient processors are faster. */ 130 prop_dictionary_set_uint32(dict, "capacity_dmips_mhz", 131 gicc->EfficiencyClass); 132 133 /* Store the ACPI Processor UID in cpu_info */ 134 ci->ci_acpiid = gicc->Uid; 135 136 /* Attach the CPU */ 137 cpu_attach(self, mpidr); 138 139 #if NTPROF > 0 140 if (cpu_mpidr_aff_read() == mpidr && armv8_pmu_detect()) 141 config_interrupts(self, cpu_acpi_tprof_init); 142 #endif 143 } 144 145 #if NTPROF > 0 146 static struct cpu_info * 147 cpu_acpi_find_processor(UINT32 uid) 148 { 149 CPU_INFO_ITERATOR cii; 150 struct cpu_info *ci; 151 152 for (CPU_INFO_FOREACH(cii, ci)) { 153 if (ci->ci_acpiid == uid) 154 return ci; 155 } 156 157 return NULL; 158 } 159 160 static ACPI_STATUS 161 cpu_acpi_tprof_intr_establish(ACPI_SUBTABLE_HEADER *hdrp, void *aux) 162 { 163 device_t dev = aux; 164 ACPI_MADT_GENERIC_INTERRUPT *gicc; 165 struct cpu_info *ci; 166 char xname[16]; 167 kcpuset_t *set; 168 int error; 169 void *ih; 170 171 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT) 172 return AE_OK; 173 174 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp; 175 if ((gicc->Flags & ACPI_MADT_ENABLED) == 0) 176 return AE_OK; 177 178 const bool cpu_primary_p = cpu_info_store[0].ci_cpuid == gicc->ArmMpidr; 179 const bool intr_ppi_p = gicc->PerformanceInterrupt < 32; 180 const int type = (gicc->Flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) ? 181 IST_EDGE : IST_LEVEL; 182 183 if (intr_ppi_p && !cpu_primary_p) 184 return AE_OK; 185 186 ci = cpu_acpi_find_processor(gicc->Uid); 187 if (ci == NULL) { 188 aprint_error_dev(dev, "couldn't find processor %#x\n", 189 gicc->Uid); 190 return AE_OK; 191 } 192 193 if (intr_ppi_p) { 194 strlcpy(xname, "pmu", sizeof(xname)); 195 } else { 196 snprintf(xname, sizeof(xname), "pmu %s", cpu_name(ci)); 197 } 198 199 ih = intr_establish_xname(gicc->PerformanceInterrupt, IPL_HIGH, 200 type | IST_MPSAFE, armv8_pmu_intr, NULL, xname); 201 if (ih == NULL) { 202 aprint_error_dev(dev, "couldn't establish %s interrupt\n", 203 xname); 204 return AE_OK; 205 } 206 207 if (!intr_ppi_p) { 208 kcpuset_create(&set, true); 209 kcpuset_set(set, cpu_index(ci)); 210 error = interrupt_distribute(ih, set, NULL); 211 kcpuset_destroy(set); 212 213 if (error) { 214 aprint_error_dev(dev, 215 "failed to distribute %s interrupt: %d\n", 216 xname, error); 217 return AE_OK; 218 } 219 } 220 221 aprint_normal("%s: PMU interrupting on irq %d\n", cpu_name(ci), 222 gicc->PerformanceInterrupt); 223 224 return AE_OK; 225 } 226 227 static void 228 cpu_acpi_tprof_init(device_t self) 229 { 230 int err = armv8_pmu_init(); 231 if (err) { 232 aprint_error_dev(self, 233 "failed to initialize PMU event counter\n"); 234 return; 235 } 236 237 if (acpi_madt_map() != AE_OK) { 238 aprint_error_dev(self, 239 "failed to map MADT, performance counters not available\n"); 240 return; 241 } 242 acpi_madt_walk(cpu_acpi_tprof_intr_establish, self); 243 acpi_madt_unmap(); 244 } 245 #endif 246