1 /* $NetBSD: cpu_acpi.c,v 1.7 2019/10/19 18:04:26 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill@invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "tprof.h" 33 #include "opt_multiprocessor.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.7 2019/10/19 18:04:26 jmcneill Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/bus.h> 40 #include <sys/cpu.h> 41 #include <sys/device.h> 42 #include <sys/interrupt.h> 43 #include <sys/kcpuset.h> 44 #include <sys/reboot.h> 45 46 #include <dev/acpi/acpireg.h> 47 #include <dev/acpi/acpivar.h> 48 49 #include <arm/armreg.h> 50 #include <arm/cpu.h> 51 #include <arm/cpufunc.h> 52 #include <arm/locore.h> 53 54 #include <arm/arm/psci.h> 55 56 #if NTPROF > 0 57 #include <dev/tprof/tprof_armv8.h> 58 #endif 59 60 extern struct cpu_info cpu_info_store[]; 61 62 static int cpu_acpi_match(device_t, cfdata_t, void *); 63 static void cpu_acpi_attach(device_t, device_t, void *); 64 65 #if NTPROF > 0 66 static void cpu_acpi_tprof_init(device_t); 67 #endif 68 69 CFATTACH_DECL_NEW(cpu_acpi, 0, cpu_acpi_match, cpu_acpi_attach, NULL, NULL); 70 71 #ifdef MULTIPROCESSOR 72 static register_t 73 cpu_acpi_mpstart_pa(void) 74 { 75 76 return (register_t)KERN_VTOPHYS((vaddr_t)cpu_mpstart); 77 } 78 #endif /* MULTIPROCESSOR */ 79 80 static int 81 cpu_acpi_match(device_t parent, cfdata_t cf, void *aux) 82 { 83 ACPI_SUBTABLE_HEADER *hdrp = aux; 84 ACPI_MADT_GENERIC_INTERRUPT *gicc; 85 86 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT) 87 return 0; 88 89 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp; 90 91 return (gicc->Flags & ACPI_MADT_ENABLED) != 0; 92 } 93 94 static void 95 cpu_acpi_attach(device_t parent, device_t self, void *aux) 96 { 97 ACPI_MADT_GENERIC_INTERRUPT *gicc = aux; 98 const uint64_t mpidr = gicc->ArmMpidr; 99 const int unit = device_unit(self); 100 struct cpu_info *ci = &cpu_info_store[unit]; 101 102 #ifdef MULTIPROCESSOR 103 if (cpu_mpidr_aff_read() != mpidr && (boothowto & RB_MD1) == 0) { 104 const u_int cpuindex = device_unit(self); 105 int error; 106 107 cpu_mpidr[cpuindex] = mpidr; 108 cpu_dcache_wb_range((vaddr_t)&cpu_mpidr[cpuindex], sizeof(cpu_mpidr[cpuindex])); 109 110 /* XXX support spin table */ 111 error = psci_cpu_on(mpidr, cpu_acpi_mpstart_pa(), 0); 112 if (error != PSCI_SUCCESS) { 113 aprint_error_dev(self, "failed to start CPU\n"); 114 return; 115 } 116 117 __asm __volatile("sev" ::: "memory"); 118 119 for (u_int i = 0x10000000; i > 0; i--) { 120 if (cpu_hatched_p(cpuindex)) 121 break; 122 } 123 } 124 #endif /* MULTIPROCESSOR */ 125 126 /* Store the ACPI Processor UID in cpu_info */ 127 ci->ci_acpiid = gicc->Uid; 128 129 /* Attach the CPU */ 130 cpu_attach(self, mpidr); 131 132 #if NTPROF > 0 133 if (cpu_mpidr_aff_read() == mpidr) 134 config_interrupts(self, cpu_acpi_tprof_init); 135 #endif 136 } 137 138 #if NTPROF > 0 139 static struct cpu_info * 140 cpu_acpi_find_processor(UINT32 uid) 141 { 142 CPU_INFO_ITERATOR cii; 143 struct cpu_info *ci; 144 145 for (CPU_INFO_FOREACH(cii, ci)) { 146 if (ci->ci_acpiid == uid) 147 return ci; 148 } 149 150 return NULL; 151 } 152 153 static ACPI_STATUS 154 cpu_acpi_tprof_intr_establish(ACPI_SUBTABLE_HEADER *hdrp, void *aux) 155 { 156 device_t dev = aux; 157 ACPI_MADT_GENERIC_INTERRUPT *gicc; 158 struct cpu_info *ci; 159 char xname[16]; 160 kcpuset_t *set; 161 int error; 162 void *ih; 163 164 if (hdrp->Type != ACPI_MADT_TYPE_GENERIC_INTERRUPT) 165 return AE_OK; 166 167 gicc = (ACPI_MADT_GENERIC_INTERRUPT *)hdrp; 168 if ((gicc->Flags & ACPI_MADT_ENABLED) == 0) 169 return AE_OK; 170 171 const bool cpu_primary_p = cpu_mpidr_aff_read() == gicc->ArmMpidr; 172 const bool intr_ppi_p = gicc->PerformanceInterrupt < 32; 173 const int type = (gicc->Flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) ? IST_EDGE : IST_LEVEL; 174 175 if (intr_ppi_p && !cpu_primary_p) 176 return AE_OK; 177 178 ci = cpu_acpi_find_processor(gicc->Uid); 179 if (ci == NULL) { 180 aprint_error_dev(dev, "couldn't find processor %#x\n", gicc->Uid); 181 return AE_OK; 182 } 183 184 if (intr_ppi_p) { 185 strlcpy(xname, "pmu", sizeof(xname)); 186 } else { 187 snprintf(xname, sizeof(xname), "pmu %s", cpu_name(ci)); 188 } 189 190 ih = intr_establish_xname(gicc->PerformanceInterrupt, IPL_HIGH, type | IST_MPSAFE, 191 armv8_pmu_intr, NULL, xname); 192 if (ih == NULL) { 193 aprint_error_dev(dev, "couldn't establish %s interrupt\n", xname); 194 return AE_OK; 195 } 196 197 if (!intr_ppi_p) { 198 kcpuset_create(&set, true); 199 kcpuset_set(set, cpu_index(ci)); 200 error = interrupt_distribute(ih, set, NULL); 201 kcpuset_destroy(set); 202 203 if (error) { 204 aprint_error_dev(dev, "failed to distribute %s interrupt: %d\n", 205 xname, error); 206 return AE_OK; 207 } 208 } 209 210 aprint_normal("%s: PMU interrupting on irq %d\n", cpu_name(ci), gicc->PerformanceInterrupt); 211 212 return AE_OK; 213 } 214 215 static void 216 cpu_acpi_tprof_init(device_t self) 217 { 218 armv8_pmu_init(); 219 220 if (acpi_madt_map() != AE_OK) { 221 aprint_error_dev(self, "failed to map MADT, performance counters not available\n"); 222 return; 223 } 224 acpi_madt_walk(cpu_acpi_tprof_intr_establish, self); 225 acpi_madt_unmap(); 226 } 227 #endif 228