1 /* $NetBSD: acpi_platform.c,v 1.34 2022/11/16 11:54:26 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill@invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "com.h" 33 #include "plcom.h" 34 #include "opt_efi.h" 35 #include "opt_multiprocessor.h" 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.34 2022/11/16 11:54:26 skrll Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/bus.h> 42 #include <sys/cpu.h> 43 #include <sys/device.h> 44 #include <sys/termios.h> 45 #include <sys/kprintf.h> 46 47 #include <dev/fdt/fdtvar.h> 48 #include <arm/fdt/arm_fdtvar.h> 49 50 #include <uvm/uvm_extern.h> 51 52 #include <machine/bootconfig.h> 53 #include <arm/cpufunc.h> 54 #include <arm/locore.h> 55 56 #include <arm/cortex/gtmr_var.h> 57 58 #include <arm/arm/smccc.h> 59 #include <arm/arm/psci.h> 60 #include <arm/fdt/psci_fdtvar.h> 61 62 #include <evbarm/fdt/platform.h> 63 64 #include <evbarm/dev/plcomreg.h> 65 #include <evbarm/dev/plcomvar.h> 66 #include <dev/ic/ns16550reg.h> 67 #include <dev/ic/comreg.h> 68 #include <dev/ic/comvar.h> 69 70 #if NCOM > 0 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcivar.h> 73 #include <dev/pci/pucvar.h> 74 #endif 75 76 #ifdef EFI_RUNTIME 77 #include <arm/arm/efi_runtime.h> 78 #endif 79 80 #include <dev/acpi/acpireg.h> 81 #include <dev/acpi/acpivar.h> 82 #include <arm/acpi/acpi_table.h> 83 84 #include <libfdt.h> 85 86 #define SPCR_BAUD_DEFAULT 0 87 #define SPCR_BAUD_9600 3 88 #define SPCR_BAUD_19200 4 89 #define SPCR_BAUD_57600 6 90 #define SPCR_BAUD_115200 7 91 92 static const struct acpi_spcr_baud_rate { 93 uint8_t id; 94 int baud_rate; 95 } acpi_spcr_baud_rates[] = { 96 /* 97 * SPCR_BAUD_DEFAULT means: 98 * "As is, operating system relies on the current configuration 99 * of serial port until the full featured driver will be 100 * initialized." 101 * 102 * We don't currently have a good way of telling the UART driver 103 * to detect the currently configured baud rate, so just pick 104 * something sensible here. 105 * 106 * In the past we have tried baud_rate values of 0 and -1, but 107 * these cause problems with the com(4) driver. 108 */ 109 { SPCR_BAUD_DEFAULT, 115200 }, 110 { SPCR_BAUD_9600, 9600 }, 111 { SPCR_BAUD_19200, 19200 }, 112 { SPCR_BAUD_57600, 57600 }, 113 { SPCR_BAUD_115200, 115200 }, 114 }; 115 116 extern struct bus_space arm_generic_bs_tag; 117 118 #if NPLCOM > 0 119 static struct plcom_instance plcom_console; 120 #endif 121 122 struct arm32_bus_dma_tag acpi_coherent_dma_tag; 123 static struct arm32_dma_range acpi_coherent_ranges[] = { 124 [0] = { 125 .dr_sysbase = 0, 126 .dr_busbase = 0, 127 .dr_len = UINTPTR_MAX, 128 .dr_flags = _BUS_DMAMAP_COHERENT, 129 } 130 }; 131 132 static const struct pmap_devmap * 133 acpi_platform_devmap(void) 134 { 135 static const struct pmap_devmap devmap[] = { 136 DEVMAP_ENTRY_END 137 }; 138 139 return devmap; 140 } 141 142 static void 143 acpi_platform_bootstrap(void) 144 { 145 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 146 147 acpi_coherent_dma_tag = arm_generic_dma_tag; 148 acpi_coherent_dma_tag._ranges = acpi_coherent_ranges; 149 acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges); 150 } 151 152 static void 153 acpi_platform_attach_uart(ACPI_TABLE_SPCR *spcr) 154 { 155 #if NCOM > 0 156 struct com_regs regs; 157 bus_space_handle_t dummy_bsh; 158 u_int reg_shift; 159 #endif 160 int baud_rate, n; 161 162 /* 163 * Only MMIO access is supported today. 164 */ 165 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) { 166 return; 167 } 168 if (le64toh(spcr->SerialPort.Address) == 0) { 169 return; 170 } 171 172 /* 173 * Lookup SPCR baud rate. 174 */ 175 baud_rate = 0; 176 for (n = 0; n < __arraycount(acpi_spcr_baud_rates); n++) { 177 if (acpi_spcr_baud_rates[n].id == spcr->BaudRate) { 178 baud_rate = acpi_spcr_baud_rates[n].baud_rate; 179 break; 180 } 181 } 182 183 /* 184 * Attach console device. 185 */ 186 switch (spcr->InterfaceType) { 187 #if NPLCOM > 0 188 case ACPI_DBG2_ARM_PL011: 189 case ACPI_DBG2_ARM_SBSA_32BIT: 190 case ACPI_DBG2_ARM_SBSA_GENERIC: 191 plcom_console.pi_type = PLCOM_TYPE_PL011; 192 plcom_console.pi_iot = &arm_generic_bs_tag; 193 plcom_console.pi_iobase = le64toh(spcr->SerialPort.Address); 194 plcom_console.pi_size = PL011COM_UART_SIZE; 195 plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS; 196 197 plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1); 198 break; 199 #endif 200 201 #if NCOM > 0 202 case ACPI_DBG2_16550_COMPATIBLE: 203 case ACPI_DBG2_16550_SUBSET: 204 case ACPI_DBG2_16550_WITH_GAS: 205 memset(&dummy_bsh, 0, sizeof(dummy_bsh)); 206 switch (spcr->SerialPort.BitWidth) { 207 case 8: 208 reg_shift = 0; 209 break; 210 case 16: 211 reg_shift = 1; 212 break; 213 case 32: 214 reg_shift = 2; 215 break; 216 default: 217 /* 218 * Bit width 0 is possible for types 0 and 1. Otherwise, 219 * possibly buggy firmware. 220 */ 221 if (spcr->InterfaceType == ACPI_DBG2_16550_COMPATIBLE) { 222 reg_shift = 0; 223 } else { 224 reg_shift = 2; 225 } 226 break; 227 } 228 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh, 229 le64toh(spcr->SerialPort.Address), reg_shift); 230 comcnattach1(®s, baud_rate, -1, COM_TYPE_NORMAL, 231 TTYDEF_CFLAG); 232 break; 233 234 case ACPI_DBG2_BCM2835: 235 memset(&dummy_bsh, 0, sizeof(dummy_bsh)); 236 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh, 237 le64toh(spcr->SerialPort.Address) + 0x40, 2); 238 comcnattach1(®s, baud_rate, -1, COM_TYPE_BCMAUXUART, 239 TTYDEF_CFLAG); 240 cn_set_magic("+++++"); 241 break; 242 #endif 243 244 default: 245 printf("SPCR: kernel does not support interface type %#x\n", 246 spcr->InterfaceType); 247 break; 248 } 249 250 /* 251 * UEFI firmware may leave the console in an undesireable state (wrong 252 * foreground/background colour, etc). Reset the terminal and clear 253 * text from the cursor to the end of the screen. 254 */ 255 printf_flags(TOCONS|NOTSTAMP, "\033[0m"); 256 printf_flags(TOCONS|NOTSTAMP, "\033[0J"); 257 } 258 259 static void 260 acpi_platform_startup(void) 261 { 262 ACPI_TABLE_SPCR *spcr; 263 ACPI_TABLE_FADT *fadt; 264 #ifdef MULTIPROCESSOR 265 ACPI_TABLE_MADT *madt; 266 #endif 267 268 /* 269 * Setup serial console device 270 */ 271 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) { 272 acpi_platform_attach_uart(spcr); 273 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr); 274 } 275 276 /* 277 * Initialize PSCI 0.2+ if implemented 278 */ 279 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) { 280 const uint16_t boot_flags = le16toh(fadt->ArmBootFlags); 281 if ((boot_flags & ACPI_FADT_PSCI_COMPLIANT) != 0) { 282 if ((boot_flags & ACPI_FADT_PSCI_USE_HVC) != 0) { 283 psci_init(psci_call_hvc); 284 } else { 285 psci_init(psci_call_smc); 286 } 287 smccc_probe(); 288 } 289 acpi_table_unmap((ACPI_TABLE_HEADER *)fadt); 290 } 291 292 #ifdef MULTIPROCESSOR 293 /* 294 * Count CPUs 295 */ 296 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) { 297 char *end = (char *)madt + le32toh(madt->Header.Length); 298 char *where = (char *)madt + sizeof(ACPI_TABLE_MADT); 299 while (where < end) { 300 ACPI_SUBTABLE_HEADER *subtable = 301 (ACPI_SUBTABLE_HEADER *)where; 302 if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) 303 arm_cpu_max++; 304 where += subtable->Length; 305 } 306 acpi_table_unmap((ACPI_TABLE_HEADER *)madt); 307 } 308 #endif /* MULTIPROCESSOR */ 309 } 310 311 static void 312 acpi_platform_init_attach_args(struct fdt_attach_args *faa) 313 { 314 extern struct bus_space arm_generic_bs_tag; 315 316 faa->faa_bst = &arm_generic_bs_tag; 317 faa->faa_dmat = &acpi_coherent_dma_tag; 318 } 319 320 static void 321 acpi_platform_device_register(device_t self, void *aux) 322 { 323 #if NCOM > 0 324 prop_dictionary_t prop = device_properties(self); 325 ACPI_STATUS rv; 326 327 if (device_is_a(self, "com")) { 328 ACPI_TABLE_SPCR *spcr; 329 330 rv = acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr); 331 if (ACPI_FAILURE(rv)) { 332 return; 333 } 334 335 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) { 336 goto spcr_unmap; 337 } 338 if (le64toh(spcr->SerialPort.Address) == 0) { 339 goto spcr_unmap; 340 } 341 if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE && 342 spcr->InterfaceType != ACPI_DBG2_16550_SUBSET) { 343 goto spcr_unmap; 344 } 345 346 if (device_is_a(device_parent(self), "puc")) { 347 const struct puc_attach_args * const paa = aux; 348 int b, d, f; 349 350 const int s = pci_get_segment(paa->pc); 351 pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f); 352 353 if (spcr->PciSegment == s && spcr->PciBus == b && 354 spcr->PciDevice == d && spcr->PciFunction == f) { 355 prop_dictionary_set_bool(prop, 356 "force_console", true); 357 } 358 } 359 360 if (device_is_a(device_parent(self), "acpi")) { 361 struct acpi_attach_args * const aa = aux; 362 struct acpi_resources res; 363 struct acpi_mem *mem; 364 365 if (ACPI_FAILURE(acpi_resource_parse(self, 366 aa->aa_node->ad_handle, "_CRS", &res, 367 &acpi_resource_parse_ops_quiet))) { 368 goto spcr_unmap; 369 } 370 371 mem = acpi_res_mem(&res, 0); 372 if (mem == NULL) { 373 goto crs_cleanup; 374 } 375 376 if (mem->ar_base == le64toh(spcr->SerialPort.Address)) { 377 prop_dictionary_set_bool(prop, 378 "force_console", true); 379 } 380 381 crs_cleanup: 382 acpi_resource_cleanup(&res); 383 } 384 385 spcr_unmap: 386 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr); 387 } 388 #endif 389 } 390 391 static void 392 acpi_platform_reset(void) 393 { 394 #ifdef EFI_RUNTIME 395 if (arm_efirt_reset(EFI_RESET_COLD) == 0) 396 return; 397 #endif 398 if (psci_available()) 399 psci_system_reset(); 400 } 401 402 static u_int 403 acpi_platform_uart_freq(void) 404 { 405 return 0; 406 } 407 408 static const struct arm_platform acpi_platform = { 409 .ap_devmap = acpi_platform_devmap, 410 .ap_bootstrap = acpi_platform_bootstrap, 411 .ap_startup = acpi_platform_startup, 412 .ap_init_attach_args = acpi_platform_init_attach_args, 413 .ap_device_register = acpi_platform_device_register, 414 .ap_reset = acpi_platform_reset, 415 .ap_delay = gtmr_delay, 416 .ap_uart_freq = acpi_platform_uart_freq, 417 }; 418 419 ARM_PLATFORM(acpi, "netbsd,generic-acpi", &acpi_platform); 420