1 /* $NetBSD: necpb.c,v 1.18 2004/08/30 15:05:16 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 42 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Charles M. Hannum. 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 60 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 61 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 62 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 63 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 64 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 65 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 66 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 67 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #include <sys/cdefs.h> 71 __KERNEL_RCSID(0, "$NetBSD: necpb.c,v 1.18 2004/08/30 15:05:16 drochner Exp $"); 72 73 #include <sys/types.h> 74 #include <sys/param.h> 75 #include <sys/time.h> 76 #include <sys/systm.h> 77 #include <sys/errno.h> 78 #include <sys/device.h> 79 #include <sys/malloc.h> 80 #include <sys/extent.h> 81 82 #include <uvm/uvm_extern.h> 83 84 #define _ARC_BUS_DMA_PRIVATE 85 #include <machine/bus.h> 86 87 #include <machine/pio.h> 88 89 #include <machine/autoconf.h> 90 #include <machine/cpu.h> 91 #include <machine/platform.h> 92 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcireg.h> 95 96 #include <arc/jazz/rd94.h> 97 #include <arc/pci/necpbvar.h> 98 99 int necpbmatch __P((struct device *, struct cfdata *, void *)); 100 void necpbattach __P((struct device *, struct device *, void *)); 101 102 void necpb_attach_hook __P((struct device *, struct device *, 103 struct pcibus_attach_args *)); 104 int necpb_bus_maxdevs __P((pci_chipset_tag_t, int)); 105 pcitag_t necpb_make_tag __P((pci_chipset_tag_t, int, int, int)); 106 void necpb_decompose_tag __P((pci_chipset_tag_t, pcitag_t, int *, 107 int *, int *)); 108 pcireg_t necpb_conf_read __P((pci_chipset_tag_t, pcitag_t, int)); 109 void necpb_conf_write __P((pci_chipset_tag_t, pcitag_t, int, 110 pcireg_t)); 111 int necpb_intr_map __P((struct pci_attach_args *, 112 pci_intr_handle_t *)); 113 const char * necpb_intr_string __P((pci_chipset_tag_t, pci_intr_handle_t)); 114 void * necpb_intr_establish __P((pci_chipset_tag_t, pci_intr_handle_t, 115 int, int (*func)(void *), void *)); 116 void necpb_intr_disestablish __P((pci_chipset_tag_t, void *)); 117 118 int necpb_intr(unsigned, struct clockframe *); 119 120 121 CFATTACH_DECL(necpb, sizeof(struct necpb_softc), 122 necpbmatch, necpbattach, NULL, NULL); 123 124 extern struct cfdriver necpb_cd; 125 126 static struct necpb_intrhand *necpb_inttbl[4]; 127 128 /* There can be only one. */ 129 int necpbfound; 130 struct necpb_context necpb_main_context; 131 static long necpb_mem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)]; 132 static long necpb_io_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)]; 133 134 int 135 necpbmatch(parent, match, aux) 136 struct device *parent; 137 struct cfdata *match; 138 void *aux; 139 { 140 struct confargs *ca = aux; 141 142 if (strcmp(ca->ca_name, necpb_cd.cd_name) != 0) 143 return (0); 144 145 if (necpbfound) 146 return (0); 147 148 return (1); 149 } 150 151 /* 152 * Set up the chipset's function pointers. 153 */ 154 void 155 necpb_init(ncp) 156 struct necpb_context *ncp; 157 { 158 pcitag_t tag; 159 pcireg_t csr; 160 161 if (ncp->nc_initialized) 162 return; 163 164 arc_large_bus_space_init(&ncp->nc_memt, "necpcimem", 165 RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM); 166 arc_bus_space_init_extent(&ncp->nc_memt, (caddr_t)necpb_mem_ex_storage, 167 sizeof(necpb_mem_ex_storage)); 168 169 arc_bus_space_init(&ncp->nc_iot, "necpciio", 170 RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO); 171 arc_bus_space_init_extent(&ncp->nc_iot, (caddr_t)necpb_io_ex_storage, 172 sizeof(necpb_io_ex_storage)); 173 174 jazz_bus_dma_tag_init(&ncp->nc_dmat); 175 176 ncp->nc_pc.pc_attach_hook = necpb_attach_hook; 177 ncp->nc_pc.pc_bus_maxdevs = necpb_bus_maxdevs; 178 ncp->nc_pc.pc_make_tag = necpb_make_tag; 179 ncp->nc_pc.pc_decompose_tag = necpb_decompose_tag; 180 ncp->nc_pc.pc_conf_read = necpb_conf_read; 181 ncp->nc_pc.pc_conf_write = necpb_conf_write; 182 ncp->nc_pc.pc_intr_map = necpb_intr_map; 183 ncp->nc_pc.pc_intr_string = necpb_intr_string; 184 ncp->nc_pc.pc_intr_establish = necpb_intr_establish; 185 ncp->nc_pc.pc_intr_disestablish = necpb_intr_disestablish; 186 187 /* 188 * XXX: 189 * NEC's firmware does not configure PCI devices completely. 190 * We need to disable expansion ROM and enable mem/io/busmaster 191 * bits here. 192 */ 193 tag = necpb_make_tag(&ncp->nc_pc, 0, 3, 0); 194 csr = necpb_conf_read(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG); 195 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 196 PCI_COMMAND_MASTER_ENABLE; 197 necpb_conf_write(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG, csr); 198 necpb_conf_write(&ncp->nc_pc, tag, PCI_MAPREG_ROM, 0); 199 200 tag = necpb_make_tag(&ncp->nc_pc, 0, 4, 0); 201 csr = necpb_conf_read(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG); 202 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 203 PCI_COMMAND_MASTER_ENABLE; 204 necpb_conf_write(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG, csr); 205 necpb_conf_write(&ncp->nc_pc, tag, PCI_MAPREG_ROM, 0); 206 207 tag = necpb_make_tag(&ncp->nc_pc, 0, 5, 0); 208 csr = necpb_conf_read(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG); 209 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 210 PCI_COMMAND_MASTER_ENABLE; 211 necpb_conf_write(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG, csr); 212 necpb_conf_write(&ncp->nc_pc, tag, PCI_MAPREG_ROM, 0); 213 214 ncp->nc_initialized = 1; 215 } 216 217 void 218 necpbattach(parent, self, aux) 219 struct device *parent, *self; 220 void *aux; 221 { 222 struct necpb_softc *sc = (struct necpb_softc *)self; 223 struct pcibus_attach_args pba; 224 int i; 225 226 necpbfound = 1; 227 228 printf("\n"); 229 230 sc->sc_ncp = &necpb_main_context; 231 necpb_init(sc->sc_ncp); 232 233 out32(RD94_SYS_PCI_INTMASK, 0xf); 234 235 for (i = 0; i < 4; i++) 236 necpb_inttbl[i] = NULL; 237 238 (*platform->set_intr)(MIPS_INT_MASK_2, necpb_intr, 3); 239 240 pba.pba_iot = &sc->sc_ncp->nc_iot; 241 pba.pba_memt = &sc->sc_ncp->nc_memt; 242 pba.pba_dmat = &sc->sc_ncp->nc_dmat; 243 pba.pba_dmat64 = NULL; 244 pba.pba_pc = &sc->sc_ncp->nc_pc; 245 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 246 pba.pba_bus = 0; 247 pba.pba_bridgetag = NULL; 248 249 config_found_ia(self, "pcibus", &pba, pcibusprint); 250 } 251 252 void 253 necpb_attach_hook(parent, self, pba) 254 struct device *parent, *self; 255 struct pcibus_attach_args *pba; 256 { 257 } 258 259 int 260 necpb_bus_maxdevs(pc, busno) 261 pci_chipset_tag_t pc; 262 int busno; 263 { 264 return (32); 265 } 266 267 pcitag_t 268 necpb_make_tag(pc, bus, device, function) 269 pci_chipset_tag_t pc; 270 int bus, device, function; 271 { 272 pcitag_t tag; 273 274 if (bus >= 256 || device >= 32 || function >= 8) 275 panic("necpb_make_tag: bad request"); 276 277 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8); 278 return (tag); 279 } 280 281 void 282 necpb_decompose_tag(pc, tag, bp, dp, fp) 283 pci_chipset_tag_t pc; 284 pcitag_t tag; 285 int *bp, *dp, *fp; 286 { 287 if (bp != NULL) 288 *bp = (tag >> 16) & 0xff; 289 if (dp != NULL) 290 *dp = (tag >> 11) & 0x1f; 291 if (fp != NULL) 292 *fp = (tag >> 8) & 0x07; 293 } 294 295 pcireg_t 296 necpb_conf_read(pc, tag, reg) 297 pci_chipset_tag_t pc; 298 pcitag_t tag; 299 int reg; 300 { 301 pcireg_t data; 302 int s; 303 304 s = splhigh(); 305 out32(RD94_SYS_PCI_CONFADDR, tag | reg); 306 data = in32(RD94_SYS_PCI_CONFDATA); 307 out32(RD94_SYS_PCI_CONFADDR, 0); 308 splx(s); 309 310 return (data); 311 } 312 313 void 314 necpb_conf_write(pc, tag, reg, data) 315 pci_chipset_tag_t pc; 316 pcitag_t tag; 317 int reg; 318 pcireg_t data; 319 { 320 int s; 321 322 s = splhigh(); 323 out32(RD94_SYS_PCI_CONFADDR, tag | reg); 324 out32(RD94_SYS_PCI_CONFDATA, data); 325 out32(RD94_SYS_PCI_CONFADDR, 0); 326 splx(s); 327 } 328 329 int 330 necpb_intr_map(pa, ihp) 331 struct pci_attach_args *pa; 332 pci_intr_handle_t *ihp; 333 { 334 pci_chipset_tag_t pc = pa->pa_pc; 335 pcitag_t intrtag = pa->pa_intrtag; 336 int pin = pa->pa_intrpin; 337 int bus, dev; 338 339 if (pin == 0) { 340 /* No IRQ used. */ 341 *ihp = -1; 342 return (1); 343 } 344 345 if (pin > 4) { 346 printf("necpb_intr_map: bad interrupt pin %d\n", pin); 347 *ihp = -1; 348 return (1); 349 } 350 351 necpb_decompose_tag(pc, intrtag, &bus, &dev, NULL); 352 if (bus != 0) { 353 *ihp = -1; 354 return (1); 355 } 356 357 switch (dev) { 358 case 3: 359 *ihp = (pin+2) % 4; 360 break; 361 case 4: 362 *ihp = (pin+1) % 4; 363 break; 364 case 5: 365 *ihp = (pin) % 4; 366 break; 367 default: 368 *ihp = -1; 369 return (1); 370 } 371 372 return (0); 373 } 374 375 const char * 376 necpb_intr_string(pc, ih) 377 pci_chipset_tag_t pc; 378 pci_intr_handle_t ih; 379 { 380 static char str[8]; 381 382 if (ih >= 4) 383 panic("necpb_intr_string: bogus handle %ld", ih); 384 sprintf(str, "int %c", 'A' + (int)ih); 385 return (str); 386 } 387 388 void * 389 necpb_intr_establish(pc, ih, level, func, arg) 390 pci_chipset_tag_t pc; 391 pci_intr_handle_t ih; 392 int level, (*func) __P((void *)); 393 void *arg; 394 { 395 struct necpb_intrhand *n, *p; 396 u_int32_t mask; 397 398 if (ih >= 4) 399 panic("necpb_intr_establish: bogus handle"); 400 401 n = malloc(sizeof(struct necpb_intrhand), M_DEVBUF, M_NOWAIT); 402 if (n == NULL) 403 panic("necpb_intr_establish: can't malloc interrupt handle"); 404 405 n->ih_func = func; 406 n->ih_arg = arg; 407 n->ih_next = NULL; 408 n->ih_intn = ih; 409 strlcpy(n->ih_evname, necpb_intr_string(pc, ih), sizeof(n->ih_evname)); 410 evcnt_attach_dynamic(&n->ih_evcnt, EVCNT_TYPE_INTR, NULL, "necpb", 411 n->ih_evname); 412 413 if (necpb_inttbl[ih] == NULL) { 414 necpb_inttbl[ih] = n; 415 mask = in32(RD94_SYS_PCI_INTMASK); 416 mask |= 1 << ih; 417 out32(RD94_SYS_PCI_INTMASK, mask); 418 } else { 419 p = necpb_inttbl[ih]; 420 while (p->ih_next != NULL) 421 p = p->ih_next; 422 p->ih_next = n; 423 } 424 425 return n; 426 } 427 428 void 429 necpb_intr_disestablish(pc, cookie) 430 pci_chipset_tag_t pc; 431 void *cookie; 432 { 433 struct necpb_intrhand *n, *p, *q; 434 u_int32_t mask; 435 436 n = cookie; 437 438 q = NULL; 439 p = necpb_inttbl[n->ih_intn]; 440 while (p != n) { 441 if (p == NULL) 442 panic("necpb_intr_disestablish: broken intr table"); 443 q = p; 444 p = p->ih_next; 445 } 446 447 if (q == NULL) { 448 necpb_inttbl[n->ih_intn] = n->ih_next; 449 if (n->ih_next == NULL) { 450 mask = in32(RD94_SYS_PCI_INTMASK); 451 mask &= ~(1 << n->ih_intn); 452 out32(RD94_SYS_PCI_INTMASK, mask); 453 } 454 } else 455 q->ih_next = n->ih_next; 456 457 evcnt_detach(&n->ih_evcnt); 458 459 free(n, M_DEVBUF); 460 } 461 462 /* 463 * Handle PCI/EISA interrupt. 464 */ 465 int 466 necpb_intr(mask, cf) 467 unsigned mask; 468 struct clockframe *cf; 469 { 470 u_int32_t vector, stat; 471 struct necpb_intrhand *p; 472 int a; 473 474 vector = in32(RD94_SYS_INTSTAT2) & 0xffff; 475 476 if (vector == 0x4000) { 477 stat = in32(RD94_SYS_PCI_INTSTAT); 478 stat &= in32(RD94_SYS_PCI_INTMASK); 479 for (a=0; a<4; a++) { 480 if (stat & (1 << a)) { 481 #if 0 482 printf("pint %d\n", a); 483 #endif 484 p = necpb_inttbl[a]; 485 while (p != NULL) { 486 (*p->ih_func)(p->ih_arg); 487 p->ih_evcnt.ev_count++; 488 p = p->ih_next; 489 } 490 } 491 } 492 } else if (vector == 0x8000) { 493 printf("eisa_nmi\n"); 494 } else { 495 printf("eint %d\n", vector & 0xff); 496 #if 0 497 eisa_intr(vector & 0xff); 498 #endif 499 } 500 501 return (~0); 502 } 503