xref: /netbsd-src/sys/arch/arc/pci/necpb.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: necpb.c,v 1.29 2007/03/04 05:59:36 christos Exp $	*/
2 
3 /*-
4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
42  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Charles M. Hannum.
55  * 4. The name of the author may not be used to endorse or promote products
56  *    derived from this software without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
63  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
67  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68  */
69 
70 #include <sys/cdefs.h>
71 __KERNEL_RCSID(0, "$NetBSD: necpb.c,v 1.29 2007/03/04 05:59:36 christos Exp $");
72 
73 #include "opt_pci.h"
74 
75 #include <sys/types.h>
76 #include <sys/param.h>
77 #include <sys/time.h>
78 #include <sys/systm.h>
79 #include <sys/errno.h>
80 #include <sys/device.h>
81 #include <sys/malloc.h>
82 #include <sys/extent.h>
83 
84 #include <uvm/uvm_extern.h>
85 
86 #define _ARC_BUS_DMA_PRIVATE
87 #include <machine/bus.h>
88 
89 #include <machine/pio.h>
90 
91 #include <machine/autoconf.h>
92 #include <machine/cpu.h>
93 #include <machine/platform.h>
94 
95 #include <mips/cache.h>
96 
97 #include <dev/pci/pcivar.h>
98 #include <dev/pci/pcireg.h>
99 #include <dev/pci/pcidevs.h>
100 #ifdef PCI_NETBSD_CONFIGURE
101 #include <dev/pci/pciconf.h>
102 #endif
103 
104 #include <arc/jazz/rd94.h>
105 #include <arc/pci/necpbvar.h>
106 
107 #include "ioconf.h"
108 
109 int	necpbmatch(struct device *, struct cfdata *, void *);
110 void	necpbattach(struct device *, struct device *, void *);
111 
112 void		necpb_attach_hook(struct device *, struct device *,
113 		    struct pcibus_attach_args *);
114 int		necpb_bus_maxdevs(pci_chipset_tag_t, int);
115 pcitag_t	necpb_make_tag(pci_chipset_tag_t, int, int, int);
116 void		necpb_decompose_tag(pci_chipset_tag_t, pcitag_t, int *,
117 		    int *, int *);
118 pcireg_t	necpb_conf_read(pci_chipset_tag_t, pcitag_t, int);
119 void		necpb_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
120 int		necpb_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
121 const char *	necpb_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
122 void *		necpb_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
123 		    int, int (*func)(void *), void *);
124 void		necpb_intr_disestablish(pci_chipset_tag_t, void *);
125 #ifdef PCI_NETBSD_CONFIGURE
126 void		necpb_conf_interrupt(pci_chipset_tag_t, int, int, int, int,
127 		    int *);
128 int		necpb_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t);
129 #endif
130 
131 uint32_t	necpb_intr(uint32_t, struct clockframe *);
132 
133 
134 CFATTACH_DECL(necpb, sizeof(struct necpb_softc),
135     necpbmatch, necpbattach, NULL, NULL);
136 
137 static struct necpb_intrhand	*necpb_inttbl[4];
138 
139 /* There can be only one. */
140 int necpbfound;
141 struct necpb_context necpb_main_context;
142 static long necpb_mem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)];
143 static long necpb_io_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)];
144 
145 int
146 necpbmatch(struct device *parent, struct cfdata *match, void *aux)
147 {
148 	struct confargs *ca = aux;
149 
150 	if (strcmp(ca->ca_name, necpb_cd.cd_name) != 0)
151 		return 0;
152 
153 	if (necpbfound)
154 		return 0;
155 
156 	return 1;
157 }
158 
159 /*
160  * Set up the chipset's function pointers.
161  */
162 void
163 necpb_init(struct necpb_context *ncp)
164 {
165 	pci_chipset_tag_t pc;
166 #ifndef PCI_NETBSD_CONFIGURE
167 	pcitag_t tag;
168 	pcireg_t id, class, csr;
169 	u_int dev;
170 #endif
171 
172 	if (ncp->nc_initialized)
173 		return;
174 
175 	arc_large_bus_space_init(&ncp->nc_memt, "necpcimem",
176 	    RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM);
177 	arc_bus_space_init_extent(&ncp->nc_memt, (void *)necpb_mem_ex_storage,
178 	    sizeof(necpb_mem_ex_storage));
179 
180 	arc_bus_space_init(&ncp->nc_iot, "necpciio",
181 	    RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO);
182 	arc_bus_space_init_extent(&ncp->nc_iot, (void *)necpb_io_ex_storage,
183 	    sizeof(necpb_io_ex_storage));
184 
185 	jazz_bus_dma_tag_init(&ncp->nc_dmat);
186 
187 	pc = &ncp->nc_pc;
188 	pc->pc_attach_hook = necpb_attach_hook;
189 	pc->pc_bus_maxdevs = necpb_bus_maxdevs;
190 	pc->pc_make_tag = necpb_make_tag;
191 	pc->pc_decompose_tag = necpb_decompose_tag;
192 	pc->pc_conf_read = necpb_conf_read;
193 	pc->pc_conf_write = necpb_conf_write;
194 	pc->pc_intr_map = necpb_intr_map;
195 	pc->pc_intr_string = necpb_intr_string;
196 	pc->pc_intr_establish = necpb_intr_establish;
197 	pc->pc_intr_disestablish = necpb_intr_disestablish;
198 #ifdef PCI_NETBSD_CONFIGURE
199 	pc->pc_conf_interrupt = necpb_conf_interrupt;
200 	pc->pc_conf_hook = necpb_conf_hook;
201 #endif
202 
203 #ifndef PCI_NETBSD_CONFIGURE
204 	/*
205 	 * XXX:
206 	 *  NEC's firmware does not configure PCI devices completely.
207 	 *  We need to disable expansion ROM and enable mem/io/busmaster
208 	 *  bits here.
209 	 */
210 	for (dev = 3; dev <= 5; dev++) {
211 		tag = necpb_make_tag(pc, 0, dev, 0);
212 		id = necpb_conf_read(pc, tag, PCI_ID_REG);
213 
214 		if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
215 			continue;
216 
217 		class = necpb_conf_read(pc, tag, PCI_CLASS_REG);
218 		csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
219 		if (PCI_CLASS(class) != PCI_CLASS_BRIDGE ||
220 		    PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_PCI) {
221 			csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
222 			necpb_conf_write(pc, tag, PCI_MAPREG_ROM, 0);
223 		}
224 		csr |= PCI_COMMAND_MASTER_ENABLE;
225 		necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
226 	}
227 #endif
228 
229 	ncp->nc_initialized = 1;
230 }
231 
232 void
233 necpbattach(struct device *parent, struct device *self, void *aux)
234 {
235 	struct necpb_softc *sc = (struct necpb_softc *)self;
236 	struct pcibus_attach_args pba;
237 	pci_chipset_tag_t pc;
238 	int i;
239 
240 	necpbfound = 1;
241 
242 	printf("\n");
243 
244 	sc->sc_ncp = &necpb_main_context;
245 	necpb_init(sc->sc_ncp);
246 
247 	pc = &sc->sc_ncp->nc_pc;
248 #ifdef PCI_NETBSD_CONFIGURE
249 	pc->pc_ioext = extent_create("necpbio", 0x00100000, 0x01ffffff,
250 	    M_DEVBUF, NULL, 0, EX_NOWAIT);
251 	pc->pc_memext = extent_create("necpbmem", 0x08000000, 0x3fffffff,
252 	    M_DEVBUF, NULL, 0, EX_NOWAIT);
253 	pci_configure_bus(pc, pc->pc_ioext, pc->pc_memext, NULL, 0,
254 	    mips_dcache_align);
255 #endif
256 
257 	out32(RD94_SYS_PCI_INTMASK, 0xf);
258 
259 	for (i = 0; i < 4; i++)
260 		necpb_inttbl[i] = NULL;
261 
262 	(*platform->set_intr)(MIPS_INT_MASK_2, necpb_intr, ARC_INTPRI_PCIISA);
263 
264 	pba.pba_iot = &sc->sc_ncp->nc_iot;
265 	pba.pba_memt = &sc->sc_ncp->nc_memt;
266 	pba.pba_dmat = &sc->sc_ncp->nc_dmat;
267 	pba.pba_dmat64 = NULL;
268 	pba.pba_pc = pc;
269 	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
270 	pba.pba_bus = 0;
271 	pba.pba_bridgetag = NULL;
272 
273 	config_found_ia(self, "pcibus", &pba, pcibusprint);
274 }
275 
276 void
277 necpb_attach_hook(struct device *parent, struct device *self,
278     struct pcibus_attach_args *pba)
279 {
280 }
281 
282 int
283 necpb_bus_maxdevs(pci_chipset_tag_t pc, int busno)
284 {
285 
286 	return 32;
287 }
288 
289 pcitag_t
290 necpb_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
291 {
292 	pcitag_t tag;
293 
294 	if (bus >= 256 || device >= 32 || function >= 8)
295 		panic("necpb_make_tag: bad request");
296 
297 	tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
298 	return tag;
299 }
300 
301 void
302 necpb_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp,
303    int *fp)
304 {
305 
306 	if (bp != NULL)
307 		*bp = (tag >> 16) & 0xff;
308 	if (dp != NULL)
309 		*dp = (tag >> 11) & 0x1f;
310 	if (fp != NULL)
311 		*fp = (tag >> 8) & 0x07;
312 }
313 
314 pcireg_t
315 necpb_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
316 {
317 	pcireg_t data;
318 	int s;
319 
320 	s = splhigh();
321 	out32(RD94_SYS_PCI_CONFADDR, tag | reg);
322 	data = in32(RD94_SYS_PCI_CONFDATA);
323 	out32(RD94_SYS_PCI_CONFADDR, 0);
324 	splx(s);
325 
326 	return data;
327 }
328 
329 void
330 necpb_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
331 {
332 	int s;
333 
334 	s = splhigh();
335 	out32(RD94_SYS_PCI_CONFADDR, tag | reg);
336 	out32(RD94_SYS_PCI_CONFDATA, data);
337 	out32(RD94_SYS_PCI_CONFADDR, 0);
338 	splx(s);
339 }
340 
341 int
342 necpb_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
343 {
344 	pci_chipset_tag_t pc = pa->pa_pc;
345 	pcitag_t intrtag = pa->pa_intrtag;
346 	int pin = pa->pa_intrpin;
347 	int swiz = pa->pa_intrswiz % 4;
348 	int bus, dev;
349 
350 	if (pin == 0) {
351 		/* No IRQ used. */
352 		*ihp = -1;
353 		return 1;
354 	}
355 
356 	if (pin > 4) {
357 		printf("necpb_intr_map: bad interrupt pin %d\n", pin);
358 		*ihp = -1;
359 		return 1;
360 	}
361 
362 	necpb_decompose_tag(pc, intrtag, &bus, &dev, NULL);
363 	if (bus != 0) {
364 		printf("necpb_intr_map: unknown bus %d\n", bus);
365 		*ihp = -1;
366 		return 1;
367 	}
368 
369 	switch (dev) {
370 	case 3:
371 		*ihp = (pin - swiz + 2) % 4;
372 		break;
373 	case 4:
374 		*ihp = (pin - swiz + 1) % 4;
375 		break;
376 	case 5:
377 		*ihp = (pin - swiz + 0) % 4;
378 		break;
379 	default:
380 		*ihp = -1;
381 		return 1;
382 	}
383 
384 	return 0;
385 }
386 
387 const char *
388 necpb_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
389 {
390 	static char str[8];
391 
392 	if (ih >= 4)
393 		panic("necpb_intr_string: bogus handle %ld", ih);
394 	sprintf(str, "int %c", 'A' + (int)ih);
395 	return str;
396 }
397 
398 void *
399 necpb_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
400     int (*func)(void *), void *arg)
401 {
402 	struct necpb_intrhand *n, *p;
403 	uint32_t mask;
404 
405 	if (ih >= 4)
406 		panic("necpb_intr_establish: bogus handle");
407 
408 	n = malloc(sizeof(struct necpb_intrhand), M_DEVBUF, M_NOWAIT);
409 	if (n == NULL)
410 		panic("necpb_intr_establish: can't malloc interrupt handle");
411 
412 	n->ih_func = func;
413 	n->ih_arg = arg;
414 	n->ih_next = NULL;
415 	n->ih_intn = ih;
416 	strlcpy(n->ih_evname, necpb_intr_string(pc, ih), sizeof(n->ih_evname));
417 	evcnt_attach_dynamic(&n->ih_evcnt, EVCNT_TYPE_INTR, NULL, "necpb",
418 	    n->ih_evname);
419 
420 	if (necpb_inttbl[ih] == NULL) {
421 		necpb_inttbl[ih] = n;
422 		mask = in32(RD94_SYS_PCI_INTMASK);
423 		mask |= 1 << ih;
424 		out32(RD94_SYS_PCI_INTMASK, mask);
425 	} else {
426 		p = necpb_inttbl[ih];
427 		while (p->ih_next != NULL)
428 			p = p->ih_next;
429 		p->ih_next = n;
430 	}
431 
432 	return n;
433 }
434 
435 void
436 necpb_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
437 {
438 	struct necpb_intrhand *n, *p, *q;
439 	uint32_t mask;
440 
441 	n = cookie;
442 
443 	q = NULL;
444 	p = necpb_inttbl[n->ih_intn];
445 	while (p != n) {
446 		if (p == NULL)
447 			panic("necpb_intr_disestablish: broken intr table");
448 		q = p;
449 		p = p->ih_next;
450 	}
451 
452 	if (q == NULL) {
453 		necpb_inttbl[n->ih_intn] = n->ih_next;
454 		if (n->ih_next == NULL) {
455 			mask = in32(RD94_SYS_PCI_INTMASK);
456 			mask &= ~(1 << n->ih_intn);
457 			out32(RD94_SYS_PCI_INTMASK, mask);
458 		}
459 	} else
460 		q->ih_next = n->ih_next;
461 
462 	evcnt_detach(&n->ih_evcnt);
463 
464 	free(n, M_DEVBUF);
465 }
466 
467 /*
468  *   Handle PCI/EISA interrupt.
469  */
470 uint32_t
471 necpb_intr(uint32_t mask, struct clockframe *cf)
472 {
473 	uint32_t vector, stat;
474 	struct necpb_intrhand *p;
475 	int i, handled;
476 
477 	handled = 0;
478 	vector = in32(RD94_SYS_INTSTAT2) & 0xffff;
479 
480 	if (vector == 0x4000) {
481 		stat = in32(RD94_SYS_PCI_INTSTAT);
482 		stat &= in32(RD94_SYS_PCI_INTMASK);
483 		for (i = 0; i < 4; i++) {
484 			if (stat & (1 << i)) {
485 #if 0
486 				printf("pint %d\n", i);
487 #endif
488 				p = necpb_inttbl[i];
489 				while (p != NULL) {
490 					if ((*p->ih_func)(p->ih_arg)) {
491 						p->ih_evcnt.ev_count++;
492 						handled |= 1;
493 					}
494 					p = p->ih_next;
495 				}
496 			}
497 		}
498 	} else if (vector == 0x8000) {
499 		printf("eisa_nmi\n");
500 	} else {
501 		printf("eint %d\n", vector & 0xff);
502 #if 0
503 		if (eisa_intr(vector & 0xff)) {
504 			handled |= 1;
505 		}
506 #endif
507 	}
508 
509 	return handled ? ~MIPS_INT_MASK_2 : ~0;
510 }
511 
512 #ifdef PCI_NETBSD_CONFIGURE
513 void
514 necpb_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int func,
515     int swiz, int *iline)
516 {
517 
518 	return;
519 }
520 
521 int
522 necpb_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func,
523     pcireg_t id)
524 {
525 
526 	/* ignore bogus IDs */
527 	if (id == 0)
528 		return 0;
529 
530 	/* don't configure bridges */
531 	if (bus == 0 && (dev == 1 || dev == 2))
532 		return 0;
533 
534 	return PCI_CONF_DEFAULT;
535 }
536 #endif
537