1 /* $NetBSD: isa_machdep.h,v 1.8 2003/06/14 19:11:40 tsutsui Exp $ */ 2 /* $OpenBSD: isa_machdep.h,v 1.5 1997/04/19 17:20:00 pefo Exp $ */ 3 4 /* 5 * Copyright (c) 1996 Per Fogelstrom 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Per Fogelstrom 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 #ifndef _ISA_MACHDEP_H_ 34 #define _ISA_MACHDEP_H_ 35 36 #include <dev/isa/isadmavar.h> 37 38 typedef struct arc_isa_bus *isa_chipset_tag_t; 39 40 /* 41 * I/O macros to access isa bus ports/memory. 42 * At the first glance theese macros may seem inefficient. 43 * However, the cpu executes an instruction every 7.5ns 44 * so the bus is much slower so it doesn't matter, really. 45 */ 46 #define isa_outb(x,y) outb(arc_bus_io.bs_vbase + (x)- arc_bus_io.bs_start, y) 47 #define isa_inb(x) inb(arc_bus_io.bs_vbase + (x) - arc_bus_io.bs_start) 48 49 struct arc_isa_bus { 50 void *ic_data; 51 52 struct isa_dma_state ic_dmastate; 53 54 void (*ic_attach_hook)(struct device *, struct device *, 55 struct isabus_attach_args *); 56 const struct evcnt *(*ic_intr_evcnt)(isa_chipset_tag_t, int); 57 void *(*ic_intr_establish)(isa_chipset_tag_t, int, int, int, 58 int (*)(void *), void *); 59 void (*ic_intr_disestablish)(isa_chipset_tag_t, void *); 60 }; 61 62 63 /* 64 * Functions provided to machine-independent ISA code. 65 */ 66 #define isa_attach_hook(p, s, a) /* \ 67 (*(a)->iba_ic->ic_attach_hook)((p), (s), (a)) */ 68 #define isa_intr_evcnt(c, i) \ 69 (*(c)->ic_intr_evcnt)((c)->ic_data, (i)) 70 #define isa_intr_establish(c, i, t, l, f, a) \ 71 (*(c)->ic_intr_establish)((c)->ic_data, (i), (t), (l), (f), (a)) 72 #define isa_intr_disestablish(c, h) \ 73 (*(c)->ic_intr_disestablish)((c)->ic_data, (h)) 74 75 #define isa_dmainit(ic, bst, dmat, d) \ 76 _isa_dmainit(&(ic)->ic_dmastate, (bst), (dmat), (d)) 77 #define isa_dmacascade(ic, c) \ 78 _isa_dmacascade(&(ic)->ic_dmastate, (c)) 79 #define isa_dmamaxsize(ic, c) \ 80 _isa_dmamaxsize(&(ic)->ic_dmastate, (c)) 81 #define isa_dmamap_create(ic, c, s, f) \ 82 _isa_dmamap_create(&(ic)->ic_dmastate, (c), (s), (f)) 83 #define isa_dmamap_destroy(ic, c) \ 84 _isa_dmamap_destroy(&(ic)->ic_dmastate, (c)) 85 #define isa_dmastart(ic, c, a, n, p, f, bf) \ 86 _isa_dmastart(&(ic)->ic_dmastate, (c), (a), (n), (p), (f), (bf)) 87 #define isa_dmaabort(ic, c) \ 88 _isa_dmaabort(&(ic)->ic_dmastate, (c)) 89 #define isa_dmacount(ic, c) \ 90 _isa_dmacount(&(ic)->ic_dmastate, (c)) 91 #define isa_dmafinished(ic, c) \ 92 _isa_dmafinished(&(ic)->ic_dmastate, (c)) 93 #define isa_dmadone(ic, c) \ 94 _isa_dmadone(&(ic)->ic_dmastate, (c)) 95 #define isa_dmafreeze(ic) \ 96 _isa_dmafreeze(&(ic)->ic_dmastate) 97 #define isa_dmathaw(ic) \ 98 _isa_dmathaw(&(ic)->ic_dmastate) 99 #define isa_dmamem_alloc(ic, c, s, ap, f) \ 100 _isa_dmamem_alloc(&(ic)->ic_dmastate, (c), (s), (ap), (f)) 101 #define isa_dmamem_free(ic, c, a, s) \ 102 _isa_dmamem_free(&(ic)->ic_dmastate, (c), (a), (s)) 103 #define isa_dmamem_map(ic, c, a, s, kp, f) \ 104 _isa_dmamem_map(&(ic)->ic_dmastate, (c), (a), (s), (kp), (f)) 105 #define isa_dmamem_unmap(ic, c, k, s) \ 106 _isa_dmamem_unmap(&(ic)->ic_dmastate, (c), (k), (s)) 107 #define isa_dmamem_mmap(ic, c, a, s, o, p, f) \ 108 _isa_dmamem_mmap(&(ic)->ic_dmastate, (c), (a), (s), (o), (p), (f)) 109 #define isa_drq_alloc(ic, c) \ 110 _isa_drq_alloc(&(ic)->ic_dmastate, c) 111 #define isa_drq_free(ic, c) \ 112 _isa_drq_free(&(ic)->ic_dmastate, c) 113 #define isa_drq_isfree(ic, c) \ 114 _isa_drq_isfree(&(ic)->ic_dmastate, (c)) 115 #define isa_malloc(ic, c, s, p, f) \ 116 _isa_malloc(&(ic)->ic_dmastate, (c), (s), (p), (f)) 117 #define isa_free(a, p) \ 118 _isa_free((a), (p)) 119 #define isa_mappage(m, o, p) \ 120 _isa_mappage((m), (o), (p)) 121 122 int isa_intr_alloc(isa_chipset_tag_t, int, int, int *); 123 124 void sysbeepstop(void *); 125 void sysbeep(int, int); 126 127 128 /* 129 * Interrupt control struct used to control the ICU setup. 130 */ 131 132 struct intrhand { 133 struct intrhand *ih_next; 134 int (*ih_fun)(void *); 135 void *ih_arg; 136 u_long ih_count; 137 int ih_level; 138 int ih_irq; 139 char *ih_what; 140 }; 141 142 #endif /* _ISA_MACHDEP_H_ */ 143