xref: /netbsd-src/sys/arch/arc/include/intr.h (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: intr.h,v 1.11 2003/05/25 14:00:15 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the NetBSD
21  *	Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef _ARC_INTR_H_
40 #define _ARC_INTR_H_
41 
42 #define IPL_NONE	0	/* disable only this interrupt */
43 
44 #define IPL_SOFT	1	/* generic software interrupts (SI 0) */
45 #define IPL_SOFTCLOCK	2	/* clock software interrupts (SI 0) */
46 #define IPL_SOFTNET	3	/* network software interrupts (SI 1) */
47 #define IPL_SOFTSERIAL	4	/* serial software interrupts (SI 1) */
48 
49 #define IPL_BIO		5	/* disable block I/O interrupts */
50 #define IPL_NET		6	/* disable network interrupts */
51 #define IPL_TTY		7	/* disable terminal interrupts */
52 #define IPL_SERIAL	7	/* disable serial hardware interrupts */
53 #define IPL_CLOCK	8	/* disable clock interrupts */
54 #define IPL_STATCLOCK	8	/* disable profiling interrupts */
55 #define IPL_HIGH	8	/* disable all interrupts */
56 
57 #define _IPL_NSOFT	4
58 #define _IPL_N		9
59 
60 #define _IPL_SI0_FIRST	IPL_SOFT
61 #define _IPL_SI0_LAST	IPL_SOFTCLOCK
62 
63 #define _IPL_SI1_FIRST	IPL_SOFTNET
64 #define _IPL_SI1_LAST	IPL_SOFTSERIAL
65 
66 #define IPL_SOFTNAMES {							\
67 	"misc",								\
68 	"clock",							\
69 	"net",								\
70 	"serial",							\
71 }
72 
73 /* Interrupt sharing types. */
74 #define IST_NONE	0	/* none */
75 #define IST_PULSE	1	/* pulsed */
76 #define IST_EDGE	2	/* edge-triggered */
77 #define IST_LEVEL	3	/* level-triggered */
78 
79 #ifdef _KERNEL
80 #ifndef _LOCORE
81 
82 extern const u_int32_t *ipl_sr_bits;
83 
84 extern int _splraise(int);
85 extern int _spllower(int);
86 extern int _splset(int);
87 extern int _splget(void);
88 extern void _splnone(void);
89 extern void _setsoftintr(int);
90 extern void _clrsoftintr(int);
91 
92 #define splhigh()	_splraise(ipl_sr_bits[IPL_HIGH])
93 #define spl0()		(void)_spllower(0)
94 #define splx(s)		(void)_splset(s)
95 #define splbio()	_splraise(ipl_sr_bits[IPL_BIO])
96 #define splnet()	_splraise(ipl_sr_bits[IPL_NET])
97 #define spltty()	_splraise(ipl_sr_bits[IPL_TTY])
98 #define splserial()	_splraise(ipl_sr_bits[IPL_SERIAL])
99 #define splvm()		spltty()
100 #define splclock()	_splraise(ipl_sr_bits[IPL_CLOCK])
101 #define splstatclock()	splclock()
102 
103 #define splsched()	splclock()
104 #define spllock()	splhigh()
105 #define spllpt()	spltty()		/* lpt driver */
106 
107 #define splsoft()	_splraise(ipl_sr_bits[IPL_SOFT])
108 #define splsoftclock()	_splraise(ipl_sr_bits[IPL_SOFTCLOCK])
109 #define splsoftnet()	_splraise(ipl_sr_bits[IPL_SOFTNET])
110 #define splsoftserial()	_splraise(ipl_sr_bits[IPL_SOFTSERIAL])
111 
112 #define spllowersoftclock() _spllower(ipl_sr_bits[IPL_SOFTCLOCK])
113 
114 #include <mips/softintr.h>
115 
116 struct clockframe;
117 void arc_set_intr(int, int(*)(u_int, struct clockframe *), int);
118 
119 #endif /* !_LOCORE */
120 #endif /* _KERNEL */
121 
122 #endif /* _ARC_INTR_H_ */
123