1$NetBSD: TODO,v 1.19 2003/05/25 15:46:15 tsutsui Exp $ 2 3To do list (in some particular order) 4XXX some entries might be obsolete. 5 6 o Boot. Standalone boot program to load ELF kernels instead of 7 booting ECOFF kernels directly. 8 (maybe sgimips/stand would help, but annoying buggy ARC BIOS) 9 10 o sysinst 11 maybe MD fdisk partitioning support is required to load files 12 from FAT partition on ARC BIOS prompt. 13 14 o install notes 15 16 17 o use MI driver 18 19 - make fd driver MI, and share it with other ports 20 (contact christos about MI fd driver) 21 22 - use MI bha driver instead of home grown btl 23 XXX needs fixes of DESKstation support 24 25 o VXL framebuffer support (Magnum, RISCstation 2200) 26 27 o com_jazzio.c 28 - clock handling clean up (obtain from ARC BIOS) 29 - fifo disabling may be only needed on some Magnum? 30 31 o remove pccons and switch to wscons completely 32 (XXX what's the problem to remove pccons?) 33 34 o AD1848 audio support 35 36 o missing MI devices 37 ses?, vcoda, ... 38 39 40 o Xserver 41 42 - VXL Magnum, RISCstation 2200 43 - vga/S3 PICA, Image RISCstation - OpenBSD's? 44 - vga/cirrus RISCserver 2200, Express5800/240 R4400 EISA 45 - vga/??? DESKstation Tyne, rPC44 46 - TGA RISCstation 2250, Express5800/230 R4400 PCI 47 48 o Find out why bitmap load to S3-928 flashes screen. (X server) 49 Know why (enable linear mode). Need S3 info. 50 51 52 o repair DESKstation support 53 - requires bounce buffer bus_dma for Tyne 54 XXX - too small bounce buffer size (128KB) 55 56 o Olivetti M700 support 57 58 o NEC Express5800/230 R10000 PCI (NEC-J95) support 59 (needs MI R10000 support) 60 61 o SNI RM200PCI/RM300/RM400/RM600 support 62 63 64 o parse ARC BIOS configuration information and use it 65 66 o increase MAXPHYS to 64KB 67 (XXX why is it limited to 32KB?) 68 69 o fix kernel start address 70 (maybe requires bootloader support) 71 72 o allocate PICA_TL_BASE dynamically 73 74 o remove inb/outb 75 76 o remove UADDR 77 78 o fix mem_clusters[] usage. 79 80 o intrcnt[] name cleanup, use MI evcnt(9) 81 82 o test and merge soren's clean up about proc0.p_addr. 83 84 o redesign interrupt handler framework. 85 i/o bus devices should have sane IPL, but currently doesn't. 86 87 also, current MIPS interrupt handler has overblocking and 88 other problems as follows: 89 90 - SR_INT_IE should be enabled before calling hardclock(). 91 Since this is not done currently, spllowersoftclock() 92 on hardclock() doesn't have effect, and softclock() is 93 handled with all interrupt disabled in this case. 94 -> overblocking, possibly causes missing hardclock() 95 96 - MIPS3_CLKF_BASEPRI() doesn't work correctly, 97 when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled. 98 -> micro optimization on hardclock() doesn't work. 99 but currently this may make hardclock() latency better 100 due to above SR_INT_IE problem. 101 s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky. 102 103 - if (ipending & INT_MASK_REAL_DEV) == 0, 104 softnet() and softclock() are handled with all interrupt disabled. 105 -> overblocking, possibly causes missing hardclock() 106 107 - `netisr' handling in netintr() implies potential race condition. 108 The access to `netisr' should be protected by splnet(). 109 Currently this is not real problem due to above overblocking. 110 111 - INT_MASK_REAL_DEV should be removed 112 113 - make CLKF_INTR() work. 114 115 o it is better to always disable MIPS_INT_MASK_CLOCK. 116 those are the points which should be fixed: 117 mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 118 machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE; 119 spl0() 120 splnone() 121 122 - MIPS_INT_MASK_CLOCK should be removed in someway 123 124 o XXX at least 2000/06/07 version is already quite unstable 125 on PICA and NEC Image RISCstation. (but almost OK on Magnum) 126 Userland commands dumps core randomly. 127 This version is before _MIPS_PADDR_T_64BIT changes 128 and MIPS3_TLB_WIRED_UPAGES changes. 129 130 "vm_page_zero_enable = FALSE" makes this problem disappeared. 131 (vm_page_zero_enable = FALSE by default on all archs w/ UBC, now) 132 133 currently, page zero in the idle loop is also disabled on 134 untested platforms like DESKstation rPC44/Tyne and SNI for safety. 135 136 XXX what's the current status of uvm_pageidlezero()? 137 138 139 o resolve "XXX" 140 141 142(following entries might be MI MIPS items) 143 144 o Move the RO and WIRED attribute from the pte to the pv table. 145 This saves four instructions in the tlb miss handler. 146 147 o Can we have 32 double registers? 148 149 o 64bit kernel/userland 150 151 o fix implementation of DELAY(), clean up clock implementation 152 153 o omit __SWAP_BROKEN in <mips/types.h> 154 155 o clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland. 156 157Lots of other things..... 158