xref: /netbsd-src/sys/arch/amiga/include/bus.h (revision 5e4c038a45edbc7d63b7c2daa76e29f88b64a4e3)
1 /*	$NetBSD: bus.h,v 1.17 2002/04/25 09:20:32 aymeric Exp $	*/
2 
3 /*
4  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *      This product includes software developed by Leo Weppelman for the
17  *	NetBSD Project.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 #ifndef _AMIGA_BUS_H_
34 #define _AMIGA_BUS_H_
35 
36 #include <sys/types.h>
37 
38 /* for public use: */
39 
40 /*
41  * Memory addresses (in bus space)
42  */
43 
44 typedef u_int32_t bus_addr_t;
45 typedef u_int32_t bus_size_t;
46 
47 /*
48  * Access methods for bus resources and address space.
49  */
50 typedef struct bus_space_tag *bus_space_tag_t;
51 typedef u_long	bus_space_handle_t;
52 
53 /* unpublic, but needed by method implementors */
54 
55 /*
56  * Lazyness macros for function declarations.
57  */
58 
59 #define bsr(what, typ) \
60 	typ (what)(bus_space_handle_t, bus_addr_t)
61 
62 #define bsw(what, typ) \
63 	void (what)(bus_space_handle_t, bus_addr_t, unsigned)
64 
65 #define bsrm(what, typ) \
66 	void (what)(bus_space_handle_t, bus_size_t, typ *, bus_size_t)
67 
68 #define bswm(what, typ) \
69 	void (what)(bus_space_handle_t, bus_size_t, const typ *, bus_size_t)
70 
71 #define bssr(what, typ) \
72 	void (what)(bus_space_handle_t, bus_size_t, unsigned, bus_size_t)
73 
74 #define bscr(what, typ) \
75 	void (what)(bus_space_handle_t, bus_size_t, \
76 		    bus_space_handle_t, bus_size_t, bus_size_t)
77 
78 /*
79  * Implementation specific structures.
80  * XXX Don't use outside of bus_space definitions!
81  * XXX maybe this should be encapsuled in a non-global .h file?
82  */
83 
84 struct bus_space_tag {
85 	bus_addr_t	base;
86 	const struct amiga_bus_space_methods *absm;
87 };
88 
89 struct amiga_bus_space_methods {
90 
91 	/* map, unmap, etc */
92 
93 	int (*bsm)(bus_space_tag_t,
94 		bus_addr_t, bus_size_t, int, bus_space_handle_t *);
95 
96 	int (*bsms)(bus_space_handle_t,
97 		bus_size_t, bus_size_t, bus_space_handle_t *);
98 
99 	void (*bsu)(bus_space_handle_t, bus_size_t);
100 
101 	/* placeholders for currently not implemented alloc and free */
102 
103 	void *bsa;
104 	void *bsf;
105 
106 	/* 8 bit methods */
107 
108 	bsr(*bsr1, u_int8_t);
109 	bsw(*bsw1, u_int8_t);
110 	bsrm(*bsrm1, u_int8_t);
111 	bswm(*bswm1, u_int8_t);
112 	bsrm(*bsrr1, u_int8_t);
113 	bswm(*bswr1, u_int8_t);
114 	bssr(*bssr1, u_int8_t);
115 	bscr(*bscr1, u_int8_t);
116 
117 	/* 16bit methods */
118 
119 	bsr(*bsr2, u_int16_t);
120 	bsw(*bsw2, u_int16_t);
121 	bsr(*bsrs2, u_int16_t);
122 	bsw(*bsws2, u_int16_t);
123 	bsrm(*bsrm2, u_int16_t);
124 	bswm(*bswm2, u_int16_t);
125 	bsrm(*bsrms2, u_int16_t);
126 	bswm(*bswms2, u_int16_t);
127 	bsrm(*bsrr2, u_int16_t);
128 	bswm(*bswr2, u_int16_t);
129 	bsrm(*bsrrs2, u_int16_t);
130 	bswm(*bswrs2, u_int16_t);
131 	bssr(*bssr2, u_int16_t);
132 	bscr(*bscr2, u_int16_t);
133 
134 	/* add 32bit methods here */
135 };
136 
137 /*
138  * Macro definition of map, unmap, etc.
139  */
140 
141 #define bus_space_map(t, o, s, f, hp) \
142 	((t)->absm->bsm)((t), (o), (s), (f), (hp))
143 
144 #define bus_space_subregion(t, h, o, s, hp) \
145 	((t)->absm->bsms)((h), (o), (s), (hp))
146 
147 #define bus_space_unmap(t, h, s) \
148 	((t)->absm->bsu)((h), (s))
149 
150 /*
151  * Macro definition of _2 functions as indirect method array calls
152  */
153 
154 /* 0: Helper macros */
155 
156 #define dbsdr(n, t, h, o)	((t)->absm->n)((h), (o))
157 #define dbsdw(n, t, h, o, v)	((t)->absm->n)((h), (o), (v))
158 #define dbsm(n, t, h, o, p, c)	((t)->absm->n)((h), (o), (p), (c))
159 #define dbss(n, t, h, o, v, c)	((t)->absm->n)((h), (o), (v), (c))
160 #define dbsc(n, t, h, o, v, c)	((t)->absm->n)((h), (o), (v), (c))
161 
162 /* 1: byte-wide "functions" */
163 
164 #define bus_space_read_1(t, h, o)		  dbsdr(bsr1, t, h, o)
165 #define bus_space_write_1(t, h, o, v)		  dbsdw(bsw1, t, h, o, v)
166 
167 #define bus_space_read_multi_1(t, h, o, p, c)	  dbsm(bsrm1, t, h, o, p, c)
168 #define bus_space_write_multi_1(t, h, o, p, c)	  dbsm(bswm1, t, h, o, p, c)
169 
170 #define bus_space_read_region_1(t, h, o, p, c)	  dbsm(bsrr1, t, h, o, p, c)
171 #define bus_space_write_region_1(t, h, o, p, c)	  dbsm(bswr1, t, h, o, p, c)
172 
173 #define bus_space_set_region_1(t, h, o, v, c)	  dbss(bssr1, t, h, o, v, c)
174 #define bus_space_copy_region_1(t, h, o, g, q, c) dbss(bscr1, t, h, o, g, q, c)
175 
176 
177 /* 2: word-wide "functions" */
178 
179 #define bus_space_read_2(t, h, o)		  dbsdr(bsr2, t, h, o)
180 #define bus_space_write_2(t, h, o, v)		  dbsdw(bsw2, t, h, o, v)
181 #define bus_space_read_stream_2(t, h, o)	  dbsdr(bsrs2, t, h, o)
182 #define bus_space_write_stream_2(t, h, o, v)	  dbsdw(bsws2, t, h, o, v)
183 
184 #define bus_space_read_multi_2(t, h, o, p, c)	  dbsm(bsrm2, t, h, o, p, c)
185 #define bus_space_write_multi_2(t, h, o, p, c)	  dbsm(bswm2, t, h, o, p, c)
186 
187 #define bus_space_read_multi_stream_2(t, h, o, p, c) \
188 						  dbsm(bsrms2, t, h, o, p, c)
189 
190 #define bus_space_write_multi_stream_2(t, h, o, p, c) \
191 						  dbsm(bswms2, t, h, o, p, c)
192 
193 #define bus_space_read_region_2(t, h, o, p, c)	  dbsm(bsrr2, t, h, o, p, c)
194 #define bus_space_write_region_2(t, h, o, p, c)	  dbsm(bswr2, t, h, o, p, c)
195 
196 #define bus_space_read_region_stream_2(t, h, o, p, c) \
197 						  dbsm(bsrrs2, t, h, o, p, c)
198 
199 #define bus_space_write_region_stream_2(t, h, o, p, c) \
200 						  dbsm(bswrs2, t, h, o, p, c)
201 
202 #define bus_space_set_region_2(t, h, o, v, c)	  dbss(bssr2, t, h, o, v, c)
203 #define bus_space_copy_region_2(t, h, o, g, q, c) dbss(bscr2, t, h, o, g, q, c)
204 
205 /* 4: Fake 32-bit macros */
206 
207 #define bus_space_read_4(t, h, o) \
208 	(panic("bus_space_read_4 not implemented"), 0)
209 
210 #define bus_space_write_4(t, h, o, v) \
211 	panic("bus_space_write_4 not implemented")
212 
213 #define bus_space_read_multi_4(t, h, o, p, c) \
214 	panic("bus_space_read_multi_4 not implemented")
215 
216 #define bus_space_write_multi_4(t, h, o, p, c) \
217 	panic("bus_space_write_multi_4 not implemented")
218 
219 #define bus_space_read_multi_stream_4(t, h, o, p, c) \
220 	panic("bus_space_read_multi_stream_4 not implemented")
221 
222 #define bus_space_write_multi_stream_4(t, h, o, p, c) \
223 	panic("bus_space_write_multi_stream_4 not implemented")
224 
225 /*
226  * Bus read/write barrier methods.
227  *
228  *      void bus_space_barrier __P((bus_space_tag_t tag,
229  *          bus_space_handle_t bsh, bus_size_t offset,
230  *          bus_size_t len, int flags));
231  *
232  * Note: the 680x0 does not currently require barriers, but we must
233  * provide the flags to MI code.
234  */
235 #define bus_space_barrier(t, h, o, l, f)        \
236         ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
237 #define BUS_SPACE_BARRIER_READ  0x01            /* force read barrier */
238 #define BUS_SPACE_BARRIER_WRITE 0x02            /* force write barrier */
239 
240 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
241 
242 #define __BUS_SPACE_HAS_STREAM_METHODS
243 
244 extern const struct amiga_bus_space_methods amiga_bus_stride_1;
245 extern const struct amiga_bus_space_methods amiga_bus_stride_2;
246 extern const struct amiga_bus_space_methods amiga_bus_stride_4;
247 extern const struct amiga_bus_space_methods amiga_bus_stride_4swap;
248 extern const struct amiga_bus_space_methods amiga_bus_stride_16;
249 
250 #endif /* _AMIGA_BUS_H_ */
251