xref: /netbsd-src/sys/arch/amiga/dev/wdc_buddha.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: wdc_buddha.c,v 1.10 2017/10/20 07:06:06 jdolecek Exp $	*/
2 
3 /*-
4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Michael L. Hitch and Ignatios Souvatzis.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
36 #include <sys/device.h>
37 #include <sys/bus.h>
38 
39 #include <machine/cpu.h>
40 #include <machine/intr.h>
41 #include <machine/bswap.h>
42 
43 #include <amiga/amiga/cia.h>
44 #include <amiga/amiga/custom.h>
45 #include <amiga/amiga/device.h>
46 #include <amiga/dev/zbusvar.h>
47 
48 #include <dev/ata/atavar.h>
49 #include <dev/ic/wdcvar.h>
50 
51 #define BUDDHA_MAX_CHANNELS 3
52 
53 struct wdc_buddha_softc {
54 	struct wdc_softc sc_wdcdev;
55 	struct ata_channel *wdc_chanarray[BUDDHA_MAX_CHANNELS];
56 	struct ata_channel channels[BUDDHA_MAX_CHANNELS];
57 	struct bus_space_tag sc_iot;
58 	struct isr sc_isr;
59 	volatile char *ba;
60 };
61 
62 int	wdc_buddha_probe(device_t, cfdata_t, void *);
63 void	wdc_buddha_attach(device_t, device_t, void *);
64 int	wdc_buddha_intr(void *);
65 
66 CFATTACH_DECL_NEW(wdc_buddha, sizeof(struct wdc_buddha_softc),
67     wdc_buddha_probe, wdc_buddha_attach, NULL, NULL);
68 
69 int
70 wdc_buddha_probe(device_t parent, cfdata_t cfp, void *aux)
71 {
72 	struct zbus_args *zap;
73 
74 	zap = aux;
75 
76 	if (zap->manid != 4626)
77 		return 0;
78 
79 	if ((zap->prodid != 0) &&	/* Buddha */
80 	    (zap->prodid != 42))	/* Catweasel */
81 		return 0;
82 
83 	return 1;
84 }
85 
86 void
87 wdc_buddha_attach(device_t parent, device_t self, void *aux)
88 {
89 	struct wdc_buddha_softc *sc;
90 	struct zbus_args *zap;
91 	int nchannels;
92 	int ch;
93 
94 	sc = device_private(self);
95 	sc->sc_wdcdev.sc_atac.atac_dev = self;
96 	zap = aux;
97 
98 	sc->ba = zap->va;
99 
100 	sc->sc_iot.base = (bus_addr_t)sc->ba;
101 	sc->sc_iot.absm = &amiga_bus_stride_4swap;
102 
103 	nchannels = 2;
104 	if (zap->prodid == 42) {
105 		aprint_normal(": Catweasel Z2\n");
106 		nchannels = 3;
107 	} else if (zap->serno == 0)
108 		aprint_normal(": Buddha\n");
109 	else
110 		aprint_normal(": Buddha Flash\n");
111 
112 	/* XXX pio mode setting not implemented yet. */
113 	sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16;
114 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
115 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
116 	sc->sc_wdcdev.sc_atac.atac_nchannels = nchannels;
117 	sc->sc_wdcdev.wdc_maxdrives = 2;
118 
119 	wdc_allocate_regs(&sc->sc_wdcdev);
120 
121 	for (ch = 0; ch < nchannels; ch++) {
122 		struct ata_channel *cp;
123 		struct wdc_regs *wdr;
124 		int i;
125 
126 		cp = &sc->channels[ch];
127 		sc->wdc_chanarray[ch] = cp;
128 
129 		cp->ch_channel = ch;
130 		cp->ch_atac = &sc->sc_wdcdev.sc_atac;
131 
132 		/*
133 		 * XXX According to the Buddha docs, we should use a method
134 		 * array that adds 0x40 to the address for byte accesses, to
135 		 * get the slow timing for command accesses, and the 0x00
136 		 * offset for the word (fast) accesses. This will be
137 		 * reconsidered when implementing setting the timing.
138 		 *
139 		 * XXX We also could consider to abuse the 32bit capability, or
140 		 * 32bit accesses to the words (which will read in two words)
141 		 * for better performance.
142 		 *		-is
143 		 */
144 		wdr = CHAN_TO_WDC_REGS(cp);
145 
146 		wdr->cmd_iot = &sc->sc_iot;
147 		if (bus_space_map(wdr->cmd_iot, 0x210+ch*0x80, 8, 0,
148 		    &wdr->cmd_baseioh)) {
149 			aprint_error_dev(self, "couldn't map cmd registers\n");
150 			return;
151 		}
152 
153 		wdr->ctl_iot = &sc->sc_iot;
154 		if (bus_space_map(wdr->ctl_iot, 0x250+ch*0x80, 2, 0,
155 		    &wdr->ctl_ioh)) {
156 			bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 8);
157 			aprint_error_dev(self, "couldn't map ctl registers\n");
158 			return;
159 		}
160 
161 		for (i = 0; i < WDC_NREG; i++) {
162 			if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
163 			    i, i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
164 				aprint_error_dev(self,
165 				    "couldn't subregion cmd regs\n");
166 				return;
167 			}
168 		}
169 
170 		wdc_init_shadow_regs(wdr);
171 		wdcattach(cp);
172 	}
173 
174 	sc->sc_isr.isr_intr = wdc_buddha_intr;
175 	sc->sc_isr.isr_arg = sc;
176 	sc->sc_isr.isr_ipl = 2;
177 	add_isr (&sc->sc_isr);
178 	sc->ba[0xfc0] = 0;	/* enable interrupts */
179 }
180 
181 int
182 wdc_buddha_intr(void *arg)
183 {
184 	struct wdc_buddha_softc *sc = (struct wdc_buddha_softc *)arg;
185 	int nchannels, i, ret;
186 	volatile char *p;
187 
188 	ret = 0;
189 	nchannels = sc->sc_wdcdev.sc_atac.atac_nchannels;
190 	p = sc->ba;
191 
192 	for (i=0; i<nchannels; i++) {
193 		if (p[0xf00 + 0x40*i] & 0x80) {
194 			wdcintr(&sc->channels[i]);
195 			ret = 1;
196 		}
197 	}
198 
199 	return ret;
200 }
201