xref: /netbsd-src/sys/arch/amiga/dev/siop.c (revision ae1bfcddc410612bc8c58b807e1830becb69a24c)
1 /*
2  * Copyright (c) 1994 Michael L. Hitch
3  * Copyright (c) 1990 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * Van Jacobson of Lawrence Berkeley Laboratory.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by the University of
20  *	California, Berkeley and its contributors.
21  * 4. Neither the name of the University nor the names of its contributors
22  *    may be used to endorse or promote products derived from this software
23  *    without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  *	@(#)siop.c	7.5 (Berkeley) 5/4/91
38  *	$Id: siop.c,v 1.10 1994/05/22 07:22:33 chopps Exp $
39  */
40 
41 /*
42  * AMIGA 53C710 scsi adaptor driver
43  */
44 
45 /* need to know if any tapes have been configured */
46 #include "st.h"
47 
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/device.h>
51 #include <sys/buf.h>
52 #include <scsi/scsi_all.h>
53 #include <scsi/scsiconf.h>
54 #include <machine/cpu.h>
55 #include <amiga/amiga/custom.h>
56 #include <amiga/dev/siopreg.h>
57 #include <amiga/dev/siopvar.h>
58 
59 extern u_int	kvtop();
60 
61 /*
62  * SCSI delays
63  * In u-seconds, primarily for state changes on the SPC.
64  */
65 #define	SCSI_CMD_WAIT	50000	/* wait per step of 'immediate' cmds */
66 #define	SCSI_DATA_WAIT	50000	/* wait per data in/out step */
67 #define	SCSI_INIT_WAIT	50000	/* wait per step (both) during init */
68 
69 int  siopicmd __P((struct siop_softc *, int, void *, int, void *, int));
70 int  siopgo __P((struct siop_softc *, struct scsi_xfer *));
71 int  siopgetsense __P((struct siop_softc *, struct scsi_xfer *));
72 void siopabort __P((struct siop_softc *, siop_regmap_p, char *));
73 void sioperror __P((struct siop_softc *, siop_regmap_p, u_char));
74 void siopstart __P((struct siop_softc *));
75 void siopreset __P((struct siop_softc *));
76 void siopsetdelay __P((int));
77 void siop_scsidone __P((struct siop_softc *, int));
78 void siop_donextcmd __P((struct siop_softc *));
79 int  siopintr __P((struct siop_softc *));
80 
81 /* 53C710 script */
82 unsigned long scripts[] = {
83 	0x47000000, 0x00000298,	/* 000 -   0 */
84 	0x838b0000, 0x000000d0,	/* 008 -   8 */
85 	0x7a1b1000, 0x00000000,	/* 010 -  16 */
86 	0x828a0000, 0x00000088,	/* 018 -  24 */
87 	0x9e020000, 0x0000ff01,	/* 020 -  32 */
88 	0x72350000, 0x00000000,	/* 028 -  40 */
89 	0x808c0000, 0x00000048,	/* 030 -  48 */
90 	0x58000008, 0x00000000,	/* 038 -  56 */
91 	0x1e000024, 0x00000024,	/* 040 -  64 */
92 	0x838b0000, 0x00000090,	/* 048 -  72 */
93 	0x1f00002c, 0x0000002c,	/* 050 -  80 */
94 	0x838b0000, 0x00000080,	/* 058 -  88 */
95 	0x868a0000, 0xffffffd0,	/* 060 -  96 */
96 	0x838a0000, 0x00000070,	/* 068 - 104 */
97 	0x878a0000, 0x00000120,	/* 070 - 112 */
98 	0x80880000, 0x00000028,	/* 078 - 120 */
99 	0x1e000004, 0x00000004,	/* 080 - 128 */
100 	0x838b0000, 0x00000050,	/* 088 - 136 */
101 	0x868a0000, 0xffffffe8,	/* 090 - 144 */
102 	0x838a0000, 0x00000040,	/* 098 - 152 */
103 	0x878a0000, 0x000000f0,	/* 0a0 - 160 */
104 	0x9a020000, 0x0000ff02,	/* 0a8 - 168 */
105 	0x1a00000c, 0x0000000c,	/* 0b0 - 176 */
106 	0x878b0000, 0x00000130,	/* 0b8 - 184 */
107 	0x838a0000, 0x00000018,	/* 0c0 - 192 */
108 	0x818a0000, 0x000000b0,	/* 0c8 - 200 */
109 	0x808a0000, 0x00000080,	/* 0d0 - 208 */
110 	0x98080000, 0x0000ff03,	/* 0d8 - 216 */
111 	0x1b000014, 0x00000014,	/* 0e0 - 224 */
112 	0x72090000, 0x00000000,	/* 0e8 - 232 */
113 	0x6a340000, 0x00000000,	/* 0f0 - 240 */
114 	0x9f030000, 0x0000ff04,	/* 0f8 - 248 */
115 	0x1f00001c, 0x0000001c,	/* 100 - 256 */
116 	0x98040000, 0x0000ff26,	/* 108 - 264 */
117 	0x60000040, 0x00000000,	/* 110 - 272 */
118 	0x48000000, 0x00000000,	/* 118 - 280 */
119 	0x7c1bef00, 0x00000000,	/* 120 - 288 */
120 	0x72340000, 0x00000000,	/* 128 - 296 */
121 	0x980c0002, 0x0000fffc,	/* 130 - 304 */
122 	0x980c0008, 0x0000fffb,	/* 138 - 312 */
123 	0x980c0018, 0x0000fffd,	/* 140 - 320 */
124 	0x98040000, 0x0000fffe,	/* 148 - 328 */
125 	0x98080000, 0x0000ff00,	/* 150 - 336 */
126 	0x18000034, 0x00000034,	/* 158 - 344 */
127 	0x808b0000, 0x000001c0,	/* 160 - 352 */
128 	0x838b0000, 0xffffff70,	/* 168 - 360 */
129 	0x878a0000, 0x000000d0,	/* 170 - 368 */
130 	0x98080000, 0x0000ff05,	/* 178 - 376 */
131 	0x19000034, 0x00000034,	/* 180 - 384 */
132 	0x818b0000, 0x00000160,	/* 188 - 392 */
133 	0x80880000, 0xffffffd0,	/* 190 - 400 */
134 	0x1f00001c, 0x0000001c,	/* 198 - 408 */
135 	0x808c0001, 0x00000018,	/* 1a0 - 416 */
136 	0x980c0002, 0x0000ff08,	/* 1a8 - 424 */
137 	0x808c0004, 0x00000020,	/* 1b0 - 432 */
138 	0x98080000, 0x0000ff06,	/* 1b8 - 440 */
139 	0x60000040, 0x00000000,	/* 1c0 - 448 */
140 	0x1f00002c, 0x0000002c,	/* 1c8 - 456 */
141 	0x98080000, 0x0000ff07,	/* 1d0 - 464 */
142 	0x60000040, 0x00000000,	/* 1d8 - 472 */
143 	0x48000000, 0x00000000,	/* 1e0 - 480 */
144 	0x98080000, 0x0000ff09,	/* 1e8 - 488 */
145 	0x1f00001c, 0x0000001c,	/* 1f0 - 496 */
146 	0x808c0001, 0x00000018,	/* 1f8 - 504 */
147 	0x980c0002, 0x0000ff10,	/* 200 - 512 */
148 	0x808c0004, 0x00000020,	/* 208 - 520 */
149 	0x98080000, 0x0000ff11,	/* 210 - 528 */
150 	0x60000040, 0x00000000,	/* 218 - 536 */
151 	0x1f00002c, 0x0000002c,	/* 220 - 544 */
152 	0x98080000, 0x0000ff12,	/* 228 - 552 */
153 	0x60000040, 0x00000000,	/* 230 - 560 */
154 	0x48000000, 0x00000000,	/* 238 - 568 */
155 	0x98080000, 0x0000ff13,	/* 240 - 576 */
156 	0x1f00001c, 0x0000001c,	/* 248 - 584 */
157 	0x808c0001, 0x00000018,	/* 250 - 592 */
158 	0x980c0002, 0x0000ff14,	/* 258 - 600 */
159 	0x808c0004, 0x00000020,	/* 260 - 608 */
160 	0x98080000, 0x0000ff15,	/* 268 - 616 */
161 	0x60000040, 0x00000000,	/* 270 - 624 */
162 	0x1f00002c, 0x0000002c,	/* 278 - 632 */
163 	0x98080000, 0x0000ff16,	/* 280 - 640 */
164 	0x60000040, 0x00000000,	/* 288 - 648 */
165 	0x48000000, 0x00000000,	/* 290 - 656 */
166 	0x98080000, 0x0000ff17,	/* 298 - 664 */
167 	0x54000000, 0x00000040,	/* 2a0 - 672 */
168 	0x9f030000, 0x0000ff18,	/* 2a8 - 680 */
169 	0x1f00001c, 0x0000001c,	/* 2b0 - 688 */
170 	0x990b0000, 0x0000ff19,	/* 2b8 - 696 */
171 	0x980a0000, 0x0000ff20,	/* 2c0 - 704 */
172 	0x9f0a0000, 0x0000ff21,	/* 2c8 - 712 */
173 	0x9b0a0000, 0x0000ff22,	/* 2d0 - 720 */
174 	0x9e0a0000, 0x0000ff23,	/* 2d8 - 728 */
175 	0x98080000, 0x0000ff24,	/* 2e0 - 736 */
176 	0x98080000, 0x0000ff25,	/* 2e8 - 744 */
177 	0x76100800, 0x00000000,	/* 2f0 - 752 */
178 	0x80840700, 0x00000008,	/* 2f8 - 760 */
179 	0x7e110100, 0x00000000,	/* 300 - 768 */
180 	0x6a100000, 0x00000000,	/* 308 - 776 */
181 	0x19000034, 0x00000034,	/* 310 - 784 */
182 	0x818b0000, 0xffffffd0,	/* 318 - 792 */
183 	0x98080000, 0x0000ff27,	/* 320 - 800 */
184 	0x76100800, 0x00000000,	/* 328 - 808 */
185 	0x80840700, 0x00000008,	/* 330 - 816 */
186 	0x7e110100, 0x00000000,	/* 338 - 824 */
187 	0x6a100000, 0x00000000,	/* 340 - 832 */
188 	0x18000034, 0x00000034,	/* 348 - 840 */
189 	0x808b0000, 0xffffffd0,	/* 350 - 848 */
190 	0x98080000, 0x0000ff27	/* 358 - 856 */
191 };
192 
193 #define	Ent_msgout	0x00000018
194 #define	Ent_cmd		0x000000a8
195 #define	Ent_status	0x000000e0
196 #define	Ent_msgin	0x000000f8
197 #define	Ent_dataout	0x00000158
198 #define	Ent_datain	0x00000180
199 
200 /* default to not inhibit sync negotiation on any drive */
201 /* XXXX - unit 2 inhibits sync for my WangTek tape drive - mlh */
202 u_char siop_inhibit_sync[8] = { 0, 0, 1, 0, 0, 0, 0 }; /* initialize, so patchable */
203 int siop_no_dma = 0;
204 
205 int siop_reset_delay = 2000;	/* delay after reset, in milleseconds */
206 int siop_sync_period = 50;	/* synchronous transfer period, in nanoseconds */
207 
208 int siop_cmd_wait = SCSI_CMD_WAIT;
209 int siop_data_wait = SCSI_DATA_WAIT;
210 int siop_init_wait = SCSI_INIT_WAIT;
211 
212 static struct {
213 	unsigned char x;	/* period from sync request message */
214 	unsigned char y;	/* siop_period << 4 | sbcl */
215 } xxx[] = {
216 	{0x0f, 0x01},
217 	{0x13, 0x11},
218 	{0x17, 0x21},
219 /*	{0x17, 0x02},	*/
220 	{0x1b, 0x31},
221 	{0x1d, 0x12},
222 	{0x1e, 0x41},
223 /*	{0x1e, 0x03},	*/
224 	{0x22, 0x51},
225 	{0x23, 0x22},
226 	{0x26, 0x61},
227 /*	{0x26, 0x13},	*/
228 	{0x29, 0x32},
229 	{0x2a, 0x71},
230 	{0x2d, 0x23},
231 	{0x2e, 0x42},
232 	{0x34, 0x52},
233 	{0x35, 0x33},
234 	{0x3a, 0x62},
235 	{0x3c, 0x43},
236 	{0x40, 0x72},
237 	{0x44, 0x53},
238 	{0x4b, 0x63},
239 	{0x53, 0x73}
240 };
241 
242 #ifdef DEBUG
243 #define QPRINTF(a) if (siop_debug > 1) printf a
244 /*
245  *	0x01 - full debug
246  *	0x02 - DMA chaining
247  *	0x04 - siopintr
248  *	0x08 - phase mismatch
249  *	0x10 - panic on phase mismatch
250  */
251 int	siop_debug = 0;
252 int	siopsync_debug = 0;
253 int	siopdma_hits = 0;
254 int	siopdma_misses = 0;
255 #endif
256 
257 
258 /*
259  * default minphys routine for siop based controllers
260  */
261 void
262 siop_minphys(bp)
263 	struct buf *bp;
264 {
265 	/*
266 	 * no max transfer at this level
267 	 */
268 }
269 
270 /*
271  * must be used
272  */
273 u_int
274 siop_adinfo()
275 {
276 	/*
277 	 * one request at a time please
278 	 */
279 	return(1);
280 }
281 
282 /*
283  * used by specific siop controller
284  *
285  * it appears that the higher level code does nothing with LUN's
286  * so I will too.  I could plug it in, however so could they
287  * in scsi_scsi_cmd().
288  */
289 int
290 siop_scsicmd(xs)
291 	struct scsi_xfer *xs;
292 {
293 	struct siop_pending *pendp;
294 	struct siop_softc *dev;
295 	struct scsi_link *slp;
296 	int flags, s;
297 
298 	slp = xs->sc_link;
299 	dev = slp->adapter_softc;
300 	flags = xs->flags;
301 
302 	if (flags & SCSI_DATA_UIO)
303 		panic("siop: scsi data uio requested");
304 
305 	if (dev->sc_xs && flags & SCSI_NOMASK)
306 		panic("siop_scsicmd: busy");
307 
308 	s = splbio();
309 	pendp = &dev->sc_xsstore[slp->target][slp->lun];
310 	if (pendp->xs) {
311 		splx(s);
312 		return(TRY_AGAIN_LATER);
313 	}
314 
315 	if (dev->sc_xs) {
316 		pendp->xs = xs;
317 		TAILQ_INSERT_TAIL(&dev->sc_xslist, pendp, link);
318 		splx(s);
319 		return(SUCCESSFULLY_QUEUED);
320 	}
321 	pendp->xs = NULL;
322 	dev->sc_xs = xs;
323 	splx(s);
324 
325 	/*
326 	 * nothing is pending do it now.
327 	 */
328 	siop_donextcmd(dev);
329 
330 	if (flags & SCSI_NOMASK)
331 		return(COMPLETE);
332 	return(SUCCESSFULLY_QUEUED);
333 }
334 
335 /*
336  * entered with dev->sc_xs pointing to the next xfer to perform
337  */
338 void
339 siop_donextcmd(dev)
340 	struct siop_softc *dev;
341 {
342 	struct scsi_xfer *xs;
343 	struct scsi_link *slp;
344 	int flags, phase, stat;
345 
346 	xs = dev->sc_xs;
347 	slp = xs->sc_link;
348 	flags = xs->flags;
349 
350 #if 0
351 	if (flags & SCSI_DATA_IN)
352 		phase = DATA_IN_PHASE;
353 	else if (flags & SCSI_DATA_OUT)
354 		phase = DATA_OUT_PHASE;
355 	else
356 		phase = STATUS_PHASE;
357 #endif
358 
359 	if (flags & SCSI_RESET)
360 		siopreset(dev);
361 
362 	dev->sc_stat[0] = -1;
363 #if 0
364 	if (phase == STATUS_PHASE || flags & SCSI_NOMASK)
365 #else
366 	if (flags & SCSI_NOMASK || siop_no_dma)
367 #endif
368 		stat = siopicmd(dev, slp->target, xs->cmd, xs->cmdlen,
369 		    xs->data, xs->datalen/*, phase*/);
370 	else if (siopgo(dev, xs) == 0)
371 		return;
372 	else
373 		stat = dev->sc_stat[0];
374 
375 	siop_scsidone(dev, stat);
376 }
377 
378 void
379 siop_scsidone(dev, stat)
380 	struct siop_softc *dev;
381 	int stat;
382 {
383 	struct siop_pending *pendp;
384 	struct scsi_xfer *xs;
385 	int s, donext;
386 
387 	xs = dev->sc_xs;
388 #ifdef DIAGNOSTIC
389 	if (xs == NULL)
390 		panic("siop_scsidone");
391 #endif
392 	/*
393 	 * is this right?
394 	 */
395 	xs->status = stat;
396 
397 	if (stat == 0 || xs->flags & SCSI_ERR_OK)
398 		xs->resid = 0;
399 	else {
400 		switch(stat) {
401 		case SCSI_CHECK:
402 			if (stat = siopgetsense(dev, xs))
403 				goto bad_sense;
404 			xs->error = XS_SENSE;
405 			break;
406 		case SCSI_BUSY:
407 			xs->error = XS_BUSY;
408 			break;
409 		bad_sense:
410 		default:
411 			xs->error = XS_DRIVER_STUFFUP;
412 			QPRINTF(("siop_scsicmd() bad %x\n", stat));
413 			break;
414 		}
415 	}
416 	xs->flags |= ITSDONE;
417 
418 	/*
419 	 * grab next command before scsi_done()
420 	 * this way no single device can hog scsi resources.
421 	 */
422 	s = splbio();
423 	pendp = dev->sc_xslist.tqh_first;
424 	if (pendp == NULL) {
425 		donext = 0;
426 		dev->sc_xs = NULL;
427 	} else {
428 		donext = 1;
429 		TAILQ_REMOVE(&dev->sc_xslist, pendp, link);
430 		dev->sc_xs = pendp->xs;
431 		pendp->xs = NULL;
432 	}
433 	splx(s);
434 	scsi_done(xs);
435 
436 	if (donext)
437 		siop_donextcmd(dev);
438 }
439 
440 int
441 siopgetsense(dev, xs)
442 	struct siop_softc *dev;
443 	struct scsi_xfer *xs;
444 {
445 	struct scsi_sense rqs;
446 	struct scsi_link *slp;
447 	int stat;
448 
449 	slp = xs->sc_link;
450 
451 	rqs.op_code = REQUEST_SENSE;
452 	rqs.byte2 = slp->lun << 5;
453 #ifdef not_yet
454 	rqs.length = xs->req_sense_length ? xs->req_sense_length :
455 	    sizeof(xs->sense);
456 #else
457 	rqs.length = sizeof(xs->sense);
458 #endif
459 	if (rqs.length > sizeof (xs->sense))
460 		rqs.length = sizeof (xs->sense);
461 	rqs.unused[0] = rqs.unused[1] = rqs.control = 0;
462 
463 	return(siopicmd(dev, slp->target, &rqs, sizeof(rqs), &xs->sense,
464 	    rqs.length));
465 }
466 
467 void
468 siopabort(dev, regs, where)
469 	register struct siop_softc *dev;
470 	siop_regmap_p regs;
471 	char *where;
472 {
473 
474 	printf ("%s: abort %s: dstat %02x, sstat0 %02x sbcl %02x\n",
475 	    dev->sc_dev.dv_xname,
476 	    where, regs->siop_dstat, regs->siop_sstat0, regs->siop_sbcl);
477 
478 	if (dev->sc_flags & SIOP_SELECTED) {
479 #ifdef TODO
480       SET_SBIC_cmd (regs, SBIC_CMD_ABORT);
481       WAIT_CIP (regs);
482 
483       GET_SBIC_asr (regs, asr);
484       if (asr & (SBIC_ASR_BSY|SBIC_ASR_LCI))
485         {
486           /* ok, get more drastic.. */
487 
488 	  SET_SBIC_cmd (regs, SBIC_CMD_RESET);
489 	  DELAY(25);
490 	  SBIC_WAIT(regs, SBIC_ASR_INT, 0);
491 	  GET_SBIC_csr (regs, csr);       /* clears interrupt also */
492 
493           dev->sc_flags &= ~SIOP_SELECTED;
494           return;
495         }
496 
497       do
498         {
499           SBIC_WAIT (regs, SBIC_ASR_INT, 0);
500           GET_SBIC_csr (regs, csr);
501         }
502       while ((csr != SBIC_CSR_DISC) && (csr != SBIC_CSR_DISC_1)
503 	      && (csr != SBIC_CSR_CMD_INVALID));
504 #endif
505 
506 		/* lets just hope it worked.. */
507 		dev->sc_flags &= ~SIOP_SELECTED;
508 	}
509 }
510 
511 /*
512  * XXX Set/reset long delays.
513  *
514  * if delay == 0, reset default delays
515  * if delay < 0,  set both delays to default long initialization values
516  * if delay > 0,  set both delays to this value
517  *
518  * Used when a devices is expected to respond slowly (e.g. during
519  * initialization).
520  */
521 void
522 siop_delay(delay)
523 	int delay;
524 {
525 	static int saved_cmd_wait, saved_data_wait;
526 
527 	if (delay) {
528 		saved_cmd_wait = siop_cmd_wait;
529 		saved_data_wait = siop_data_wait;
530 		if (delay > 0)
531 			siop_cmd_wait = siop_data_wait = delay;
532 		else
533 			siop_cmd_wait = siop_data_wait = siop_init_wait;
534 	} else {
535 		siop_cmd_wait = saved_cmd_wait;
536 		siop_data_wait = saved_data_wait;
537 	}
538 }
539 
540 void
541 siopreset(dev)
542 	struct siop_softc *dev;
543 {
544 	siop_regmap_p regs;
545 	u_int i, s;
546 	u_char  my_id, csr;
547 
548 	regs = dev->sc_siopp;
549 
550 	if (dev->sc_flags & SIOP_ALIVE)
551 		siopabort(dev, regs, "reset");
552 
553 	printf("\n%s: ", dev->sc_dev.dv_xname);		/* XXXX */
554 
555 	s = splbio();
556 	my_id = 7;
557 
558 	/*
559 	 * Reset the chip
560 	 * XXX - is this really needed?
561 	 */
562 	regs->siop_sien &= ~SIOP_SIEN_RST;
563 	regs->siop_scntl1 |= SIOP_SCNTL1_RST;
564 	for (i = 0; i < 1000; ++i)
565 		;
566 	regs->siop_scntl1 &= ~SIOP_SCNTL1_RST;
567 	regs->siop_sien |= SIOP_SIEN_RST;
568 
569 	/*
570 	 * Set up various chip parameters
571 	 */
572 	regs->siop_istat = 0x40;
573 	for (i = 0; i < 1000; ++i)
574 		;
575 	regs->siop_istat = 0x00;
576 	regs->siop_scntl0 = SIOP_ARB_FULL | SIOP_SCNTL0_EPC | SIOP_SCNTL0_EPG;
577 	regs->siop_dcntl = dev->sc_clock_freq & 0xff;
578 	regs->siop_dmode = 0x80;	/* burst length = 4 */
579 	regs->siop_sien = 0x00;	/* don't enable interrupts yet */
580 	regs->siop_dien = 0x00;	/* don't enable interrupts yet */
581 	regs->siop_scid = 1 << my_id;
582 	regs->siop_dwt = 0x00;
583 	regs->siop_ctest0 |= 0x20;	/* Enable Active Negation ?? */
584 	regs->siop_ctest7 |= (dev->sc_clock_freq >> 8) & 0xff;
585 
586 	/* will need to re-negotiate sync xfers */
587 	bzero(&dev->sc_sync, sizeof (dev->sc_sync));
588 
589 	splx (s);
590 
591  	DELAY (siop_reset_delay * 10000);
592 	printf("siop id %d reset\n", my_id);
593 	dev->sc_flags |= SIOP_ALIVE;
594 	dev->sc_flags &= ~(SIOP_SELECTED | SIOP_DMA);
595 }
596 
597 /*
598  * Setup Data Storage for 53C710 and start SCRIPTS processing
599  */
600 
601 void
602 siop_setup (dev, target, cbuf, clen, buf, len)
603 	struct siop_softc *dev;
604 	int target;
605 	u_char *cbuf;
606 	int clen;
607 	u_char *buf;
608 	int len;
609 {
610 	siop_regmap_p regs = dev->sc_siopp;
611 	int i;
612 	int nchain;
613 	int count, tcount;
614 	char *addr, *dmaend;
615 
616 	dev->sc_istat = 0;
617 	dev->sc_lun = 0x80;			/* XXX */
618 	dev->sc_stat[0] = -1;
619 	dev->sc_msg[0] = -1;
620 	dev->sc_ds.scsi_addr = (0x10000 << target) | (dev->sc_sync[target].period << 8);
621 	dev->sc_ds.idlen = 1;
622 	dev->sc_ds.idbuf = (char *) kvtop(&dev->sc_lun);
623 	dev->sc_ds.cmdlen = clen;
624 	dev->sc_ds.cmdbuf = (char *) kvtop(cbuf);
625 	dev->sc_ds.stslen = 1;
626 	dev->sc_ds.stsbuf = (char *) kvtop(&dev->sc_stat[0]);
627 	dev->sc_ds.msglen = 1;
628 	dev->sc_ds.msgbuf = (char *) kvtop(&dev->sc_msg[0]);
629 	dev->sc_ds.sdtrolen = 0;
630 	dev->sc_ds.sdtrilen = 0;
631 	dev->sc_ds.chain[0].datalen = len;
632 	dev->sc_ds.chain[0].databuf = (char *) kvtop(buf);
633 
634 	if (dev->sc_sync[target].state == SYNC_START) {
635 		if (siop_inhibit_sync[target]) {
636 			dev->sc_sync[target].state = SYNC_DONE;
637 			dev->sc_sync[target].offset = 0;
638 			dev->sc_sync[target].period = 0;
639 #ifdef DEBUG
640 			if (siopsync_debug)
641 				printf ("Forcing target %d asynchronous\n", target);
642 #endif
643 		}
644 		else {
645 			dev->sc_msg[1] = MSG_IDENTIFY;
646 			dev->sc_msg[2] = MSG_EXT_MESSAGE;
647 			dev->sc_msg[3] = 3;
648 			dev->sc_msg[4] = MSG_SYNC_REQ;
649 			dev->sc_msg[5] = siop_sync_period / 4;
650 			dev->sc_msg[6] = SIOP_MAX_OFFSET;
651 			dev->sc_ds.sdtrolen = 6;
652 			dev->sc_ds.sdtrilen = 6;
653 			dev->sc_ds.sdtrobuf = dev->sc_ds.sdtribuf = (char *) kvtop(dev->sc_msg + 1);
654 			dev->sc_sync[target].state = SYNC_SENT;
655 #ifdef DEBUG
656 			if (siopsync_debug)
657 				printf ("Sending sync request to target %d\n", target);
658 #endif
659 		}
660 	}
661 
662 /*
663  * If length is > 1 page, check for consecutive physical pages
664  * Need to set up chaining if not
665  */
666 	nchain = 0;
667 	count = len;
668 	addr = buf;
669 	dmaend = NULL;
670 	while (count > 0) {
671 		dev->sc_ds.chain[nchain].databuf = (char *) kvtop (addr);
672 		if (count < (tcount = NBPG - ((int) addr & PGOFSET)))
673 			tcount = count;
674 		dev->sc_ds.chain[nchain].datalen = tcount;
675 		addr += tcount;
676 		count -= tcount;
677 		if (dev->sc_ds.chain[nchain].databuf == dmaend) {
678 			dmaend += dev->sc_ds.chain[nchain].datalen;
679 			dev->sc_ds.chain[--nchain].datalen += tcount;
680 #ifdef DEBUG
681 			++siopdma_hits;
682 #endif
683 		}
684 		else {
685 			dmaend = dev->sc_ds.chain[nchain].databuf +
686 			    dev->sc_ds.chain[nchain].datalen;
687 			dev->sc_ds.chain[nchain].datalen = tcount;
688 #ifdef DEBUG
689 			++siopdma_misses;
690 #endif
691 		}
692 		++nchain;
693 	}
694 #ifdef DEBUG
695 	if (nchain != 1 && len != 0 && siop_debug & 3) {
696 		printf ("DMA chaining set: %d\n", nchain);
697 		for (i = 0; i < nchain; ++i) {
698 			printf ("  [%d] %8x %4x\n", i, dev->sc_ds.chain[i].databuf,
699 			    dev->sc_ds.chain[i].datalen);
700 		}
701 	}
702 #endif
703 
704 	regs->siop_sbcl = dev->sc_sync[target].offset;
705 	if (dev->sc_ds.sdtrolen)
706 		regs->siop_scratch = regs->siop_scratch | 0x100;
707 	else
708 		regs->siop_scratch = regs->siop_scratch & ~0xff00;
709 	regs->siop_dsa = (long) kvtop(&dev->sc_ds);
710 	DCIS();				/* push data cache */
711 	regs->siop_dsp = (long) kvtop(scripts);
712 }
713 
714 /*
715  * Process a DMA or SCSI interrupt from the 53C710 SIOP
716  */
717 
718 int
719 siop_checkintr(dev, istat, dstat, sstat0, status)
720 	struct	siop_softc *dev;
721 	u_char	istat;
722 	u_char	dstat;
723 	u_char	sstat0;
724 	int	*status;
725 {
726 	siop_regmap_p regs = dev->sc_siopp;
727 	int	target;
728 
729 	regs->siop_ctest8 |= 0x04;
730 	while ((regs->siop_ctest1 & SIOP_CTEST1_FMT) == 0)
731 		;
732 	regs->siop_ctest8 &= ~0x04;
733 #ifdef DEBUG
734 	if (siop_debug & 1) {
735 		DCIAS(kvtop(&dev->sc_stat));	/* XXX */
736 		printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n",
737 		    istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]);
738 	}
739 #endif
740 	if (dstat & SIOP_DSTAT_SIR && (regs->siop_dsps == 0xff00 ||
741 	    regs->siop_dsps == 0xfffc)) {
742 		/* Normal completion status, or check condition */
743 		if (regs->siop_dsa != (long) kvtop(&dev->sc_ds)) {
744 			printf ("siop: invalid dsa: %x %x\n", regs->siop_dsa,
745 			    kvtop(&dev->sc_ds));
746 			panic("*** siop DSA invalid ***");
747 		}
748 		target = dev->sc_slave;
749 		if (dev->sc_sync[target].state == SYNC_SENT) {
750 #ifdef DEBUG
751 			if (siopsync_debug)
752 				printf ("sync msg in: %02x %02x %02x %02x %02x %02x\n",
753 				    dev->sc_msg[1], dev->sc_msg[2], dev->sc_msg[3],
754 				    dev->sc_msg[4], dev->sc_msg[5], dev->sc_msg[6]);
755 #endif
756 			dev->sc_sync[target].state = SYNC_DONE;
757 			dev->sc_sync[target].period = 0;
758 			dev->sc_sync[target].offset = 0;
759 			if (dev->sc_msg[1] == MSG_EXT_MESSAGE &&
760 			    dev->sc_msg[2] == 3 &&
761 			    dev->sc_msg[3] == MSG_SYNC_REQ &&
762 			    dev->sc_msg[5] != 0) {
763 				if (dev->sc_msg[4] && dev->sc_msg[4] < 100 / 4) {
764 #ifdef DEBUG
765 					printf ("%d: target %d wanted %dns period\n",
766 					    dev->sc_dev.dv_xname, target,
767 					    dev->sc_msg[4] * 4);
768 #endif
769 					/*
770 					 * Kludge for Maxtor XT8580S
771 					 * It accepts whatever we request, even
772 					 * though it won't work.  So we ask for
773 					 * a short period than we can handle.  If
774 					 * the device says it can do it, use 208ns.
775 					 * If the device says it can do less than
776 					 * 100ns, then we limit it to 100ns.
777 					 */
778 					if (dev->sc_msg[4] == siop_sync_period / 4)
779 						dev->sc_msg[4] = 208 / 4;
780 					else
781 						dev->sc_msg[4] = 100 / 4;
782 				}
783 				printf ("%s: target %d now synchronous, period=%dns, offset=%d\n",
784 				    dev->sc_dev.dv_xname, target,
785 				    dev->sc_msg[4] * 4, dev->sc_msg[5]);
786 				scsi_period_to_siop (dev, target);
787 			}
788 		}
789 		DCIAS(kvtop(&dev->sc_stat));	/* XXX */
790 		*status = dev->sc_stat[0];
791 		return 1;
792 	}
793 	if (sstat0 & SIOP_SSTAT0_M_A) {		/* Phase mismatch */
794 #ifdef DEBUG
795 		if (siop_debug & 9)
796 			printf ("Phase mismatch: %x dsp +%x\n", regs->siop_sbcl,
797 			    regs->siop_dsp - kvtop(scripts));
798 		if (siop_debug & 0x10)
799 			panic ("53c710 phase mismatch");
800 #endif
801 		if ((regs->siop_sbcl & SIOP_REQ) == 0)
802 			printf ("Phase mismatch: REQ not asserted! %02x\n",
803 			    regs->siop_sbcl);
804 		switch (regs->siop_sbcl & 7) {
805 /*
806  * For data out and data in phase, check for DMA chaining
807  */
808 
809 /*
810  * for message in, check for possible reject for sync request
811  */
812 		case 0:
813 			regs->siop_dsp = kvtop(scripts) + Ent_dataout;
814 			break;
815 		case 1:
816 			regs->siop_dsp = kvtop(scripts) + Ent_datain;
817 			break;
818 		case 2:
819 			regs->siop_dsp = kvtop(scripts) + Ent_cmd;
820 			break;
821 		case 3:
822 			regs->siop_dsp = kvtop(scripts) + Ent_status;
823 			break;
824 		case 6:
825 			regs->siop_dsp = kvtop(scripts) + Ent_msgout;
826 			break;
827 		case 7:
828 			regs->siop_dsp = kvtop(scripts) + Ent_msgin;
829 			break;
830 		default:
831 			goto bad_phase;
832 		}
833 		return 0;
834 	}
835 	if (sstat0 & SIOP_SSTAT0_STO) {		/* Select timed out */
836 		*status = -1;
837 		return 1;
838 	}
839 	if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff05 &&
840 	    (regs->siop_sbcl & (SIOP_MSG | SIOP_CD)) == 0) {
841 		printf ("DMA chaining failed\n");
842 		siopreset (dev);
843 		*status = -1;
844 		return 1;
845 	}
846 	if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff27) {
847 #ifdef DEBUG
848 		if (siop_debug & 3)
849 			printf ("DMA chaining completed: dsa %x dnad %x addr %x\n",
850 				regs->siop_dsa,	regs->siop_dnad, regs->siop_addr);
851 #endif
852 		regs->siop_dsa = kvtop (&dev->sc_ds);
853 		regs->siop_dsp = kvtop (scripts) + Ent_status;
854 		return 0;
855 	}
856 	target = dev->sc_slave;
857 	if (dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff26 &&
858 	    dev->sc_msg[0] == MSG_REJECT && dev->sc_sync[target].state == SYNC_SENT) {
859 		dev->sc_sync[target].state = SYNC_DONE;
860 		dev->sc_sync[target].period = 0;
861 		dev->sc_sync[target].offset = 0;
862 		dev->sc_ds.sdtrolen = 0;
863 		dev->sc_ds.sdtrilen = 0;
864 #ifdef DEBUG
865 		if (siopsync_debug || 1)
866 			printf ("target %d rejected sync, going asynchronous\n", target);
867 #endif
868 		siop_inhibit_sync[target] = -1;
869 		if ((regs->siop_sbcl & 7) == 6) {
870 			regs->siop_dsp = kvtop(scripts) + Ent_msgout;
871 			return (0);
872 		}
873 	}
874 	if ((dstat & SIOP_DSTAT_SIR && regs->siop_dsps == 0xff13) ||
875 	    sstat0 & SIOP_SSTAT0_UDC) {
876 #ifdef DEBUG
877 		printf ("%s: target %d disconnected unexpectedly\n",
878 		   dev->sc_dev.dv_xname, target);
879 #endif
880 #if 0
881 		siopabort (dev, regs, "siopchkintr");
882 #endif
883 		*status = STS_BUSY;
884 		return 1;
885 	}
886 	if (dstat & SIOP_DSTAT_SIR &&regs->siop_dsps == 0xfffb) {
887 #if 0
888 		printf ("%s: target %d busy\n", dev->sc_dev.dv_xname, target);
889 #endif
890 #if 0
891 		siopabort (dev, regs, "siopchkintr");
892 #endif
893 		*status = STS_BUSY;
894 		return 1;
895 	}
896 	if (sstat0 == 0 && dstat & SIOP_DSTAT_SIR) {
897 		DCIAS(kvtop(&dev->sc_stat));
898 		printf ("SIOP interrupt: %x sts %x msg %x sbcl %x\n",
899 		    regs->siop_dsps, dev->sc_stat[0], dev->sc_msg[0],
900 		    regs->siop_sbcl);
901 		siopreset (dev);
902 		*status = -1;
903 		return 1;
904 	}
905 bad_phase:
906 /*
907  * temporary panic for unhandled conditions
908  * displays various things about the 53C710 status and registers
909  * then panics
910  */
911 printf ("siopchkintr: target %x ds %x\n", target, &dev->sc_ds);
912 printf ("scripts %x ds %x regs %x dsp %x dcmd %x\n", kvtop(scripts),
913     kvtop(&dev->sc_ds), kvtop(regs), regs->siop_dsp, *((long *)&regs->siop_dcmd));
914 printf ("siopchkintr: istat %x dstat %x sstat0 %x dsps %x dsa %x sbcl %x sts %x msg %x\n",
915     istat, dstat, sstat0, regs->siop_dsps, regs->siop_dsa, regs->siop_sbcl,
916     dev->sc_stat[0], dev->sc_msg[0]);
917 panic("siopchkintr: **** temp ****");
918 }
919 
920 /*
921  * SCSI 'immediate' command:  issue a command to some SCSI device
922  * and get back an 'immediate' response (i.e., do programmed xfer
923  * to get the response data).  'cbuf' is a buffer containing a scsi
924  * command of length clen bytes.  'buf' is a buffer of length 'len'
925  * bytes for data.  The transfer direction is determined by the device
926  * (i.e., by the scsi bus data xfer phase).  If 'len' is zero, the
927  * command must supply no data.  'xferphase' is the bus phase the
928  * caller expects to happen after the command is issued.  It should
929  * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE.
930  *
931  * XXX - 53C710 will use DMA, but no interrupts (it's a heck of a
932  * lot easier to do than to use programmed I/O).
933  *
934  */
935 int
936 siopicmd(dev, target, cbuf, clen, buf, len)
937 	struct siop_softc *dev;
938 	int target;
939 	void *cbuf;
940 	int clen;
941 	void *buf;
942 	int len;
943 {
944 	siop_regmap_p regs = dev->sc_siopp;
945 	int i;
946 	int status;
947 	u_char istat;
948 	u_char dstat;
949 	u_char sstat0;
950 
951 	if (dev->sc_flags & SIOP_SELECTED) {
952 		printf ("siopicmd%d: bus busy\n", target);
953 		return -1;
954 	}
955 	regs->siop_sien = 0x00;		/* disable SCSI and DMA interrupts */
956 	regs->siop_dien = 0x00;
957 	dev->sc_flags |= SIOP_SELECTED;
958 	dev->sc_slave = target;
959 #ifdef DEBUG
960 	if (siop_debug & 1)
961 		printf ("siopicmd: target %x cmd %02x ds %x\n", target,
962 		    *((char *)cbuf), &dev->sc_ds);
963 #endif
964 	siop_setup (dev, target, cbuf, clen, buf, len);
965 
966 	for (;;) {
967 		/* use cmd_wait values? */
968 		i = siop_cmd_wait << 1;
969 		while (((istat = regs->siop_istat) &
970 		    (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0) {
971 			if (--i <= 0) {
972 				printf ("waiting: tgt %d cmd %02x sbcl %02x dsp %x (+%x) dcmd %x ds %x\n",
973 				    target, *((char *)cbuf),
974 				    regs->siop_sbcl, regs->siop_dsp,
975 				    regs->siop_dsp - kvtop(scripts),
976 				    *((long *)&regs->siop_dcmd), &dev->sc_ds);
977 				i = siop_cmd_wait << 2;
978 				/* XXXX need an upper limit and reset */
979 			}
980 			DELAY(1);
981 		}
982 		dstat = regs->siop_dstat;
983 		sstat0 = regs->siop_sstat0;
984 #ifdef DEBUG
985 		if (siop_debug & 1) {
986 			DCIAS(kvtop(&dev->sc_stat));	/* XXX should just invalidate dev->sc_stat */
987 			printf ("siopicmd: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n",
988 			    istat, dstat, sstat0, regs->siop_dsps, regs->siop_sbcl,
989 			    dev->sc_stat[0], dev->sc_msg[0]);
990 		}
991 #endif
992 		if (siop_checkintr(dev, istat, dstat, sstat0, &status)) {
993 			dev->sc_flags &= ~SIOP_SELECTED;
994 			return (status);
995 		}
996 	}
997 }
998 
999 int
1000 siopgo(dev, xs)
1001 	struct siop_softc *dev;
1002 	struct scsi_xfer *xs;
1003 {
1004 	siop_regmap_p regs;
1005 	int i;
1006 	int nchain;
1007 	int count, tcount;
1008 	char *addr, *dmaend;
1009 
1010 #ifdef DEBUG
1011 	if (siop_debug & 1)
1012 		printf ("%s: go ", dev->sc_dev.dv_xname);
1013 #if 0
1014 	if ((cdb->cdb[1] & 1) == 0 &&
1015 	    ((cdb->cdb[0] == CMD_WRITE && cdb->cdb[2] == 0 && cdb->cdb[3] == 0) ||
1016 	    (cdb->cdb[0] == CMD_WRITE_EXT && cdb->cdb[2] == 0 && cdb->cdb[3] == 0
1017 	    && cdb->cdb[4] == 0)))
1018 		panic ("siopgo: attempted write to block < 0x100");
1019 #endif
1020 #endif
1021 #if 0
1022 	cdb->cdb[1] |= unit << 5;
1023 #endif
1024 
1025 	if (dev->sc_flags & SIOP_SELECTED) {
1026 		printf ("%s: bus busy\n", dev->sc_dev.dv_xname);
1027 		return 1;
1028 	}
1029 
1030 	dev->sc_flags |= SIOP_SELECTED | SIOP_DMA;
1031 	dev->sc_slave = xs->sc_link->target;
1032 	regs = dev->sc_siopp;
1033 	/* enable SCSI and DMA interrupts */
1034 	regs->siop_sien = SIOP_SIEN_M_A | SIOP_SIEN_STO | SIOP_SIEN_SEL | SIOP_SIEN_SGE |
1035 	    SIOP_SIEN_UDC | SIOP_SIEN_RST | SIOP_SIEN_PAR;
1036 	regs->siop_dien = 0x20 | SIOP_DIEN_ABRT | SIOP_DIEN_SIR | SIOP_DIEN_WTD |
1037 	    SIOP_DIEN_OPC;
1038 #ifdef DEBUG
1039 	if (siop_debug & 1)
1040 		printf ("siopgo: target %x cmd %02x ds %x\n", dev->sc_slave, xs->cmd->opcode, &dev->sc_ds);
1041 #endif
1042 
1043 	siop_setup(dev, dev->sc_slave, xs->cmd, xs->cmdlen, xs->data, xs->datalen);
1044 
1045 	return (0);
1046 }
1047 
1048 /*
1049  * Check for 53C710 interrupts
1050  */
1051 
1052 int
1053 siopintr (dev)
1054 	register struct siop_softc *dev;
1055 {
1056 	siop_regmap_p regs;
1057 	register u_char istat, dstat, sstat0;
1058 	int unit;
1059 	int status;
1060 	int found = 0;
1061 
1062 	regs = dev->sc_siopp;
1063 	istat = dev->sc_istat;
1064 	if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0)
1065 		return;
1066 	if ((dev->sc_flags & (SIOP_DMA | SIOP_SELECTED)) == SIOP_SELECTED)
1067 		return;	/* doing non-interrupt I/O */
1068 		/* Got a valid interrupt on this device */
1069 	dstat = dev->sc_dstat;
1070 	sstat0 = dev->sc_sstat0;
1071 	dev->sc_istat = 0;
1072 #ifdef DEBUG
1073 	if (siop_debug & 1)
1074 		printf ("%s: intr istat %x dstat %x sstat0 %x\n",
1075 		    dev->sc_dev.dv_xname, istat, dstat, sstat0);
1076 	if ((dev->sc_flags & SIOP_DMA) == 0) {
1077 		printf ("%s: spurious interrupt? istat %x dstat %x sstat0 %x\n",
1078 		    dev->sc_dev.dv_xname, istat, dstat, sstat0);
1079 	}
1080 #endif
1081 
1082 #ifdef DEBUG
1083 	if (siop_debug & 5) {
1084 		DCIAS(kvtop(&dev->sc_stat));
1085 		printf ("siopintr%d: istat %x dstat %x sstat0 %x dsps %x sbcl %x sts %x msg %x\n",
1086 		    unit, istat, dstat, sstat0, regs->siop_dsps,
1087 		    regs->siop_sbcl, dev->sc_stat[0], dev->sc_msg[0]);
1088 	}
1089 #endif
1090 	if (siop_checkintr (dev, istat, dstat, sstat0, &status)) {
1091 #if 1
1092 		regs->siop_sien = 0;
1093 		regs->siop_dien = 0;
1094 		if (status == 0xff)
1095 			printf ("siopintr: status == 0xff\n");
1096 #endif
1097 		dev->sc_flags &= ~(SIOP_DMA | SIOP_SELECTED);
1098 		siop_scsidone(dev, dev->sc_stat[0]);
1099 	}
1100 }
1101 
1102 scsi_period_to_siop (dev, target)
1103 	struct siop_softc *dev;
1104 {
1105 	int period, offset, i, sxfer;
1106 
1107 	period = dev->sc_msg[4];
1108 	offset = dev->sc_msg[5];
1109 	sxfer = 0;
1110 	if (offset <= SIOP_MAX_OFFSET)
1111 		sxfer = offset;
1112 	for (i = 0; i < sizeof (xxx) / 2; ++i) {
1113 		if (period <= xxx[i].x) {
1114 			sxfer |= xxx[i].y & 0x70;
1115 			offset = xxx[i].y & 0x03;
1116 			break;
1117 		}
1118 	}
1119 	dev->sc_sync[target].period = sxfer;
1120 	dev->sc_sync[target].offset = offset;
1121 #ifdef DEBUG
1122 	printf ("sync: siop_sxfr %02x, siop_sbcl %02x\n", sxfer, offset);
1123 #endif
1124 }
1125