1 /* $NetBSD: sci.c,v 1.25 2001/04/25 17:53:08 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * Van Jacobson of Lawrence Berkeley Laboratory. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)scsi.c 7.5 (Berkeley) 5/4/91 40 */ 41 42 /* 43 * AMIGA NCR 5380 scsi adaptor driver 44 */ 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/disklabel.h> 50 #include <sys/dkstat.h> 51 #include <sys/buf.h> 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #include <dev/scsipi/scsiconf.h> 55 #include <uvm/uvm_extern.h> 56 #include <machine/pmap.h> 57 #include <machine/cpu.h> 58 #include <amiga/amiga/device.h> 59 #include <amiga/amiga/custom.h> 60 #include <amiga/amiga/isr.h> 61 #include <amiga/dev/scireg.h> 62 #include <amiga/dev/scivar.h> 63 64 /* 65 * SCSI delays 66 * In u-seconds, primarily for state changes on the SPC. 67 */ 68 #define SCI_CMD_WAIT 50000 /* wait per step of 'immediate' cmds */ 69 #define SCI_DATA_WAIT 50000 /* wait per data in/out step */ 70 #define SCI_INIT_WAIT 50000 /* wait per step (both) during init */ 71 72 int sciicmd __P((struct sci_softc *, int, void *, int, void *, int,u_char)); 73 int scigo __P((struct sci_softc *, struct scsipi_xfer *)); 74 int sciselectbus __P((struct sci_softc *, u_char, u_char)); 75 void sciabort __P((struct sci_softc *, char *)); 76 void scierror __P((struct sci_softc *, u_char)); 77 void scisetdelay __P((int)); 78 void sci_scsidone __P((struct sci_softc *, int)); 79 void sci_donextcmd __P((struct sci_softc *)); 80 int sci_ixfer_out __P((struct sci_softc *, int, register u_char *, int)); 81 void sci_ixfer_in __P((struct sci_softc *, int, register u_char *, int)); 82 83 int sci_cmd_wait = SCI_CMD_WAIT; 84 int sci_data_wait = SCI_DATA_WAIT; 85 int sci_init_wait = SCI_INIT_WAIT; 86 87 int sci_no_dma = 0; 88 89 #ifdef DEBUG 90 #define QPRINTF(a) if (sci_debug > 1) printf a 91 int sci_debug = 0; 92 #else 93 #define QPRINTF(a) 94 #endif 95 96 /* 97 * default minphys routine for sci based controllers 98 */ 99 void 100 sci_minphys(bp) 101 struct buf *bp; 102 { 103 104 /* 105 * No max transfer at this level. 106 */ 107 minphys(bp); 108 } 109 110 /* 111 * used by specific sci controller 112 * 113 * it appears that the higher level code does nothing with LUN's 114 * so I will too. I could plug it in, however so could they 115 * in scsi_scsipi_cmd(). 116 */ 117 void 118 sci_scsipi_request(chan, req, arg) 119 struct scsipi_channel *chan; 120 scsipi_adapter_req_t req; 121 void *arg; 122 { 123 struct scsipi_xfer *xs; 124 struct scsipi_periph *periph; 125 struct sci_softc *dev = (void *)chan->chan_adapter->adapt_dev; 126 int flags, s; 127 128 switch (req) { 129 case ADAPTER_REQ_RUN_XFER: 130 xs = arg; 131 periph = xs->xs_periph; 132 flags = xs->xs_control; 133 134 if (flags & XS_CTL_DATA_UIO) 135 panic("sci: scsi data uio requested"); 136 137 if (dev->sc_xs && flags & XS_CTL_POLL) 138 panic("sci_scsicmd: busy"); 139 140 #ifdef DIAGNOSTIC 141 /* 142 * This should never happen as we track the resources 143 * in the mid-layer. 144 */ 145 if (dev->sc_xs) { 146 scsipi_printaddr(periph); 147 printf("unable to allocate scb\n"); 148 panic("sea_scsipi_request"); 149 } 150 #endif 151 152 dev->sc_xs = xs; 153 splx(s); 154 155 /* 156 * nothing is pending do it now. 157 */ 158 sci_donextcmd(dev); 159 160 return; 161 162 case ADAPTER_REQ_GROW_RESOURCES: 163 return; 164 165 case ADAPTER_REQ_SET_XFER_MODE: 166 return; 167 } 168 } 169 170 /* 171 * entered with dev->sc_xs pointing to the next xfer to perform 172 */ 173 void 174 sci_donextcmd(dev) 175 struct sci_softc *dev; 176 { 177 struct scsipi_xfer *xs; 178 struct scsipi_periph *periph; 179 int flags, phase, stat; 180 181 xs = dev->sc_xs; 182 periph = xs->xs_periph; 183 flags = xs->xs_control; 184 185 if (flags & XS_CTL_DATA_IN) 186 phase = DATA_IN_PHASE; 187 else if (flags & XS_CTL_DATA_OUT) 188 phase = DATA_OUT_PHASE; 189 else 190 phase = STATUS_PHASE; 191 192 if (flags & XS_CTL_RESET) 193 scireset(dev); 194 195 dev->sc_stat[0] = -1; 196 xs->cmd->bytes[0] |= periph->periph_lun << 5; 197 if (phase == STATUS_PHASE || flags & XS_CTL_POLL) 198 stat = sciicmd(dev, periph->periph_target, xs->cmd, xs->cmdlen, 199 xs->data, xs->datalen, phase); 200 else if (scigo(dev, xs) == 0) 201 return; 202 else 203 stat = dev->sc_stat[0]; 204 205 sci_scsidone(dev, stat); 206 } 207 208 void 209 sci_scsidone(dev, stat) 210 struct sci_softc *dev; 211 int stat; 212 { 213 struct scsipi_xfer *xs; 214 215 xs = dev->sc_xs; 216 #ifdef DIAGNOSTIC 217 if (xs == NULL) 218 panic("sci_scsidone"); 219 #endif 220 xs->status = stat; 221 if (stat == 0) 222 xs->resid = 0; 223 else { 224 switch(stat) { 225 case SCSI_CHECK: 226 xs->resid = 0; 227 /* FALLTHOUGH */ 228 case SCSI_BUSY: 229 xs->error = XS_BUSY; 230 break; 231 default: 232 xs->error = XS_DRIVER_STUFFUP; 233 QPRINTF(("sci_scsicmd() bad %x\n", stat)); 234 break; 235 } 236 } 237 238 scsipi_done(xs); 239 240 } 241 242 void 243 sciabort(dev, where) 244 struct sci_softc *dev; 245 char *where; 246 { 247 printf ("%s: abort %s: csr = 0x%02x, bus = 0x%02x\n", 248 dev->sc_dev.dv_xname, where, *dev->sci_csr, *dev->sci_bus_csr); 249 250 if (dev->sc_flags & SCI_SELECTED) { 251 252 /* lets just hope it worked.. */ 253 dev->sc_flags &= ~SCI_SELECTED; 254 /* XXX */ 255 scireset (dev); 256 } 257 } 258 259 /* 260 * XXX Set/reset long delays. 261 * 262 * if delay == 0, reset default delays 263 * if delay < 0, set both delays to default long initialization values 264 * if delay > 0, set both delays to this value 265 * 266 * Used when a devices is expected to respond slowly (e.g. during 267 * initialization). 268 */ 269 void 270 scisetdelay(del) 271 int del; 272 { 273 static int saved_cmd_wait, saved_data_wait; 274 275 if (del) { 276 saved_cmd_wait = sci_cmd_wait; 277 saved_data_wait = sci_data_wait; 278 if (del > 0) 279 sci_cmd_wait = sci_data_wait = del; 280 else 281 sci_cmd_wait = sci_data_wait = sci_init_wait; 282 } else { 283 sci_cmd_wait = saved_cmd_wait; 284 sci_data_wait = saved_data_wait; 285 } 286 } 287 288 void 289 scireset(dev) 290 struct sci_softc *dev; 291 { 292 u_int s; 293 u_char my_id; 294 295 dev->sc_flags &= ~SCI_SELECTED; 296 if (dev->sc_flags & SCI_ALIVE) 297 sciabort(dev, "reset"); 298 299 printf("%s: ", dev->sc_dev.dv_xname); 300 301 s = splbio(); 302 /* preserve our ID for now */ 303 my_id = 7; 304 305 /* 306 * Reset the chip 307 */ 308 *dev->sci_icmd = SCI_ICMD_TEST; 309 *dev->sci_icmd = SCI_ICMD_TEST | SCI_ICMD_RST; 310 delay (25); 311 *dev->sci_icmd = 0; 312 313 /* 314 * Set up various chip parameters 315 */ 316 *dev->sci_icmd = 0; 317 *dev->sci_tcmd = 0; 318 *dev->sci_sel_enb = 0; 319 320 /* anything else was zeroed by reset */ 321 322 splx (s); 323 324 printf("sci id %d\n", my_id); 325 dev->sc_flags |= SCI_ALIVE; 326 } 327 328 void 329 scierror(dev, csr) 330 struct sci_softc *dev; 331 u_char csr; 332 { 333 struct scsipi_xfer *xs; 334 335 xs = dev->sc_xs; 336 337 #ifdef DIAGNOSTIC 338 if (xs == NULL) 339 panic("scierror"); 340 #endif 341 if (xs->xs_control & XS_CTL_SILENT) 342 return; 343 344 printf("%s: ", dev->sc_dev.dv_xname); 345 printf("csr == 0x%02i\n", csr); /* XXX */ 346 } 347 348 /* 349 * select the bus, return when selected or error. 350 */ 351 int 352 sciselectbus(dev, target, our_addr) 353 struct sci_softc *dev; 354 u_char target, our_addr; 355 { 356 register int timeo = 2500; 357 358 QPRINTF (("sciselectbus %d\n", target)); 359 360 /* if we're already selected, return */ 361 if (dev->sc_flags & SCI_SELECTED) /* XXXX */ 362 return 1; 363 364 if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 365 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 366 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL))) 367 return 1; 368 369 *dev->sci_tcmd = 0; 370 *dev->sci_odata = 0x80 + (1 << target); 371 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_SEL; 372 while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) { 373 if (--timeo > 0) { 374 delay(100); 375 } else { 376 break; 377 } 378 } 379 if (timeo) { 380 *dev->sci_icmd = 0; 381 dev->sc_flags |= SCI_SELECTED; 382 return (0); 383 } 384 *dev->sci_icmd = 0; 385 return (1); 386 } 387 388 int 389 sci_ixfer_out(dev, len, buf, phase) 390 register struct sci_softc *dev; 391 int len; 392 register u_char *buf; 393 int phase; 394 { 395 register int wait = sci_data_wait; 396 u_char csr; 397 398 QPRINTF(("sci_ixfer_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 399 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 400 buf[6], buf[7], buf[8], buf[9])); 401 402 *dev->sci_tcmd = phase; 403 *dev->sci_icmd = SCI_ICMD_DATA; 404 for (;len > 0; len--) { 405 csr = *dev->sci_bus_csr; 406 while (!(csr & SCI_BUS_REQ)) { 407 if ((csr & SCI_BUS_BSY) == 0 || --wait < 0) { 408 #ifdef DEBUG 409 if (sci_debug) 410 printf("sci_ixfer_out fail: l%d i%x w%d\n", 411 len, csr, wait); 412 #endif 413 return (len); 414 } 415 delay(1); 416 csr = *dev->sci_bus_csr; 417 } 418 419 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 420 break; 421 *dev->sci_odata = *buf; 422 *dev->sci_icmd = SCI_ICMD_DATA|SCI_ICMD_ACK; 423 buf++; 424 while (*dev->sci_bus_csr & SCI_BUS_REQ); 425 *dev->sci_icmd = SCI_ICMD_DATA; 426 } 427 428 QPRINTF(("sci_ixfer_out done\n")); 429 return (0); 430 } 431 432 void 433 sci_ixfer_in(dev, len, buf, phase) 434 struct sci_softc *dev; 435 int len; 436 register u_char *buf; 437 int phase; 438 { 439 int wait = sci_data_wait; 440 u_char csr; 441 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; 442 volatile register u_char *sci_data = dev->sci_data; 443 volatile register u_char *sci_icmd = dev->sci_icmd; 444 #ifdef DEBUG 445 u_char *obp = buf; 446 #endif 447 448 csr = *sci_bus_csr; 449 450 QPRINTF(("sci_ixfer_in %d, csr=%02x\n", len, csr)); 451 452 *dev->sci_tcmd = phase; 453 *sci_icmd = 0; 454 for (;len > 0; len--) { 455 csr = *sci_bus_csr; 456 while (!(csr & SCI_BUS_REQ)) { 457 if (!(csr & SCI_BUS_BSY) || --wait < 0) { 458 #ifdef DEBUG 459 if (sci_debug) 460 printf("sci_ixfer_in fail: l%d i%x w%d\n", 461 len, csr, wait); 462 #endif 463 return; 464 } 465 466 delay(1); 467 csr = *sci_bus_csr; 468 } 469 470 if (!(*dev->sci_csr & SCI_CSR_PHASE_MATCH)) 471 break; 472 *buf = *sci_data; 473 *sci_icmd = SCI_ICMD_ACK; 474 buf++; 475 while (*sci_bus_csr & SCI_BUS_REQ); 476 *sci_icmd = 0; 477 } 478 479 QPRINTF(("sci_ixfer_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 480 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 481 obp[6], obp[7], obp[8], obp[9])); 482 } 483 484 /* 485 * SCSI 'immediate' command: issue a command to some SCSI device 486 * and get back an 'immediate' response (i.e., do programmed xfer 487 * to get the response data). 'cbuf' is a buffer containing a scsi 488 * command of length clen bytes. 'buf' is a buffer of length 'len' 489 * bytes for data. The transfer direction is determined by the device 490 * (i.e., by the scsi bus data xfer phase). If 'len' is zero, the 491 * command must supply no data. 'xferphase' is the bus phase the 492 * caller expects to happen after the command is issued. It should 493 * be one of DATA_IN_PHASE, DATA_OUT_PHASE or STATUS_PHASE. 494 */ 495 int 496 sciicmd(dev, target, cbuf, clen, buf, len, xferphase) 497 struct sci_softc *dev; 498 void *cbuf, *buf; 499 int clen, len; 500 u_char xferphase; 501 { 502 u_char phase; 503 register int wait; 504 505 /* select the SCSI bus (it's an error if bus isn't free) */ 506 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 507 return -1; 508 /* 509 * Wait for a phase change (or error) then let the device 510 * sequence us through the various SCSI phases. 511 */ 512 dev->sc_stat[0] = 0xff; 513 dev->sc_msg[0] = 0xff; 514 phase = CMD_PHASE; 515 while (1) { 516 wait = sci_cmd_wait; 517 518 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == SCI_BUS_BSY); 519 520 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 521 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 522 return -1; 523 } 524 phase = SCI_PHASE(*dev->sci_bus_csr); 525 526 switch (phase) { 527 case CMD_PHASE: 528 if (sci_ixfer_out (dev, clen, cbuf, phase)) 529 goto abort; 530 phase = xferphase; 531 break; 532 533 case DATA_IN_PHASE: 534 if (len <= 0) 535 goto abort; 536 wait = sci_data_wait; 537 sci_ixfer_in (dev, len, buf, phase); 538 phase = STATUS_PHASE; 539 break; 540 541 case DATA_OUT_PHASE: 542 if (len <= 0) 543 goto abort; 544 wait = sci_data_wait; 545 if (sci_ixfer_out (dev, len, buf, phase)) 546 goto abort; 547 phase = STATUS_PHASE; 548 break; 549 550 case MESG_IN_PHASE: 551 dev->sc_msg[0] = 0xff; 552 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 553 dev->sc_flags &= ~SCI_SELECTED; 554 while (*dev->sci_bus_csr & SCI_BUS_BSY); 555 goto out; 556 break; 557 558 case MESG_OUT_PHASE: 559 phase = STATUS_PHASE; 560 break; 561 562 case STATUS_PHASE: 563 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 564 phase = MESG_IN_PHASE; 565 break; 566 567 case BUS_FREE_PHASE: 568 goto out; 569 570 default: 571 printf("sci: unexpected phase %d in icmd from %d\n", 572 phase, target); 573 goto abort; 574 } 575 #if 0 576 if (wait <= 0) 577 goto abort; 578 #endif 579 } 580 581 abort: 582 sciabort(dev, "icmd"); 583 out: 584 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 585 return (dev->sc_stat[0]); 586 } 587 588 int 589 scigo(dev, xs) 590 struct sci_softc *dev; 591 struct scsipi_xfer *xs; 592 { 593 int count, target; 594 u_char phase, *addr; 595 596 target = xs->xs_periph->periph_target; 597 count = xs->datalen; 598 addr = xs->data; 599 600 if (sci_no_dma) { 601 sciicmd (dev, target, (u_char *) xs->cmd, xs->cmdlen, 602 addr, count, 603 xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE); 604 605 return (1); 606 } 607 608 /* select the SCSI bus (it's an error if bus isn't free) */ 609 if (sciselectbus (dev, target, dev->sc_scsi_addr)) 610 return -1; 611 /* 612 * Wait for a phase change (or error) then let the device 613 * sequence us through the various SCSI phases. 614 */ 615 dev->sc_stat[0] = 0xff; 616 dev->sc_msg[0] = 0xff; 617 phase = CMD_PHASE; 618 while (1) { 619 while ((*dev->sci_bus_csr & (SCI_BUS_REQ|SCI_BUS_BSY)) == 620 SCI_BUS_BSY); 621 622 QPRINTF((">CSR:%02x<", *dev->sci_bus_csr)); 623 if ((*dev->sci_bus_csr & SCI_BUS_REQ) == 0) { 624 goto abort; 625 } 626 phase = SCI_PHASE(*dev->sci_bus_csr); 627 628 switch (phase) { 629 case CMD_PHASE: 630 if (sci_ixfer_out (dev, xs->cmdlen, (u_char *) xs->cmd, phase)) 631 goto abort; 632 phase = xs->xs_control & XS_CTL_DATA_IN ? DATA_IN_PHASE : DATA_OUT_PHASE; 633 break; 634 635 case DATA_IN_PHASE: 636 if (count <= 0) 637 goto abort; 638 /* XXX use psuedo DMA if available */ 639 if (count >= 128 && dev->dma_xfer_in) 640 (*dev->dma_xfer_in)(dev, count, addr, phase); 641 else 642 sci_ixfer_in (dev, count, addr, phase); 643 phase = STATUS_PHASE; 644 break; 645 646 case DATA_OUT_PHASE: 647 if (count <= 0) 648 goto abort; 649 /* XXX use psuedo DMA if available */ 650 if (count >= 128 && dev->dma_xfer_out) 651 (*dev->dma_xfer_out)(dev, count, addr, phase); 652 else 653 if (sci_ixfer_out (dev, count, addr, phase)) 654 goto abort; 655 phase = STATUS_PHASE; 656 break; 657 658 case MESG_IN_PHASE: 659 dev->sc_msg[0] = 0xff; 660 sci_ixfer_in (dev, 1, dev->sc_msg,phase); 661 dev->sc_flags &= ~SCI_SELECTED; 662 while (*dev->sci_bus_csr & SCI_BUS_BSY); 663 goto out; 664 break; 665 666 case MESG_OUT_PHASE: 667 phase = STATUS_PHASE; 668 break; 669 670 case STATUS_PHASE: 671 sci_ixfer_in (dev, 1, dev->sc_stat, phase); 672 phase = MESG_IN_PHASE; 673 break; 674 675 case BUS_FREE_PHASE: 676 goto out; 677 678 default: 679 printf("sci: unexpected phase %d in icmd from %d\n", 680 phase, target); 681 goto abort; 682 } 683 } 684 685 abort: 686 sciabort(dev, "go"); 687 out: 688 QPRINTF(("=STS:%02x=", dev->sc_stat[0])); 689 return (1); 690 } 691