xref: /netbsd-src/sys/arch/amiga/dev/sbicvar.h (revision 2a399c6883d870daece976daec6ffa7bb7f934ce)
1 /*	$NetBSD: sbicvar.h,v 1.12 1997/08/27 11:23:16 bouyer Exp $	*/
2 
3 /*
4  * Copyright (c) 1990 The Regents of the University of California.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * Van Jacobson of Lawrence Berkeley Laboratory.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the University of
21  *	California, Berkeley and its contributors.
22  * 4. Neither the name of the University nor the names of its contributors
23  *    may be used to endorse or promote products derived from this software
24  *    without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  *	@(#)scsivar.h	7.1 (Berkeley) 5/8/90
39  */
40 #ifndef _SBICVAR_H_
41 #define _SBICVAR_H_
42 #include <sys/malloc.h>
43 
44 /*
45  * The largest single request will be MAXPHYS bytes which will require
46  * at most MAXPHYS/NBPG+1 chain elements to describe, i.e. if none of
47  * the buffer pages are physically contiguous (MAXPHYS/NBPG) and the
48  * buffer is not page aligned (+1).
49  */
50 #define	DMAMAXIO	(MAXPHYS/NBPG+1)
51 
52 struct	dma_chain {
53 	int	dc_count;
54 	char	*dc_addr;
55 };
56 
57 /*
58  * ACB. Holds additional information for each SCSI command Comments: We
59  * need a separate scsi command block because we may need to overwrite it
60  * with a request sense command.  Basicly, we refrain from fiddling with
61  * the scsipi_xfer struct (except do the expected updating of return values).
62  * We'll generally update: xs->{flags,resid,error,sense,status} and
63  * occasionally xs->retries.
64  */
65 struct sbic_acb {
66 	TAILQ_ENTRY(sbic_acb) chain;
67 	struct scsipi_xfer *xs;		/* SCSI xfer ctrl block from above */
68 	int		flags;		/* Status */
69 #define ACB_FREE	0x00
70 #define ACB_ACTIVE	0x01
71 #define ACB_DONE	0x04
72 #define ACB_CHKSENSE	0x08
73 #define ACB_BBUF	0x10	/* DMA input needs to be copied from bounce */
74 #define	ACB_DATAIN	0x20	/* DMA direction flag */
75 	struct scsi_generic cmd;	/* SCSI command block */
76 	int	 clen;
77 	struct	dma_chain sc_kv;	/* Virtual address of whole DMA */
78 	struct	dma_chain sc_pa;	/* Physical address of DMA segment */
79 	u_long	sc_tcnt;		/* number of bytes for this DMA */
80 	u_char *sc_dmausrbuf;		/* user buffer kva - for bounce copy */
81 	u_long  sc_dmausrlen;		/* length of bounce copy */
82 	u_short sc_dmacmd;		/* Internal data for this DMA */
83 	char *pa_addr;			/* XXXX initial phys addr */
84 	u_char *sc_usrbufpa;		/* user buffer phys addr */
85 };
86 
87 /*
88  * Some info about each (possible) target on the SCSI bus.  This should
89  * probably have been a "per target+lunit" structure, but we'll leave it at
90  * this for now.  Is there a way to reliably hook it up to sc->fordriver??
91  */
92 struct sbic_tinfo {
93 	int	cmds;		/* #commands processed */
94 	int	dconns;		/* #disconnects */
95 	int	touts;		/* #timeouts */
96 	int	perrs;		/* #parity errors */
97 	int	senses;		/* #request sense commands sent */
98 	u_char*	bounce;		/* Bounce buffer for this device */
99 	ushort	lubusy;		/* What local units/subr. are busy? */
100 	u_char  flags;
101 	u_char  period;		/* Period suggestion */
102 	u_char  offset;		/* Offset suggestion */
103 } tinfo_t;
104 
105 struct	sbic_softc {
106 	struct	device sc_dev;
107 	struct	isr sc_isr;
108 	struct	target_sync {
109 		u_char	state;
110 		u_char	period;
111 		u_char	offset;
112 	} sc_sync[8];
113 	u_char	target;			/* Currently active target */
114 	u_char  lun;
115 	struct	scsipi_link sc_link;	/* proto for sub devices */
116 	sbic_regmap_p	sc_sbicp;	/* the SBIC */
117 	volatile void 	*sc_cregs;	/* driver specific regs */
118 
119 	/* Lists of command blocks */
120 	TAILQ_HEAD(acb_list, sbic_acb) free_list,
121 				       ready_list,
122 				       nexus_list;
123 
124 	struct sbic_acb *sc_nexus;	/* current command */
125 	struct sbic_acb sc_acb[8];	/* the real command blocks */
126 	struct sbic_tinfo sc_tinfo[8];
127 
128 	struct	scsipi_xfer *sc_xs;	/* transfer from high level code */
129 	u_char	sc_flags;
130 	u_char	sc_scsiaddr;
131 	u_char	sc_stat[2];
132 	u_char	sc_msg[7];
133 	u_long	sc_clkfreq;
134 	u_long	sc_tcnt;		/* number of bytes transfered */
135 	u_short sc_dmacmd;		/* used by dma drivers */
136 	u_short	sc_dmatimo;		/* dma timeout */
137 	u_long	sc_dmamask;		/* dma valid mem mask */
138 	struct	dma_chain *sc_cur;
139 	struct	dma_chain *sc_last;
140 	int  (*sc_dmago)	__P((struct sbic_softc *, char *, int, int));
141 	int  (*sc_dmanext)	__P((struct sbic_softc *));
142 	void (*sc_enintr)	__P((struct sbic_softc *));
143 	void (*sc_dmastop)	__P((struct sbic_softc *));
144 	u_short	gtsc_bankmask;		/* GVP specific bank selected */
145 };
146 
147 /* sc_flags */
148 #define	SBICF_ALIVE	0x01	/* controller initialized */
149 #define SBICF_DCFLUSH	0x02	/* need flush for overlap after dma finishes */
150 #define SBICF_SELECTED	0x04	/* bus is in selected state. */
151 #define SBICF_ICMD	0x08	/* Immediate command in execution */
152 #define SBICF_BADDMA	0x10	/* controller can only DMA to ztwobus space */
153 #define	SBICF_INTR	0x40	/* SBICF interrupt expected */
154 #define	SBICF_INDMA	0x80	/* not used yet, DMA I/O in progress */
155 
156 /* sync states */
157 #define SYNC_START	0	/* no sync handshake started */
158 #define SYNC_SENT	1	/* we sent sync request, no answer yet */
159 #define SYNC_DONE	2	/* target accepted our (or inferior) settings,
160 				   or it rejected the request and we stay async */
161 #ifdef DEBUG
162 #define	DDB_FOLLOW	0x04
163 #define DDB_IO		0x08
164 #endif
165 extern u_char sbic_inhibit_sync[8];
166 extern int sbic_no_dma;
167 extern int sbic_clock_override;
168 
169 #define	PHASE		0x07		/* mask for psns/pctl phase */
170 #define	DATA_OUT_PHASE	0x00
171 #define	DATA_IN_PHASE	0x01
172 #define	CMD_PHASE	0x02
173 #define	STATUS_PHASE	0x03
174 #define	BUS_FREE_PHASE	0x04
175 #define	ARB_SEL_PHASE	0x05	/* Fuji chip combines arbitration with sel. */
176 #define	MESG_OUT_PHASE	0x06
177 #define	MESG_IN_PHASE	0x07
178 
179 #define	MSG_CMD_COMPLETE	0x00
180 #define MSG_EXT_MESSAGE		0x01
181 #define	MSG_SAVE_DATA_PTR	0x02
182 #define	MSG_RESTORE_PTR		0x03
183 #define	MSG_DISCONNECT		0x04
184 #define	MSG_INIT_DETECT_ERROR	0x05
185 #define	MSG_ABORT		0x06
186 #define	MSG_REJECT		0x07
187 #define	MSG_NOOP		0x08
188 #define	MSG_PARITY_ERROR	0x09
189 #define	MSG_BUS_DEVICE_RESET	0x0C
190 #define	MSG_IDENTIFY		0x80
191 #define	MSG_IDENTIFY_DR		0xc0	/* (disconnect/reconnect allowed) */
192 #define	MSG_SYNC_REQ 		0x01
193 
194 #define MSG_ISIDENTIFY(x) (x&MSG_IDENTIFY)
195 #define IFY_TRN		0x20
196 #define IFY_LUNTRN(x)	(x&0x07)
197 #define IFY_LUN(x)	(!(x&0x20))
198 
199 /* Check if high bit set */
200 
201 #define	STS_CHECKCOND	0x02	/* Check Condition (ie., read sense) */
202 #define	STS_CONDMET	0x04	/* Condition Met (ie., search worked) */
203 #define	STS_BUSY	0x08
204 #define	STS_INTERMED	0x10	/* Intermediate status sent */
205 #define	STS_EXT		0x80	/* Extended status valid */
206 
207 
208 /* States returned by our state machine */
209 
210 #define SBIC_STATE_ERROR	-1
211 #define SBIC_STATE_DONE		0
212 #define SBIC_STATE_RUNNING	1
213 #define SBIC_STATE_DISCONNECT	2
214 
215 /*
216  * XXXX
217  */
218 struct scsi_fmt_cdb {
219 	int len;		/* cdb length (in bytes) */
220 	u_char cdb[28];		/* cdb to use on next read/write */
221 };
222 
223 struct buf;
224 struct scsipi_xfer;
225 
226 void sbic_minphys __P((struct buf *bp));
227 int sbic_scsicmd __P((struct scsipi_xfer *));
228 void sbicinit __P((struct sbic_softc *));
229 int  sbicintr __P((struct sbic_softc *));
230 #ifdef DEBUG
231 void sbic_dump __P((struct sbic_softc *dev));
232 #endif
233 
234 #endif /* _SBICVAR_H_ */
235