xref: /netbsd-src/sys/arch/amiga/dev/mfc.c (revision 2a399c6883d870daece976daec6ffa7bb7f934ce)
1 /*	$NetBSD: mfc.c,v 1.18 1996/12/23 09:10:23 veego Exp $ */
2 
3 /*
4  * Copyright (c) 1994 Michael L. Hitch
5  * Copyright (c) 1982, 1990 The Regents of the University of California.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by the University of
19  *	California, Berkeley and its contributors.
20  * 4. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  */
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/device.h>
41 #include <sys/tty.h>
42 #include <sys/proc.h>
43 #include <sys/file.h>
44 #include <sys/malloc.h>
45 #include <sys/uio.h>
46 #include <sys/kernel.h>
47 #include <sys/syslog.h>
48 #include <sys/queue.h>
49 #include <machine/cpu.h>
50 #include <amiga/amiga/device.h>
51 #include <amiga/amiga/isr.h>
52 #include <amiga/amiga/custom.h>
53 #include <amiga/amiga/cia.h>
54 #include <amiga/amiga/cc.h>
55 #include <amiga/dev/zbusvar.h>
56 
57 #include <dev/cons.h>
58 
59 #include <sys/conf.h>
60 #include <machine/conf.h>
61 
62 #include "mfcs.h"
63 
64 #ifndef SEROBUF_SIZE
65 #define SEROBUF_SIZE	128
66 #endif
67 #ifndef SERIBUF_SIZE
68 #define SERIBUF_SIZE	1024
69 #endif
70 
71 #define splser()	spl6()
72 
73 /*
74  * 68581 DUART registers
75  */
76 struct mfc_regs {
77 	volatile u_char du_mr1a;
78 #define	du_mr2a		du_mr1a
79 	u_char pad0;
80 	volatile u_char du_csra;
81 #define	du_sra		du_csra
82 	u_char pad2;
83 	volatile u_char du_cra;
84 	u_char pad4;
85 	volatile u_char du_tba;
86 #define	du_rba		du_tba
87 	u_char pad6;
88 	volatile u_char du_acr;
89 #define	du_ipcr		du_acr
90 	u_char pad8;
91 	volatile u_char du_imr;
92 #define	du_isr		du_imr
93 	u_char pad10;
94 	volatile u_char du_ctur;
95 #define	du_cmsb		du_ctur
96 	u_char pad12;
97 	volatile u_char du_ctlr;
98 #define	du_clsb		du_ctlr
99 	u_char pad14;
100 	volatile u_char du_mr1b;
101 #define	du_mr2b		du_mr1b
102 	u_char pad16;
103 	volatile u_char du_csrb;
104 #define	du_srb		du_csrb
105 	u_char pad18;
106 	volatile u_char du_crb;
107 	u_char pad20;
108 	volatile u_char du_tbb;
109 #define	du_rbb		du_tbb
110 	u_char pad22;
111 	volatile u_char du_ivr;
112 	u_char pad24;
113 	volatile u_char du_opcr;
114 #define	du_ip		du_opcr
115 	u_char pad26;
116 	volatile u_char du_btst;
117 #define	du_strc		du_btst
118 	u_char pad28;
119 	volatile u_char du_btrst;
120 #define	du_stpc		du_btrst
121 	u_char pad30;
122 };
123 
124 /*
125  * 68681 DUART serial port registers
126  */
127 struct duart_regs {
128 	volatile u_char ch_mr1;
129 #define	ch_mr2		ch_mr1
130 	u_char pad0;
131 	volatile u_char	ch_csr;
132 #define	ch_sr		ch_csr
133 	u_char pad1;
134 	volatile u_char	ch_cr;
135 	u_char pad2;
136 	volatile u_char	ch_tb;
137 #define	ch_rb		ch_tb
138 	u_char pad3;
139 };
140 
141 struct mfc_softc {
142 	struct	device sc_dev;
143 	struct	isr sc_isr;
144 	struct	mfc_regs *sc_regs;
145 	u_long	clk_frq;
146 	u_short	ct_val;
147 	u_char	ct_usecnt;
148 	u_char	imask;
149 	u_char	mfc_iii;
150 	u_char	last_ip;
151 };
152 
153 #if NMFCS > 0
154 struct mfcs_softc {
155 	struct	device sc_dev;
156 	struct	tty *sc_tty;
157 	struct	duart_regs *sc_duart;
158 	struct	mfc_regs *sc_regs;
159 	struct	mfc_softc *sc_mfc;
160 	int	swflags;
161 	long	flags;			/* XXX */
162 #define CT_USED	1			/* CT in use */
163 	u_short	*rptr, *wptr, incnt, ovfl;
164 	u_short	inbuf[SERIBUF_SIZE];
165 	char	*ptr, *end;
166 	char	outbuf[SEROBUF_SIZE];
167 	struct vbl_node vbl_node;
168 };
169 #endif
170 
171 #if NMFCP > 0
172 struct mfcp_softc {
173 };
174 #endif
175 
176 struct mfc_args {
177 	struct zbus_args zargs;
178 	char	*subdev;
179 	char	unit;
180 };
181 
182 int	mfcprint __P((void *auxp, const char *));
183 void	mfcattach __P((struct device *, struct device *, void *));
184 int	mfcmatch __P((struct device *, struct cfdata *, void *));
185 
186 #if NMFCS > 0
187 int	mfcsmatch __P((struct device *, struct cfdata *, void *));
188 void	mfcsattach __P((struct device *, struct device *, void *));
189 int	mfcsparam __P(( struct tty *, struct termios *));
190 int	mfcshwiflow __P((struct tty *, int));
191 void	mfcsstart __P((struct tty *));
192 int	mfcsmctl __P((dev_t, int, int));
193 void	mfcsxintr __P((int));
194 void	mfcseint __P((int, int));
195 void	mfcsmint __P((register int));
196 #endif
197 
198 #if NMFCP > 0
199 void mfcpattach __P((struct device *, struct device *, void *));
200 int mfcpmatch __P((struct device *, struct cfdata *, void *));
201 #endif
202 int mfcintr __P((void *));
203 
204 struct cfattach mfc_ca = {
205 	sizeof(struct mfc_softc), mfcmatch, mfcattach
206 };
207 
208 struct cfdriver mfc_cd = {
209 	NULL, "mfc", DV_DULL, NULL, 0
210 };
211 
212 #if NMFCS > 0
213 struct cfattach mfcs_ca = {
214 	sizeof(struct mfcs_softc), mfcsmatch, mfcsattach
215 };
216 
217 struct cfdriver mfcs_cd = {
218 	NULL, "mfcs", DV_TTY, NULL, 0
219 };
220 #endif
221 
222 #if NMFCP > 0
223 struct cfattach mfcp_ca = {
224 	sizeof(struct mfcp_softc, mfcpmatch, mfcpattach
225 };
226 
227 struct cfdriver mfcp_cd = {
228 	NULL, "mfcp", DV_DULL, NULL, 0
229 };
230 #endif
231 
232 
233 int	mfcs_active;
234 int	mfcsdefaultrate = 38400 /*TTYDEF_SPEED*/;
235 #define SWFLAGS(dev) (sc->swflags | (((dev) & 0x80) == 0 ? TIOCFLAG_SOFTCAR : 0))
236 
237 #ifdef notyet
238 /*
239  * MultiFaceCard III, II+ (not supported yet), and
240  * SerialMaster 500+ (not supported yet)
241  * baud rate tables for BRG set 1 [not used yet]
242  */
243 
244 struct speedtab mfcs3speedtab1[] = {
245 	{ 0,		0	},
246 	{ 100,		0x00	},
247 	{ 220,		0x11	},
248 	{ 600,		0x44	},
249 	{ 1200,		0x55	},
250 	{ 2400,		0x66	},
251 	{ 4800,		0x88	},
252 	{ 9600,		0x99	},
253 	{ 19200,	0xbb	},
254 	{ 115200,	0xcc	},
255 	{ -1,		-1	}
256 };
257 
258 /*
259  * MultiFaceCard II, I, and SerialMaster 500
260  * baud rate tables for BRG set 1 [not used yet]
261  */
262 
263 struct speedtab mfcs2speedtab1[] = {
264 	{ 0,		0	},
265 	{ 50,		0x00	},
266 	{ 110,		0x11	},
267 	{ 300,		0x44	},
268 	{ 600,		0x55	},
269 	{ 1200,		0x66	},
270 	{ 2400,		0x88	},
271  	{ 4800,		0x99	},
272 	{ 9600,		0xbb	},
273 	{ 38400,	0xcc	},
274 	{ -1,		-1	}
275 };
276 #endif
277 
278 /*
279  * MultiFaceCard III, II+ (not supported yet), and
280  * SerialMaster 500+ (not supported yet)
281  * baud rate tables for BRG set 2
282  */
283 
284 struct speedtab mfcs3speedtab2[] = {
285 	{ 0,		0	},
286 	{ 150,		0x00	},
287 	{ 200,		0x11	},
288 	{ 300,		0x33	},
289 	{ 600,		0x44	},
290 	{ 1200,		0x55	},
291 	{ 2400,		0x66	},
292 	{ 4800,		0x88	},
293 	{ 9600,		0x99	},
294 	{ 19200,	0xbb	},
295 	{ 38400,	0xcc	},
296 	{ -1,		-1	}
297 };
298 
299 /*
300  * MultiFaceCard II, I, and SerialMaster 500
301  * baud rate tables for BRG set 2
302  */
303 
304 struct speedtab mfcs2speedtab2[] = {
305 	{ 0,		0	},
306 	{ 75,		0x00	},
307 	{ 100,		0x11	},
308 	{ 150,		0x33	},
309 	{ 300,		0x44	},
310 	{ 600,		0x55	},
311 	{ 1200,		0x66	},
312 	{ 2400,		0x88	},
313  	{ 4800,		0x99	},
314 	{ 9600,		0xbb	},
315 	{ 19200,	0xcc	},
316 	{ -1,		-1	}
317 };
318 
319 /*
320  * if we are an bsc/Alf Data MultFaceCard (I, II, and III)
321  */
322 int
323 mfcmatch(pdp, cfp, auxp)
324 	struct device *pdp;
325 	struct cfdata *cfp;
326 	void *auxp;
327 {
328 	struct zbus_args *zap;
329 
330 	zap = auxp;
331 	if (zap->manid == 2092 &&
332 	    (zap->prodid == 16 || zap->prodid == 17 || zap->prodid == 18))
333 
334 		return(1);
335 	return(0);
336 }
337 
338 void
339 mfcattach(pdp, dp, auxp)
340 	struct device *pdp, *dp;
341 	void *auxp;
342 {
343 	struct mfc_softc *scc;
344 	struct zbus_args *zap;
345 	struct mfc_args ma;
346 	int unit;
347 	struct mfc_regs *rp;
348 
349 	zap = auxp;
350 
351 	printf ("\n");
352 
353 	scc = (struct mfc_softc *)dp;
354 	unit = scc->sc_dev.dv_unit;
355 	scc->sc_regs = rp = zap->va;
356 	if (zap->prodid == 18)
357 		scc->mfc_iii = 3;
358 	scc->clk_frq = scc->mfc_iii ? 230400 : 115200;
359 
360 	rp->du_opcr = 0x00;		/* configure output port? */
361 	rp->du_btrst = 0x0f;		/* clear modem lines */
362 	rp->du_ivr = 0;			/* IVR */
363 	rp->du_imr = 0;			/* IMR */
364 	rp->du_acr = 0xe0;		/* baud rate generate set 2 */
365 	rp->du_ctur = 0;
366 	rp->du_ctlr = 4;
367 	rp->du_csra = 0xcc;		/* clock select = 38400 */
368 	rp->du_cra = 0x10;		/* reset mode register ptr */
369 	rp->du_cra = 0x20;
370 	rp->du_cra = 0x30;
371 	rp->du_cra = 0x40;
372 	rp->du_mr1a = 0x93;		/* MRA1 */
373 	rp->du_mr2a = 0x17;		/* MRA2 */
374 	rp->du_csrb = 0xcc;		/* clock select = 38400 */
375 	rp->du_crb = 0x10;		/* reset mode register ptr */
376 	rp->du_crb = 0x20;
377 	rp->du_crb = 0x30;
378 	rp->du_crb = 0x40;
379 	rp->du_mr1b = 0x93;		/* MRB1 */
380 	rp->du_mr2b = 0x17;		/* MRB2 */
381 	rp->du_cra = 0x05;		/* enable A Rx & Tx */
382 	rp->du_crb = 0x05;		/* enable B Rx & Tx */
383 
384 	scc->sc_isr.isr_intr = mfcintr;
385 	scc->sc_isr.isr_arg = scc;
386 	scc->sc_isr.isr_ipl = 6;
387 	add_isr(&scc->sc_isr);
388 
389 	/* configure ports */
390 	bcopy(zap, &ma.zargs, sizeof(struct zbus_args));
391 	ma.subdev = "mfcs";
392 	ma.unit = unit * 2;
393 	config_found(dp, &ma, mfcprint);
394 	ma.unit = unit * 2 + 1;
395 	config_found(dp, &ma, mfcprint);
396 	ma.subdev = "mfcp";
397 	ma.unit = unit;
398 	config_found(dp, &ma, mfcprint);
399 }
400 
401 /*
402  *
403  */
404 int
405 mfcsmatch(pdp, cfp, auxp)
406 	struct device *pdp;
407 	struct cfdata *cfp;
408 	void *auxp;
409 {
410 	struct mfc_args *ma;
411 
412 	ma = auxp;
413 	if (strcmp(ma->subdev, "mfcs") == 0)
414 		return (1);
415 	return (0);
416 }
417 
418 void
419 mfcsattach(pdp, dp, auxp)
420 	struct device *pdp, *dp;
421 	void *auxp;
422 {
423 	int unit;
424 	struct mfcs_softc *sc;
425 	struct mfc_softc *scc;
426 	struct mfc_args *ma;
427 	struct mfc_regs *rp;
428 
429 	sc = (struct mfcs_softc *) dp;
430 	scc = (struct mfc_softc *) pdp;
431 	ma = auxp;
432 
433 	if (dp) {
434 		printf (": input fifo %d output fifo %d\n", SERIBUF_SIZE,
435 		    SEROBUF_SIZE);
436 		alloc_sicallback();
437 	}
438 
439 	unit = ma->unit;
440 	mfcs_active |= 1 << unit;
441 	sc->rptr = sc->wptr = sc->inbuf;
442 	sc->sc_mfc = scc;
443 	sc->sc_regs = rp = scc->sc_regs;
444 	sc->sc_duart = (struct duart_regs *) ((unit & 1) ? &rp->du_mr1b :
445 	    &rp->du_mr1a);
446 	/*
447 	 * should have only one vbl routine to handle all ports?
448 	 */
449 	sc->vbl_node.function = (void (*) (void *)) mfcsmint;
450 	sc->vbl_node.data = (void *) unit;
451 	add_vbl_function(&sc->vbl_node, 1, (void *) unit);
452 }
453 
454 /*
455  * print diag if pnp is NULL else just extra
456  */
457 int
458 mfcprint(auxp, pnp)
459 	void *auxp;
460 	const char *pnp;
461 {
462 	if (pnp == NULL)
463 		return(UNCONF);
464 	return(QUIET);
465 }
466 
467 int
468 mfcsopen(dev, flag, mode, p)
469 	dev_t dev;
470 	int flag, mode;
471 	struct proc *p;
472 {
473 	struct tty *tp;
474 	struct mfcs_softc *sc;
475 	int unit, error, s;
476 
477 	error = 0;
478 	unit = dev & 0x1f;
479 
480 	if (unit >= mfcs_cd.cd_ndevs || (mfcs_active & (1 << unit)) == 0)
481 		return (ENXIO);
482 	sc = mfcs_cd.cd_devs[unit];
483 
484 	s = spltty();
485 
486 	if (sc->sc_tty)
487 		tp = sc->sc_tty;
488 	else {
489 		tp = sc->sc_tty = ttymalloc();
490 		tty_attach(tp);
491 	}
492 
493 	tp->t_oproc = (void (*) (struct tty *)) mfcsstart;
494 	tp->t_param = mfcsparam;
495 	tp->t_dev = dev;
496 	tp->t_hwiflow = mfcshwiflow;
497 
498 	if ((tp->t_state & TS_ISOPEN) == 0) {
499 		tp->t_state |= TS_WOPEN;
500 		ttychars(tp);
501 		if (tp->t_ispeed == 0) {
502 			/*
503 			 * only when cleared do we reset to defaults.
504 			 */
505 			tp->t_iflag = TTYDEF_IFLAG;
506 			tp->t_oflag = TTYDEF_OFLAG;
507 			tp->t_cflag = TTYDEF_CFLAG;
508 			tp->t_lflag = TTYDEF_LFLAG;
509 			tp->t_ispeed = tp->t_ospeed = mfcsdefaultrate;
510 		}
511 		/*
512 		 * do these all the time
513 		 */
514 		if (sc->swflags & TIOCFLAG_CLOCAL)
515 			tp->t_cflag |= CLOCAL;
516 		if (sc->swflags & TIOCFLAG_CRTSCTS)
517 			tp->t_cflag |= CRTSCTS;
518 		if (sc->swflags & TIOCFLAG_MDMBUF)
519 			tp->t_cflag |= MDMBUF;
520 		mfcsparam(tp, &tp->t_termios);
521 		ttsetwater(tp);
522 
523 		(void)mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMSET);
524 		if ((SWFLAGS(dev) & TIOCFLAG_SOFTCAR) ||
525 		    (mfcsmctl(dev, 0, DMGET) & TIOCM_CD))
526 			tp->t_state |= TS_CARR_ON;
527 		else
528 			tp->t_state &= ~TS_CARR_ON;
529 	} else if (tp->t_state & TS_XCLUDE && p->p_ucred->cr_uid != 0) {
530 		splx(s);
531 		return(EBUSY);
532 	}
533 
534 	/*
535 	 * if NONBLOCK requested, ignore carrier
536 	 */
537 	if (flag & O_NONBLOCK)
538 		goto done;
539 
540 	/*
541 	 * block waiting for carrier
542 	 */
543 	while ((tp->t_state & TS_CARR_ON) == 0 && (tp->t_cflag & CLOCAL) == 0) {
544 		tp->t_state |= TS_WOPEN;
545 		error = ttysleep(tp, (caddr_t)&tp->t_rawq,
546 		    TTIPRI | PCATCH, ttopen, 0);
547 		if (error) {
548 			splx(s);
549 			return(error);
550 		}
551 	}
552 done:
553 	/* This is a way to handle lost XON characters */
554 	if ((flag & O_TRUNC) && (tp->t_state & TS_TTSTOP)) {
555 		tp->t_state &= ~TS_TTSTOP;
556 	        ttstart (tp);
557 	}
558 
559 	splx(s);
560 	/*
561 	 * Reset the tty pointer, as there could have been a dialout
562 	 * use of the tty with a dialin open waiting.
563 	 */
564 	tp->t_dev = dev;
565 	return((*linesw[tp->t_line].l_open)(dev, tp));
566 }
567 
568 /*ARGSUSED*/
569 int
570 mfcsclose(dev, flag, mode, p)
571 	dev_t dev;
572 	int flag, mode;
573 	struct proc *p;
574 {
575 	struct tty *tp;
576 	int unit;
577 	struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
578 	struct mfc_softc *scc= sc->sc_mfc;
579 
580 	unit = dev & 31;
581 
582 	tp = sc->sc_tty;
583 	(*linesw[tp->t_line].l_close)(tp, flag);
584 	sc->sc_duart->ch_cr = 0x70;			/* stop break */
585 
586 	scc->imask &= ~(0x7 << ((unit & 1) * 4));
587 	scc->sc_regs->du_imr = scc->imask;
588 	if (sc->flags & CT_USED) {
589 		--scc->ct_usecnt;
590 		sc->flags &= ~CT_USED;
591 	}
592 
593 	/*
594 	 * If the device is closed, it's close, no matter whether we deal with
595 	 * modem control signals nor not.
596 	 */
597 #if 0
598 	if (tp->t_cflag & HUPCL || tp->t_state & TS_WOPEN ||
599 	    (tp->t_state & TS_ISOPEN) == 0)
600 #endif
601 		(void) mfcsmctl(dev, 0, DMSET);
602 	ttyclose(tp);
603 #if not_yet
604 	if (tp != &mfcs_cons) {
605 		remove_vbl_function(&sc->vbl_node);
606 		ttyfree(tp);
607 		sc->sc_tty = (struct tty *) NULL;
608 	}
609 #endif
610 	return (0);
611 }
612 
613 int
614 mfcsread(dev, uio, flag)
615 	dev_t dev;
616 	struct uio *uio;
617 	int flag;
618 {
619 	struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
620 	struct tty *tp = sc->sc_tty;
621 	if (tp == NULL)
622 		return(ENXIO);
623 	return((*linesw[tp->t_line].l_read)(tp, uio, flag));
624 }
625 
626 int
627 mfcswrite(dev, uio, flag)
628 	dev_t dev;
629 	struct uio *uio;
630 	int flag;
631 {
632 	struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
633 	struct tty *tp = sc->sc_tty;
634 
635 	if (tp == NULL)
636 		return(ENXIO);
637 	return((*linesw[tp->t_line].l_write)(tp, uio, flag));
638 }
639 
640 struct tty *
641 mfcstty(dev)
642 	dev_t dev;
643 {
644 	struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
645 
646 	return (sc->sc_tty);
647 }
648 
649 int
650 mfcsioctl(dev, cmd, data, flag, p)
651 	dev_t	dev;
652 	u_long	cmd;
653 	caddr_t data;
654 	int	flag;
655 	struct proc *p;
656 {
657 	register struct tty *tp;
658 	register int error;
659 	struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
660 
661 	tp = sc->sc_tty;
662 	if (!tp)
663 		return ENXIO;
664 
665 	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
666 	if (error >= 0)
667 		return(error);
668 
669 	error = ttioctl(tp, cmd, data, flag, p);
670 	if (error >= 0)
671 		return(error);
672 
673 	switch (cmd) {
674 	case TIOCSBRK:
675 		sc->sc_duart->ch_cr = 0x60;		/* start break */
676 		break;
677 
678 	case TIOCCBRK:
679 		sc->sc_duart->ch_cr = 0x70;		/* stop break */
680 		break;
681 
682 	case TIOCSDTR:
683 		(void) mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMBIS);
684 		break;
685 
686 	case TIOCCDTR:
687 		(void) mfcsmctl(dev, TIOCM_DTR | TIOCM_RTS, DMBIC);
688 		break;
689 
690 	case TIOCMSET:
691 		(void) mfcsmctl(dev, *(int *) data, DMSET);
692 		break;
693 
694 	case TIOCMBIS:
695 		(void) mfcsmctl(dev, *(int *) data, DMBIS);
696 		break;
697 
698 	case TIOCMBIC:
699 		(void) mfcsmctl(dev, *(int *) data, DMBIC);
700 		break;
701 
702 	case TIOCMGET:
703 		*(int *)data = mfcsmctl(dev, 0, DMGET);
704 		break;
705 	case TIOCGFLAGS:
706 		*(int *)data = SWFLAGS(dev);
707 		break;
708 	case TIOCSFLAGS:
709 		error = suser(p->p_ucred, &p->p_acflag);
710 		if (error != 0)
711 			return(EPERM);
712 
713 		sc->swflags = *(int *)data;
714                 sc->swflags &= /* only allow valid flags */
715                   (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | TIOCFLAG_CRTSCTS);
716 		/* XXXX need to change duart parameters? */
717 		break;
718 	default:
719 		return(ENOTTY);
720 	}
721 
722 	return(0);
723 }
724 
725 int
726 mfcsparam(tp, t)
727 	struct tty *tp;
728 	struct termios *t;
729 {
730 	int cflag, unit, ospeed;
731 	struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
732 	struct mfc_softc *scc= sc->sc_mfc;
733 
734 	cflag = t->c_cflag;
735 	unit = tp->t_dev & 31;
736 	if (sc->flags & CT_USED) {
737 		--scc->ct_usecnt;
738 		sc->flags &= ~CT_USED;
739 	}
740 	ospeed = ttspeedtab(t->c_ospeed, scc->mfc_iii ? mfcs3speedtab2 :
741 	    mfcs2speedtab2);
742 
743 	/*
744 	 * If Baud Rate Generator can't generate requested speed,
745 	 * try to use the counter/timer.
746 	 */
747 	if (ospeed < 0 && (scc->clk_frq % t->c_ospeed) == 0) {
748 		ospeed = scc->clk_frq / t->c_ospeed;	/* divisor */
749 		if (scc->ct_usecnt > 0 && scc->ct_val != ospeed)
750 			ospeed = -1;
751 		else {
752 			scc->sc_regs->du_ctur = ospeed >> 8;
753 			scc->sc_regs->du_ctlr = ospeed;
754 			scc->ct_val = ospeed;
755 			++scc->ct_usecnt;
756 			sc->flags |= CT_USED;
757 			ospeed = 0xdd;
758 		}
759 	}
760 	/* XXXX 68681 duart could handle split speeds */
761 	if (ospeed < 0 || (t->c_ispeed && t->c_ispeed != t->c_ospeed))
762 		return(EINVAL);
763 
764 	/* XXXX handle parity, character size, stop bits, flow control */
765 
766 	/*
767 	 * copy to tty
768 	 */
769 	tp->t_ispeed = t->c_ispeed;
770 	tp->t_ospeed = t->c_ospeed;
771 	tp->t_cflag = cflag;
772 
773 	/*
774 	 * enable interrupts
775 	 */
776 	scc->imask |= (0x2 << ((unit & 1) * 4)) | 0x80;
777 	scc->sc_regs->du_imr = scc->imask;
778 #if defined(DEBUG) && 0
779 	printf("mfcsparam: speed %d => %x ct %d imask %x cflag %x\n",
780 	    t->c_ospeed, ospeed, scc->ct_val, scc->imask, cflag);
781 #endif
782 	if (ospeed == 0)
783 		(void)mfcsmctl(tp->t_dev, 0, DMSET);	/* hang up line */
784 	else {
785 		/*
786 		 * (re)enable DTR
787 		 * and set baud rate. (8 bit mode)
788 		 */
789 		(void)mfcsmctl(tp->t_dev, TIOCM_DTR | TIOCM_RTS, DMSET);
790 		sc->sc_duart->ch_csr = ospeed;
791 	}
792 	return(0);
793 }
794 
795 int
796 mfcshwiflow(tp, flag)
797         struct tty *tp;
798         int flag;
799 {
800 	struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
801 	int unit = tp->t_dev & 1;
802 
803         if (flag)
804 		sc->sc_regs->du_btrst = 1 << unit;
805 	else
806 		sc->sc_regs->du_btst = 1 << unit;
807         return 1;
808 }
809 
810 void
811 mfcsstart(tp)
812 	struct tty *tp;
813 {
814 	int cc, s, unit;
815 	struct mfcs_softc *sc = mfcs_cd.cd_devs[tp->t_dev & 31];
816 	struct mfc_softc *scc= sc->sc_mfc;
817 
818 	if ((tp->t_state & TS_ISOPEN) == 0)
819 		return;
820 
821 	unit = tp->t_dev & 1;
822 
823 	s = splser();
824 	if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP))
825 		goto out;
826 
827 	cc = tp->t_outq.c_cc;
828 	if (cc <= tp->t_lowat) {
829 		if (tp->t_state & TS_ASLEEP) {
830 			tp->t_state &= ~TS_ASLEEP;
831 			wakeup((caddr_t) & tp->t_outq);
832 		}
833 		selwakeup(&tp->t_wsel);
834 	}
835 	if (cc == 0 || (tp->t_state & TS_BUSY))
836 		goto out;
837 
838 	/*
839 	 * We only do bulk transfers if using CTSRTS flow control, not for
840 	 * (probably sloooow) ixon/ixoff devices.
841 	 */
842 	if ((tp->t_cflag & CRTSCTS) == 0)
843 		cc = 1;
844 
845 	/*
846 	 * Limit the amount of output we do in one burst
847 	 * to prevent hogging the CPU.
848 	 */
849 	if (cc > SEROBUF_SIZE)
850 		cc = SEROBUF_SIZE;
851 	cc = q_to_b(&tp->t_outq, sc->outbuf, cc);
852 	if (cc > 0) {
853 		tp->t_state |= TS_BUSY;
854 
855 		sc->ptr = sc->outbuf;
856 		sc->end = sc->outbuf + cc;
857 
858 		/*
859 		 * Get first character out, then have TBE-interrupts blow out
860 		 * further characters, until buffer is empty, and TS_BUSY gets
861 		 * cleared.
862 		 */
863 		sc->sc_duart->ch_tb = *sc->ptr++;
864 		scc->imask |= 1 << (unit * 4);
865 		sc->sc_regs->du_imr = scc->imask;
866 	}
867 out:
868 	splx(s);
869 }
870 
871 /*
872  * Stop output on a line.
873  */
874 /*ARGSUSED*/
875 void
876 mfcsstop(tp, flag)
877 	struct tty *tp;
878 	int flag;
879 {
880 	int s;
881 
882 	s = splser();
883 	if (tp->t_state & TS_BUSY) {
884 		if ((tp->t_state & TS_TTSTOP) == 0)
885 			tp->t_state |= TS_FLUSH;
886 	}
887 	splx(s);
888 }
889 
890 int
891 mfcsmctl(dev, bits, how)
892 	dev_t dev;
893 	int bits, how;
894 {
895 	int unit, s;
896 	u_char ub = 0;
897 	struct mfcs_softc *sc = mfcs_cd.cd_devs[dev & 31];
898 
899 	unit = dev & 1;
900 
901 	/*
902 	 * convert TIOCM* mask into CIA mask
903 	 * which is active low
904 	 */
905 	if (how != DMGET) {
906 		/*
907 		 * need to save current state of DTR & RTS ?
908 		 */
909 		if (bits & TIOCM_DTR)
910 			ub |= 0x04 << unit;
911 		if (bits & TIOCM_RTS)
912 			ub |= 0x01 << unit;
913 	}
914 	s = splser();
915 	switch (how) {
916 	case DMSET:
917 		sc->sc_regs->du_btst = ub;
918 		sc->sc_regs->du_btrst = ub ^ (0x05 << unit);
919 		break;
920 
921 	case DMBIC:
922 		sc->sc_regs->du_btrst = ub;
923 		ub = ~sc->sc_regs->du_ip;
924 		break;
925 
926 	case DMBIS:
927 		sc->sc_regs->du_btst = ub;
928 		ub = ~sc->sc_regs->du_ip;
929 		break;
930 
931 	case DMGET:
932 		ub = ~sc->sc_regs->du_ip;
933 		break;
934 	}
935 	(void)splx(s);
936 
937 	/* XXXX should keep DTR & RTS states in softc? */
938 	bits = TIOCM_DTR | TIOCM_RTS;
939 	if (ub & (1 << unit))
940 		bits |= TIOCM_CTS;
941 	if (ub & (4 << unit))
942 		bits |= TIOCM_DSR;
943 	if (ub & (0x10 << unit))
944 		bits |= TIOCM_CD;
945 	/* XXXX RI is not supported on all boards */
946 	if (sc->sc_regs->pad26 & (1 << unit))
947 		bits |= TIOCM_RI;
948 
949 	return(bits);
950 }
951 
952 /*
953  * Level 6 interrupt processing for the MultiFaceCard 68681 DUART
954  */
955 
956 int
957 mfcintr(arg)
958 	void *arg;
959 {
960 	struct mfc_softc *scc = arg;
961 	struct mfcs_softc *sc;
962 	struct mfc_regs *regs;
963 	struct tty *tp;
964 	int istat, unit;
965 	u_short c;
966 
967 	regs = scc->sc_regs;
968 	istat = regs->du_isr & scc->imask;
969 	if (istat == 0)
970 		return (0);
971 	unit = scc->sc_dev.dv_unit * 2;
972 	if (istat & 0x02) {		/* channel A receive interrupt */
973 		sc = mfcs_cd.cd_devs[unit];
974 		while (1) {
975 			c = regs->du_sra << 8;
976 			if ((c & 0x0100) == 0)
977 				break;
978 			c |= regs->du_rba;
979 			if (sc->incnt == SERIBUF_SIZE)
980 				++sc->ovfl;
981 			else {
982 				*sc->wptr++ = c;
983 				if (sc->wptr == sc->inbuf + SERIBUF_SIZE)
984 					sc->wptr = sc->inbuf;
985 				++sc->incnt;
986 				if (sc->incnt > SERIBUF_SIZE - 16)
987 					regs->du_btrst = 1;
988 			}
989 			if (c & 0x1000)
990 				regs->du_cra = 0x40;
991 		}
992 	}
993 	if (istat & 0x20) {		/* channel B receive interrupt */
994 		sc = mfcs_cd.cd_devs[unit + 1];
995 		while (1) {
996 			c = regs->du_srb << 8;
997 			if ((c & 0x0100) == 0)
998 				break;
999 			c |= regs->du_rbb;
1000 			if (sc->incnt == SERIBUF_SIZE)
1001 				++sc->ovfl;
1002 			else {
1003 				*sc->wptr++ = c;
1004 				if (sc->wptr == sc->inbuf + SERIBUF_SIZE)
1005 					sc->wptr = sc->inbuf;
1006 				++sc->incnt;
1007 				if (sc->incnt > SERIBUF_SIZE - 16)
1008 					regs->du_btrst = 2;
1009 			}
1010 			if (c & 0x1000)
1011 				regs->du_crb = 0x40;
1012 		}
1013 	}
1014 	if (istat & 0x01) {		/* channel A transmit interrupt */
1015 		sc = mfcs_cd.cd_devs[unit];
1016 		tp = sc->sc_tty;
1017 		if (sc->ptr == sc->end) {
1018 			tp->t_state &= ~(TS_BUSY | TS_FLUSH);
1019 			scc->imask &= ~0x01;
1020 			regs->du_imr = scc->imask;
1021 			add_sicallback (tp->t_line ?
1022 			    (sifunc_t)linesw[tp->t_line].l_start
1023 			    : (sifunc_t)mfcsstart, tp, NULL);
1024 
1025 		}
1026 		else
1027 			regs->du_tba = *sc->ptr++;
1028 	}
1029 	if (istat & 0x10) {		/* channel B transmit interrupt */
1030 		sc = mfcs_cd.cd_devs[unit + 1];
1031 		tp = sc->sc_tty;
1032 		if (sc->ptr == sc->end) {
1033 			tp->t_state &= ~(TS_BUSY | TS_FLUSH);
1034 			scc->imask &= ~0x10;
1035 			regs->du_imr = scc->imask;
1036 			add_sicallback (tp->t_line ?
1037 			    (sifunc_t)linesw[tp->t_line].l_start
1038 			    : (sifunc_t)mfcsstart, tp, NULL);
1039 		}
1040 		else
1041 			regs->du_tbb = *sc->ptr++;
1042 	}
1043 	if (istat & 0x80) {		/* input port change interrupt */
1044 		c = regs->du_ipcr;
1045 		printf ("%s: ipcr %02x", scc->sc_dev.dv_xname, c);
1046 	}
1047 	return(1);
1048 }
1049 
1050 void
1051 mfcsxintr(unit)
1052 	int unit;
1053 {
1054 	int s1, s2, ovfl;
1055 	struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1056 	struct tty *tp = sc->sc_tty;
1057 
1058 	/*
1059 	 * Make sure we're not interrupted by another
1060 	 * vbl, but allow level6 ints
1061 	 */
1062 	s1 = spltty();
1063 
1064 	/*
1065 	 * pass along any acumulated information
1066 	 * while input is not blocked
1067 	 */
1068 	while (sc->incnt && (tp->t_state & TS_TBLOCK) == 0) {
1069 		/*
1070 		 * no collision with ser_fastint()
1071 		 */
1072 		mfcseint(unit, *sc->rptr++);
1073 
1074 		ovfl = 0;
1075 		/* lock against mfcs_fastint() */
1076 		s2 = splser();
1077 		--sc->incnt;
1078 		if (sc->rptr == sc->inbuf + SERIBUF_SIZE)
1079 			sc->rptr = sc->inbuf;
1080 		if (sc->ovfl != 0) {
1081 			ovfl = sc->ovfl;
1082 			sc->ovfl = 0;
1083 		}
1084 		splx(s2);
1085 		if (ovfl != 0)
1086 			log(LOG_WARNING, "%s: %d buffer overflow!\n",
1087 			    sc->sc_dev.dv_xname, ovfl);
1088 	}
1089 	if (sc->incnt == 0 && (tp->t_state & TS_TBLOCK) == 0) {
1090 		sc->sc_regs->du_btst = 1 << unit;	/* XXXX */
1091 	}
1092 	splx(s1);
1093 }
1094 
1095 void
1096 mfcseint(unit, stat)
1097 	int unit, stat;
1098 {
1099 	struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1100 	struct tty *tp;
1101 	u_char ch;
1102 	int c;
1103 
1104 	tp = sc->sc_tty;
1105 	ch = stat & 0xff;
1106 	c = ch;
1107 
1108 	if ((tp->t_state & TS_ISOPEN) == 0) {
1109 #ifdef KGDB
1110 		/* we don't care about parity errors */
1111 		if (kgdb_dev == makedev(sermajor, unit) && c == FRAME_END)
1112 			kgdb_connect(0);	/* trap into kgdb */
1113 #endif
1114 		return;
1115 	}
1116 
1117 	/*
1118 	 * Check for break and (if enabled) parity error.
1119 	 */
1120 	if (stat & 0xc000)
1121 		c |= TTY_FE;
1122 	else if (stat & 0x2000)
1123 			c |= TTY_PE;
1124 
1125 	if (stat & 0x1000)
1126 		log(LOG_WARNING, "%s: fifo overflow\n",
1127 		    ((struct mfcs_softc *)mfcs_cd.cd_devs[unit])->sc_dev.dv_xname);
1128 
1129 	(*linesw[tp->t_line].l_rint)(c, tp);
1130 }
1131 
1132 /*
1133  * This interrupt is periodically invoked in the vertical blank
1134  * interrupt.  It's used to keep track of the modem control lines
1135  * and (new with the fast_int code) to move accumulated data
1136  * up into the tty layer.
1137  */
1138 void
1139 mfcsmint(unit)
1140 	int unit;
1141 {
1142 	struct tty *tp;
1143 	struct mfcs_softc *sc = mfcs_cd.cd_devs[unit];
1144 	u_char stat, last, istat;
1145 
1146 	tp = sc->sc_tty;
1147 	if (!tp)
1148 		return;
1149 
1150 	if ((tp->t_state & (TS_ISOPEN | TS_WOPEN)) == 0) {
1151 		sc->rptr = sc->wptr = sc->inbuf;
1152 		sc->incnt = 0;
1153 		return;
1154 	}
1155 	/*
1156 	 * empty buffer
1157 	 */
1158 	mfcsxintr(unit);
1159 
1160 	stat = ~sc->sc_regs->du_ip;
1161 	last = sc->sc_mfc->last_ip;
1162 	sc->sc_mfc->last_ip = stat;
1163 
1164 	/*
1165 	 * check whether any interesting signal changed state
1166 	 */
1167 	istat = stat ^ last;
1168 
1169 	if ((istat & (0x10 << (unit & 1))) && 		/* CD changed */
1170 	    (SWFLAGS(tp->t_dev) & TIOCFLAG_SOFTCAR) == 0) {
1171 		if (stat & (0x10 << (unit & 1)))
1172 			(*linesw[tp->t_line].l_modem)(tp, 1);
1173 		else if ((*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
1174 			sc->sc_regs->du_btrst = 0x0a << (unit & 1);
1175 		}
1176 	}
1177 }
1178