1 /* $NetBSD: ivsc.c,v 1.22 1997/08/27 11:23:11 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1994 Michael L. Hitch 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)ivsdma.c 37 */ 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <dev/scsipi/scsi_all.h> 43 #include <dev/scsipi/scsipi_all.h> 44 #include <dev/scsipi/scsiconf.h> 45 #include <amiga/amiga/custom.h> 46 #include <amiga/amiga/device.h> 47 #include <amiga/amiga/isr.h> 48 #include <amiga/dev/scireg.h> 49 #include <amiga/dev/scivar.h> 50 #include <amiga/dev/zbusvar.h> 51 52 void ivscattach __P((struct device *, struct device *, void *)); 53 int ivscmatch __P((struct device *, struct cfdata *, void *)); 54 55 int ivsc_intr __P((void *)); 56 int ivsc_dma_xfer_in __P((struct sci_softc *dev, int len, 57 register u_char *buf, int phase)); 58 int ivsc_dma_xfer_out __P((struct sci_softc *dev, int len, 59 register u_char *buf, int phase)); 60 61 struct scsipi_adapter ivsc_scsiswitch = { 62 sci_scsicmd, 63 sci_minphys, 64 0, /* no lun support */ 65 0, /* no lun support */ 66 }; 67 68 struct scsipi_device ivsc_scsidev = { 69 NULL, /* use default error handler */ 70 NULL, /* do not have a start functio */ 71 NULL, /* have no async handler */ 72 NULL, /* Use default done routine */ 73 }; 74 75 76 #ifdef DEBUG 77 extern int sci_debug; 78 #define QPRINTF(a) if (sci_debug > 1) printf a 79 #else 80 #define QPRINTF(a) 81 #endif 82 83 extern int sci_data_wait; 84 85 int ivsdma_pseudo = 1; /* 0=off, 1=on */ 86 87 struct cfattach ivsc_ca = { 88 sizeof(struct sci_softc), ivscmatch, ivscattach 89 }; 90 91 struct cfdriver ivsc_cd = { 92 NULL, "ivsc", DV_DULL, NULL, 0 93 }; 94 95 /* 96 * if this is an IVS board 97 */ 98 int 99 ivscmatch(pdp, cfp, auxp) 100 struct device *pdp; 101 struct cfdata *cfp; 102 void *auxp; 103 { 104 struct zbus_args *zap; 105 106 zap = auxp; 107 108 /* 109 * Check manufacturer and product id. 110 */ 111 if (zap->manid != 2112 || /* If manufacturer is IVS */ 112 (zap->prodid != 48 && /* product = Trumpcard 500 */ 113 zap->prodid != 52 && /* product = Trumpcard */ 114 zap->prodid != 243)) /* product = Vector SCSI */ 115 return(0); /* didn't match */ 116 return(1); 117 } 118 119 void 120 ivscattach(pdp, dp, auxp) 121 struct device *pdp, *dp; 122 void *auxp; 123 { 124 volatile u_char *rp; 125 struct sci_softc *sc; 126 struct zbus_args *zap; 127 128 printf("\n"); 129 130 zap = auxp; 131 132 sc = (struct sci_softc *)dp; 133 rp = zap->va + 0x40; 134 sc->sci_data = rp; 135 sc->sci_odata = rp; 136 sc->sci_icmd = rp + 2; 137 sc->sci_mode = rp + 4; 138 sc->sci_tcmd = rp + 6; 139 sc->sci_bus_csr = rp + 8; 140 sc->sci_sel_enb = rp + 8; 141 sc->sci_csr = rp + 10; 142 sc->sci_dma_send = rp + 10; 143 sc->sci_idata = rp + 12; 144 sc->sci_trecv = rp + 12; 145 sc->sci_iack = rp + 14; 146 sc->sci_irecv = rp + 14; 147 148 if (ivsdma_pseudo == 1) { 149 sc->dma_xfer_in = ivsc_dma_xfer_in; 150 sc->dma_xfer_out = ivsc_dma_xfer_out; 151 } 152 153 sc->sc_isr.isr_intr = ivsc_intr; 154 sc->sc_isr.isr_arg = sc; 155 sc->sc_isr.isr_ipl = 2; 156 add_isr(&sc->sc_isr); 157 158 scireset(sc); 159 160 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 161 sc->sc_link.adapter_softc = sc; 162 sc->sc_link.scsipi_scsi.adapter_target = 7; 163 sc->sc_link.adapter = &ivsc_scsiswitch; 164 sc->sc_link.device = &ivsc_scsidev; 165 sc->sc_link.openings = 1; 166 sc->sc_link.scsipi_scsi.max_target = 7; 167 sc->sc_link.type = BUS_SCSI; 168 TAILQ_INIT(&sc->sc_xslist); 169 170 /* 171 * attach all scsi units on us 172 */ 173 config_found(dp, &sc->sc_link, scsiprint); 174 } 175 176 int 177 ivsc_dma_xfer_in (dev, len, buf, phase) 178 struct sci_softc *dev; 179 int len; 180 register u_char *buf; 181 int phase; 182 { 183 int wait = sci_data_wait; 184 volatile register u_char *sci_dma = dev->sci_idata + 0x20; 185 volatile register u_char *sci_csr = dev->sci_csr; 186 #ifdef DEBUG 187 u_char *obp = buf; 188 #endif 189 190 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 191 192 *dev->sci_tcmd = phase; 193 *dev->sci_mode |= SCI_MODE_DMA; 194 *dev->sci_irecv = 0; 195 196 while (len >= 128) { 197 wait = sci_data_wait; 198 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 199 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 200 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 201 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 202 || --wait < 0) { 203 #ifdef DEBUG 204 if (sci_debug) 205 printf("ivsc_dma_in2 fail: l%d i%x w%d\n", 206 len, *dev->sci_bus_csr, wait); 207 #endif 208 *dev->sci_mode &= ~SCI_MODE_DMA; 209 return 0; 210 } 211 } 212 213 #define R1 (*buf++ = *sci_dma) 214 R1; R1; R1; R1; R1; R1; R1; R1; 215 R1; R1; R1; R1; R1; R1; R1; R1; 216 R1; R1; R1; R1; R1; R1; R1; R1; 217 R1; R1; R1; R1; R1; R1; R1; R1; 218 R1; R1; R1; R1; R1; R1; R1; R1; 219 R1; R1; R1; R1; R1; R1; R1; R1; 220 R1; R1; R1; R1; R1; R1; R1; R1; 221 R1; R1; R1; R1; R1; R1; R1; R1; 222 R1; R1; R1; R1; R1; R1; R1; R1; 223 R1; R1; R1; R1; R1; R1; R1; R1; 224 R1; R1; R1; R1; R1; R1; R1; R1; 225 R1; R1; R1; R1; R1; R1; R1; R1; 226 R1; R1; R1; R1; R1; R1; R1; R1; 227 R1; R1; R1; R1; R1; R1; R1; R1; 228 R1; R1; R1; R1; R1; R1; R1; R1; 229 R1; R1; R1; R1; R1; R1; R1; R1; 230 len -= 128; 231 } 232 233 while (len > 0) { 234 wait = sci_data_wait; 235 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 236 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 237 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 238 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 239 || --wait < 0) { 240 #ifdef DEBUG 241 if (sci_debug) 242 printf("ivsc_dma_in1 fail: l%d i%x w%d\n", 243 len, *dev->sci_bus_csr, wait); 244 #endif 245 *dev->sci_mode &= ~SCI_MODE_DMA; 246 return 0; 247 } 248 } 249 250 *buf++ = *sci_dma; 251 len--; 252 } 253 254 QPRINTF(("ivsc_dma_in {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 255 len, obp[0], obp[1], obp[2], obp[3], obp[4], obp[5], 256 obp[6], obp[7], obp[8], obp[9])); 257 258 *dev->sci_mode &= ~SCI_MODE_DMA; 259 return 0; 260 } 261 262 int 263 ivsc_dma_xfer_out (dev, len, buf, phase) 264 struct sci_softc *dev; 265 int len; 266 register u_char *buf; 267 int phase; 268 { 269 int wait = sci_data_wait; 270 volatile register u_char *sci_dma = dev->sci_data + 0x20; 271 volatile register u_char *sci_csr = dev->sci_csr; 272 273 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 274 275 QPRINTF(("ivsc_dma_out {%d} %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", 276 len, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], 277 buf[6], buf[7], buf[8], buf[9])); 278 279 *dev->sci_tcmd = phase; 280 *dev->sci_mode |= SCI_MODE_DMA; 281 *dev->sci_icmd |= SCI_ICMD_DATA; 282 *dev->sci_dma_send = 0; 283 while (len > 0) { 284 wait = sci_data_wait; 285 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) != 286 (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) { 287 if (!(*sci_csr & SCI_CSR_PHASE_MATCH) 288 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 289 || --wait < 0) { 290 #ifdef DEBUG 291 if (sci_debug) 292 printf("ivsc_dma_out fail: l%d i%x w%d\n", 293 len, *dev->sci_bus_csr, wait); 294 #endif 295 *dev->sci_mode &= ~SCI_MODE_DMA; 296 return 0; 297 } 298 } 299 300 *sci_dma = *buf++; 301 len--; 302 } 303 304 wait = sci_data_wait; 305 while ((*sci_csr & (SCI_CSR_DREQ|SCI_CSR_PHASE_MATCH)) == 306 SCI_CSR_PHASE_MATCH && --wait); 307 308 309 *dev->sci_mode &= ~SCI_MODE_DMA; 310 return 0; 311 } 312 313 int 314 ivsc_intr(arg) 315 void *arg; 316 { 317 struct sci_softc *dev = arg; 318 u_char stat; 319 320 if ((*dev->sci_csr & SCI_CSR_INT) == 0) 321 return(0); 322 stat = *dev->sci_iack; 323 /* XXXX is: something is missing here, at least a: */ 324 return(1); 325 } 326