1 /* 2 * Copyright (c) 1994 Christian E. Hopps 3 * Copyright (c) 1982, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)dma.c 35 * $Id: gtsc.c,v 1.3 1994/05/16 05:09:02 chopps Exp $ 36 */ 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <scsi/scsi_all.h> 42 #include <scsi/scsiconf.h> 43 #include <amiga/amiga/custom.h> 44 #include <amiga/amiga/cc.h> 45 #include <amiga/amiga/device.h> 46 #include <amiga/dev/dmavar.h> 47 #include <amiga/dev/sbicreg.h> 48 #include <amiga/dev/sbicvar.h> 49 #include <amiga/dev/gtscreg.h> 50 #include <amiga/dev/ztwobusvar.h> 51 #include <amiga/dev/gvpbusvar.h> 52 53 void gtscattach __P((struct device *, struct device *, void *)); 54 int gtscmatch __P((struct device *, struct cfdata *, void *)); 55 int gtscprint __P((void *auxp, char *)); 56 57 void gtsc_dmafree __P((struct sbic_softc *)); 58 void gtsc_dmastop __P((struct sbic_softc *)); 59 int gtsc_dmanext __P((struct sbic_softc *)); 60 int gtsc_dmaintr __P((void)); 61 int gtsc_dmago __P((struct sbic_softc *, char *, int, int)); 62 63 struct scsi_adapter gtsc_scsiswitch = { 64 sbic_scsicmd, 65 sbic_minphys, 66 0, /* no lun support */ 67 0, /* no lun support */ 68 sbic_adinfo, 69 "gtsc", 70 }; 71 72 struct scsi_device gtsc_scsidev = { 73 NULL, /* use default error handler */ 74 NULL, /* have a queue served by this ??? */ 75 NULL, /* have no async handler ??? */ 76 NULL, /* Use default done routine */ 77 "gtsc", 78 0, 79 }; 80 81 int gtsc_maxdma = 0; /* Maximum size per DMA transfer */ 82 int gtsc_dmamask = 0; 83 int gtsc_dmabounce = 0; 84 85 #ifdef DEBUG 86 void gtsc_dmatimeout __P((void *)); 87 int gtsc_debug = 0; 88 #endif 89 90 struct cfdriver gtsccd = { 91 NULL, "gtsc", gtscmatch, gtscattach, 92 DV_DULL, sizeof(struct sbic_softc), NULL, 0 }; 93 94 int 95 gtscmatch(pdp, cdp, auxp) 96 struct device *pdp; 97 struct cfdata *cdp; 98 void *auxp; 99 { 100 struct gvpbus_args *gap; 101 102 gap = auxp; 103 if (gap->flags & GVP_SCSI) 104 return(1); 105 return(0); 106 } 107 108 /* 109 * attach all devices on our board. 110 */ 111 void 112 gtscattach(pdp, dp, auxp) 113 struct device *pdp, *dp; 114 void *auxp; 115 { 116 volatile struct sdmac *rp; 117 struct gvpbus_args *gap; 118 struct sbic_softc *sc; 119 120 gap = auxp; 121 sc = (struct sbic_softc *)dp; 122 sc->sc_cregs = rp = gap->zargs.va; 123 /* 124 * disable ints and reset bank register 125 */ 126 rp->CNTR = 0; 127 rp->bank = 0; 128 129 sc->sc_dmago = gtsc_dmago; 130 sc->sc_dmafree = gtsc_dmafree; 131 sc->sc_dmanext = gtsc_dmanext; 132 sc->sc_dmastop = gtsc_dmastop; 133 sc->sc_dmacmd = 0; 134 135 #ifdef DEBUG 136 /* make sure timeout is really not needed */ 137 timeout((void *)gtsc_dmatimeout, 0, 30 * hz); 138 #endif 139 140 sc->sc_flags |= SBICF_BADDMA; 141 if (gtsc_dmamask) 142 sc->sc_dmamask = gtsc_dmamask; 143 else if (gap->flags & GVP_24BITDMA) 144 sc->sc_dmamask = ~0x00ffffff; 145 else if (gap->flags & GVP_25BITDMA) 146 sc->sc_dmamask = ~0x01ffffff; 147 else 148 sc->sc_dmamask = ~0x07ffffff; 149 printf(" dmamask 0x%x", ~sc->sc_dmamask); 150 151 sc->gtsc_bankmask = (~sc->sc_dmamask >> 18) & 0x01c0; 152 153 154 /* 155 * if the user requests a bounce buffer or 156 * the users kva space is not ztwo and dma needs it 157 * try and allocate a bounce buffer. If we allocate 158 * one and it is in ztwo space leave maxdma to user 159 * setting or default to MAXPHYS else the address must 160 * be on the chip bus so decrease it to either the users 161 * setting or 1024 bytes. 162 * 163 * XXX this needs to change if we move to multiple memory segments. 164 */ 165 if (gtsc_dmabounce || kvtop(sc) & sc->sc_dmamask) { 166 sc->sc_dmabuffer = (char *) alloc_z2mem(MAXPHYS); 167 if (isztwomem(sc->sc_dmabuffer)) 168 printf(" bounce pa 0x%x", ztwopa(sc->sc_dmabuffer)); 169 else if (gtsc_maxdma == 0) { 170 gtsc_maxdma = 1024; 171 printf(" bounce pa 0x%x", 172 PREP_DMA_MEM(sc->sc_dmabuffer)); 173 } 174 } 175 if (gtsc_maxdma == 0) 176 gtsc_maxdma = MAXPHYS; 177 178 printf(" maxdma %d\n", gtsc_maxdma); 179 180 sc->sc_sbicp = (sbic_regmap_p) ((int)rp + 0x61); 181 sc->sc_clkfreq = sbic_clock_override ? sbic_clock_override : 77; 182 183 sbicreset(sc); 184 185 sc->sc_link.adapter_softc = sc; 186 sc->sc_link.adapter_targ = 7; 187 sc->sc_link.adapter = >sc_scsiswitch; 188 sc->sc_link.device = >sc_scsidev; 189 TAILQ_INIT(&sc->sc_xslist); 190 191 custom.intreq = INTF_PORTS; 192 custom.intena = INTF_SETCLR | INTF_PORTS; 193 194 /* 195 * attach all scsi units on us 196 */ 197 config_found(dp, &sc->sc_link, gtscprint); 198 } 199 200 /* 201 * print diag if pnp is NULL else just extra 202 */ 203 int 204 gtscprint(auxp, pnp) 205 void *auxp; 206 char *pnp; 207 { 208 if (pnp == NULL) 209 return(UNCONF); 210 return(QUIET); 211 } 212 213 void 214 gtsc_dmafree(dev) 215 struct sbic_softc *dev; 216 { 217 volatile struct sdmac *sdp; 218 int s; 219 220 sdp = dev->sc_cregs; 221 222 s = splbio(); 223 #ifdef DEBUG 224 dev->sc_dmatimo = 0; 225 #endif 226 if (dev->sc_dmacmd) { 227 /* 228 * clear possible interrupt and stop dma 229 */ 230 sdp->CNTR &= ~GVP_CNTR_INT_P; 231 sdp->SP_DMA = 1; 232 dev->sc_dmacmd = 0; 233 } 234 #ifdef DEBUG 235 if (gtsc_debug & (DDB_IO | DDB_FOLLOW)) 236 printf("gtsc_dmafree\n"); 237 #endif 238 /* 239 * disable interrupts 240 */ 241 sdp->CNTR = 0; /* disable interrupts from dma/sbic */ 242 dev->sc_flags &= ~SBICF_INTR; 243 splx(s); 244 } 245 246 int 247 gtsc_dmago(dev, addr, count, flags) 248 struct sbic_softc *dev; 249 char *addr; 250 int count, flags; 251 { 252 volatile struct sdmac *sdp; 253 254 sdp = dev->sc_cregs; 255 /* 256 * Set up the command word based on flags 257 */ 258 dev->sc_dmacmd = GVP_CNTR_INTEN; 259 if ((flags & DMAGO_READ) == 0) 260 dev->sc_dmacmd |= GVP_CNTR_DDIR; 261 262 #ifdef DEBUG 263 if (gtsc_debug & DDB_IO) 264 printf("gtsc_dmago: cmd %x\n", dev->sc_dmacmd); 265 dev->sc_dmatimo = 1; 266 #endif 267 dev->sc_flags |= SBICF_INTR; 268 sdp->CNTR = dev->sc_dmacmd; 269 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 270 if (dev->gtsc_bankmask) 271 sdp->bank = dev->gtsc_bankmask & (((u_int) dev->sc_cur->dc_addr) >> 18); 272 sdp->ST_DMA = 1; 273 274 /* 275 * restrict transfer count to maximum 276 */ 277 if (dev->sc_tcnt > gtsc_maxdma) 278 dev->sc_tcnt = gtsc_maxdma; 279 return(dev->sc_tcnt); 280 } 281 282 void 283 gtsc_dmastop(dev) 284 struct sbic_softc *dev; 285 { 286 volatile struct sdmac *sdp; 287 int s; 288 289 sdp = dev->sc_cregs; 290 291 #ifdef DEBUG 292 if (gtsc_debug & DDB_FOLLOW) 293 printf("gtsc_dmastop()\n"); 294 dev->sc_dmatimo = 0; 295 #endif 296 if (dev->sc_dmacmd) { 297 /* 298 * clear possible interrupt and stop dma 299 */ 300 s = splbio(); 301 sdp->CNTR &= ~GVP_CNTR_INT_P; 302 sdp->SP_DMA = 1; 303 dev->sc_dmacmd = 0; 304 splx(s); 305 } 306 } 307 308 int 309 gtsc_dmaintr() 310 { 311 volatile struct sdmac *sdp; 312 struct sbic_softc *dev; 313 int i, stat, found; 314 315 found = 0; 316 for (i = 0; i < gtsccd.cd_ndevs; i++) { 317 dev = gtsccd.cd_devs[i]; 318 if (dev == NULL) 319 continue; 320 sdp = dev->sc_cregs; 321 stat = sdp->CNTR; 322 if ((stat & GVP_CNTR_INT_P) == 0) 323 continue; 324 #ifdef DEBUG 325 if (gtsc_debug & DDB_FOLLOW) 326 printf("gtsc_dmaintr(%d, 0x%x) ", i, stat); 327 #endif 328 if (dev->sc_flags & SBICF_INTR) 329 found += sbicintr(dev); 330 } 331 return(found); 332 } 333 334 335 int 336 gtsc_dmanext(dev) 337 struct sbic_softc *dev; 338 { 339 volatile struct sdmac *sdp; 340 int i, stat; 341 342 sdp = dev->sc_cregs; 343 344 if (dev->sc_cur > dev->sc_last) { 345 /* shouldn't happen !! */ 346 printf("gtsc_dmanext at end !!!\n"); 347 gtsc_dmastop(dev); 348 return(0); 349 } 350 #ifdef DEBUG 351 dev->sc_dmatimo = 1; 352 #endif 353 /* 354 * clear possible interrupt and stop dma 355 */ 356 sdp->CNTR &= ~GVP_CNTR_INT_P; 357 sdp->SP_DMA = 1; 358 359 sdp->CNTR = dev->sc_dmacmd; 360 sdp->ACR = (u_int) dev->sc_cur->dc_addr; 361 if (dev->gtsc_bankmask) 362 sdp->bank = 363 dev->gtsc_bankmask & ((u_int)dev->sc_cur->dc_addr >> 18); 364 sdp->ST_DMA = 1; 365 366 dev->sc_tcnt = dev->sc_cur->dc_count << 1; 367 if (dev->sc_tcnt > gtsc_maxdma) 368 dev->sc_tcnt = gtsc_maxdma; 369 #ifdef DEBUG 370 if (gtsc_debug & DDB_FOLLOW) 371 printf("gtsc_dmanext ret: %d\n", dev->sc_tcnt); 372 #endif 373 return(dev->sc_tcnt); 374 } 375 376 #ifdef DEBUG 377 void 378 gtsc_dmatimeout(arg) 379 void *arg; 380 { 381 struct sbic_softc *dev; 382 int i, s; 383 384 for (i = 0; i < gtsccd.cd_ndevs; i++) { 385 dev = gtsccd.cd_devs[i]; 386 if (dev == NULL) 387 continue; 388 s = splbio(); 389 if (dev->sc_dmatimo) { 390 if (dev->sc_dmatimo > 1) 391 printf("gtsc_dma%d: timeout #%d\n", 392 dev->sc_dev.dv_unit, dev->sc_dmatimo - 1); 393 dev->sc_dmatimo++; 394 } 395 splx(s); 396 } 397 timeout(gtsc_dmatimeout, 0, 30 * hz); 398 } 399 #endif 400