1 /* $NetBSD: grf_ul.c,v 1.47 2011/12/15 14:25:13 phx Exp $ */ 2 #define UL_DEBUG 3 4 /*- 5 * Copyright (c) 1995 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Ignatios Souvatzis. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include "opt_amigacons.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: grf_ul.c,v 1.47 2011/12/15 14:25:13 phx Exp $"); 37 38 #include "grful.h" 39 #include "ite.h" 40 #if NGRFUL > 0 41 42 /* Graphics routines for the University of Lowell A2410 board, 43 using the TMS34010 processor. */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/errno.h> 48 #include <sys/ioctl.h> 49 #include <sys/device.h> 50 #include <sys/malloc.h> 51 #include <sys/syslog.h> 52 53 #include <machine/cpu.h> 54 55 #include <amiga/amiga/device.h> 56 #include <amiga/amiga/isr.h> 57 #include <amiga/dev/zbusvar.h> 58 #include <amiga/dev/grfioctl.h> 59 #include <amiga/dev/grfvar.h> 60 #include <amiga/dev/grf_ulreg.h> 61 62 extern u_int16_t tmscode[]; 63 64 int ul_ioctl(struct grf_softc *, u_long, void *, dev_t); 65 int ul_getcmap(struct grf_softc *, struct grf_colormap *, dev_t); 66 int ul_putcmap(struct grf_softc *, struct grf_colormap *, dev_t); 67 int ul_bitblt(struct grf_softc *, struct grf_bitblt *, dev_t); 68 int ul_blank(struct grf_softc *, int *, dev_t); 69 70 static int ulisr(void *); 71 int ulowell_alive(struct grfvideo_mode *); 72 static void ul_load_code(struct grf_softc *); 73 static int ul_load_mon(struct grf_softc *, struct grfvideo_mode *); 74 static int ul_getvmode(struct grf_softc *, struct grfvideo_mode *); 75 static int ul_setvmode(struct grf_softc *, unsigned); 76 static inline void ul_setfb(struct grf_softc *, u_long); 77 78 /* 79 * marked true early so that ulowell_cnprobe() can tell if we are alive. 80 */ 81 int ulowell_inited; 82 83 /* standard-palette definition */ 84 u_int8_t ul_std_palette[] = { 85 0,128, 0,128, 0,128, 0,128, 0,255, 0,255, 0,255, 0,255, 86 0, 0,128,128, 0, 0,128,128, 0, 0,255,255, 0, 0,255,255, 87 0, 0, 0, 0, 128,128,128,128, 0, 0, 0, 0, 255,255,255,255}; 88 89 u_int8_t ul_ovl_palette[] = { 90 128, 0, 0, 0, 91 128, 0, 0, 0, 92 128, 0, 0, 0}; 93 94 struct grfvideo_mode ul_monitor_defs[] = { 95 96 /* 97 * We give all these values in MI units, that is: 98 * horizontal timings in units of pixels 99 * vertical timings in units of lines 100 * point of reference is blanking end. 101 * 102 * The ul_load_mon transforms these values right before loading 103 * them into the chip. 104 * 105 * This leaves us with a single point where things are transformed, 106 * which should make life easier if we ever change things again. 107 */ 108 109 /* 1024x768, 60Hz */ 110 {1,"1024x768", 66667000, 1024,768,8, 1024,1088,1296,1392, 111 768,771,774,798, 0}, 112 /* 864x648, 70Hz */ 113 {2,"864x648", 50000000, 864,648,8, 864,928,992,1056, 114 648,658,663,678, 0}, 115 /* 800x600, 60Hz */ 116 {3, "800x600", 36000000, 800,600,8, 800,864,928,992, 117 600,610,615,630, 0}, 118 /* 640x400, 60 Hz, interlaced */ 119 {4, "640x400i", 14318000, 640,400,8, 640,768,832,912, 120 200,223,203,240, 1}, 121 /* 1024x768, 65Hz interlaced, s.th. is strange */ 122 {5, "1024x768?i", 44980000, 1024,768,8, 1024,1072,1136,1280, 123 488,509,512,534, 1}, 124 /* 1024x1024, 60Hz */ 125 {6, "1024x1024", 80000000, 1024,1024,8, 1024,1040,1120,1248, 126 1024,1027,1030,1055, 0}, 127 /* 736x480, 60 Hz */ 128 {7, "736x480", 28636300, 736,480,8, 736,784,848,928, 129 480,491,495,515, 0}, 130 }; 131 132 int ulowell_mon_max = sizeof (ul_monitor_defs)/sizeof (ul_monitor_defs[0]); 133 134 /* option settable */ 135 #ifndef ULOWELL_OSC1 136 #define ULOWELL_OSC1 36000000 137 #endif 138 139 #ifndef ULOWELL_OSC2 140 #define ULOWELL_OSC2 66667000 141 #endif 142 143 #ifndef ULOWELL_DEFAULT_MON 144 #define ULOWELL_DEFAULT_MON 1 145 #endif 146 147 /* patchable */ 148 int ulowell_default_mon = ULOWELL_DEFAULT_MON; 149 int ulowell_default_gfx = ULOWELL_DEFAULT_MON; 150 151 /* 152 * yes, this should be per board. We don't pay service to multiple boards, 153 * anyway. 154 */ 155 156 u_long ulowell_clock[2] = { ULOWELL_OSC2, ULOWELL_OSC1 }; 157 158 static struct grfvideo_mode *current_mon; 159 160 /* 161 * We dont use ints at the moment, but will need this later to avoid 162 * busy_waiting in gsp_write, and we use it for spurious int warnings. 163 */ 164 165 static int 166 ulisr(void *arg) 167 { 168 struct grf_softc *gp = arg; 169 volatile struct gspregs *ba; 170 u_int16_t thebits; 171 172 if (gp == NULL) 173 return 0; 174 175 ba = (volatile struct gspregs *)gp->g_regkva; 176 177 if (ba == NULL) 178 return 0; 179 180 thebits = ba->ctrl; 181 if (thebits & INTOUT) { 182 log(LOG_INFO, "grf4: got interrupt, ctrl=0x%4x\n", thebits); 183 /* clear int */ 184 ba->ctrl = thebits & ~INTOUT; 185 return 1; 186 } 187 return 0; 188 } 189 190 /* 191 * used to query the ulowell board to see if its alive. 192 * for the moment, a NOP. 193 */ 194 int 195 ulowell_alive(struct grfvideo_mode *mdp) 196 { 197 return 1; 198 } 199 200 /* 201 * Load the (mostly) ite support code and the default colormaps. 202 */ 203 static void 204 ul_load_code(struct grf_softc *gp) 205 { 206 struct grf_ul_softc *gup; 207 volatile struct gspregs *ba; 208 struct grfinfo *gi; 209 int i,j; 210 #if 0 211 struct grf_colormap gcm; 212 #endif 213 214 gup = (struct grf_ul_softc *)gp; 215 ba = (volatile struct gspregs *)gp->g_regkva; 216 gi = &gp->g_display; 217 218 gi->gd_regaddr = ztwopa((volatile void *)ba); 219 gi->gd_regsize = sizeof(struct gspregs); 220 gi->gd_fbaddr = NULL; 221 gi->gd_fbsize = 0; 222 gi->gd_fbwidth = 1024; 223 gi->gd_fbheight = 1024; 224 gi->gd_colors = 256; 225 226 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); 227 ba->hstadrh = 0xC000; 228 ba->hstadrl = 0x0080; 229 ba->data = 0x0; /* disable screen refresh and video output */ 230 ba->data = 0xFFFC; /* screen refresh base address */ 231 ba->data = 0xFFFF; /* no display int possible */ 232 ba->data = 0x000C; /* CAS before RAS refresh each 64 local clks */ 233 234 ba->ctrl = (ba->ctrl & ~INCW) | LBL; 235 ba->hstadrh = 0xfe80; 236 ba->hstadrl = 0; 237 ba->data = 4; 238 ba->hstadrl = 0x20; 239 ba->data = 0xFF; /* all color planes visible */ 240 241 ba->hstadrl = 0; 242 ba->data = 5; 243 ba->hstadrl = 0x20; 244 ba->data = 0; /* no color planes blinking */ 245 246 ba->hstadrl = 0; 247 ba->data = 6; 248 ba->hstadrl = 0x20; 249 ba->data = gup->gus_ovslct = 0x43; 250 /* overlay visible, no overlay blinking, overlay color 0 transparent */ 251 252 ba->hstadrl = 0; 253 ba->data = 7; 254 ba->hstadrl = 0x20; 255 ba->data = 0; /* voodoo */ 256 257 /* clear overlay planes */ 258 ba->ctrl |= INCW; 259 ba->hstadrh = 0xff80; 260 ba->hstadrl = 0x0000; 261 for (i=0xff80000; i< 0xffa0000; ++i) { 262 ba->data = 0; 263 } 264 265 /* download tms code */ 266 267 ba->ctrl = LBL | INCW | NMI | NMIM | HLT | CF; 268 269 printf("\ndownloading TMS code"); 270 i=0; 271 while ((j = tmscode[i++])) { 272 printf("."); 273 ba->hstadrh = tmscode[i++]; 274 ba->hstadrl = tmscode[i++]; 275 while (j-- > 0) { 276 ba->data = tmscode[i++]; 277 } 278 } 279 280 /* font info was uploaded in ite_ul.c(ite_ulinit). */ 281 282 #if 1 283 /* XXX load image palette with some initial values, slightly hacky */ 284 285 ba->hstadrh = 0xfe80; 286 ba->hstadrl = 0x0000; 287 ba->ctrl |= INCW; 288 ba->data = 0; 289 ba->ctrl &= ~INCW; 290 291 for (i=0; i<16; ++i) { 292 ba->data = gup->gus_imcmap[i+ 0] = ul_std_palette[i+ 0]; 293 ba->data = gup->gus_imcmap[i+256] = ul_std_palette[i+16]; 294 ba->data = gup->gus_imcmap[i+512] = ul_std_palette[i+32]; 295 } 296 297 /* 298 * XXX load shadow overlay palette with what the TMS code will load 299 * into the real one some time after the TMS code is started below. 300 * This might be considered a rude hack. 301 */ 302 memcpy(gup->gus_ovcmap, ul_ovl_palette, 3*4); 303 304 /* 305 * Unflush cache, unhalt CPU -> nmi starts to run. This MUST NOT BE 306 * DONE before the image color map initialization above, to guarantee 307 * the index register in the BT458 is not used by more than one CPU 308 * at once. 309 * 310 * XXX For the same reason, we'll have to rething ul_putcmap(). For 311 * details, look at comment there. 312 */ 313 ba->ctrl &= ~(HLT|CF); 314 315 #else 316 /* 317 * XXX I wonder why this partially ever worked. 318 * 319 * This can't possibly work this way, as we are copyin()ing data in 320 * ul_putcmap. 321 * 322 * I guess this partially worked because SFC happened to point to 323 * to supervisor data space on 68030 machines coming from the old 324 * boot loader. 325 * 326 * While this looks more correct than the hack in the other part of the 327 * loop, we would have to do our own version of the loop through 328 * colormap entries, set up command buffer, and call gsp_write(), or 329 * factor out some code. 330 */ 331 332 /* 333 * XXX This version will work for the overlay, if our queue codes 334 * initial conditions are set at load time (not start time). 335 * It further assumes that ul_putcmap only uses the 336 * GRFIMDEV/GRFOVDEV bits of the dev parameter. 337 */ 338 339 340 /* unflush cache, unhalt CPU first -> nmi starts to run */ 341 ba->ctrl &= ~(HLT|CF); 342 343 gcm.index = 0; 344 gcm.count = 16; 345 gcm.red = ul_std_palette + 0; 346 gcm.green = ul_std_palette + 16; 347 gcm.blue = ul_std_palette + 32; 348 ul_putcmap(gp, &gcm, GRFIMDEV); 349 350 gcm.index = 0; 351 gcm.count = 4; 352 gcm.red = ul_ovl_palette + 0; 353 gcm.green = ul_ovl_palette + 4; 354 gcm.blue = ul_ovl_palette + 8; 355 ul_putcmap(gp, &gcm, GRFOVDEV); 356 #endif 357 358 } 359 360 static int 361 ul_load_mon(struct grf_softc *gp, struct grfvideo_mode *md) 362 { 363 struct grf_ul_softc *gup; 364 struct grfinfo *gi; 365 volatile struct gspregs *ba; 366 u_int16_t buf[8]; 367 368 gup = (struct grf_ul_softc *)gp; 369 gi = &gp->g_display; 370 ba = (volatile struct gspregs *)gp->g_regkva; 371 372 gi->gd_dyn.gdi_fbx = 0; 373 gi->gd_dyn.gdi_fby = 0; 374 gi->gd_dyn.gdi_dwidth = md->disp_width; 375 gi->gd_dyn.gdi_dheight = md->disp_height; 376 gi->gd_dyn.gdi_dx = 0; 377 gi->gd_dyn.gdi_dy = 0; 378 379 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); /* XXX */ 380 381 ba->hstadrh = 0xC000; 382 ba->hstadrl = 0x0000; 383 384 ba->data = (md->hsync_stop - md->hsync_start)/16; 385 ba->data = (md->htotal - md->hsync_start)/16 - 1; 386 ba->data = (md->hblank_start + md->htotal - md->hsync_start)/16 - 1; 387 ba->data = md->htotal/16 - 1; 388 389 ba->data = md->vsync_stop - md->vsync_start; 390 ba->data = md->vtotal - md->vsync_start - 1; 391 ba->data = md->vblank_start + md->vtotal - md->vsync_start - 1; 392 ba->data = md->vtotal - 1; 393 394 ba->ctrl &= ~INCW; 395 ba->hstadrh = 0xFE90; 396 ba->hstadrl = 0x0000; 397 398 if (abs(md->pixel_clock - ulowell_clock[0]) > 399 abs(md->pixel_clock - ulowell_clock[1])) { 400 401 ba->data = (ba->data & 0xFC) | 2 | 1; 402 md->pixel_clock = ulowell_clock[1]; 403 404 } else { 405 ba->data = (ba->data & 0xFC) | 2 | 0; 406 md->pixel_clock = ulowell_clock[0]; 407 } 408 409 ba->ctrl |= LBL | INCW; 410 ba->hstadrh = 0xC000; 411 ba->hstadrl = 0x0080; 412 ba->data = md->disp_flags & GRF_FLAGS_LACE ? 0xb020 : 0xf020; 413 414 /* I guess this should be in the yet unimplemented mode select ioctl */ 415 /* Hm.. maybe not. We always put the console on overlay plane no 0. */ 416 /* Anyway, this _IS_ called in the mode select ioctl. */ 417 418 /* ite support code parameters: */ 419 buf[0] = GCMD_MCHG; 420 buf[1] = md->disp_width; /* display width */ 421 buf[2] = md->disp_height; /* display height */ 422 buf[3] = 0; /* LSW of frame buffer origin */ 423 buf[4] = 0xFF80; /* MSW of frame buffer origin */ 424 buf[5] = gi->gd_fbwidth * 1; /* frame buffer pitch */ 425 buf[6] = 1; /* frame buffer depth */ 426 gsp_write(ba, buf, 7); 427 428 return(1); 429 } 430 431 int ul_mode(struct grf_softc *, u_long, void *, u_long, int); 432 433 void grfulattach(struct device *, struct device *, void *); 434 int grfulprint(void *, const char *); 435 int grfulmatch(struct device *, struct cfdata *, void *); 436 437 CFATTACH_DECL(grful, sizeof(struct grf_ul_softc), 438 grfulmatch, grfulattach, NULL, NULL); 439 440 /* 441 * only used in console init 442 */ 443 static struct cfdata *cfdata; 444 445 /* 446 * we make sure to only init things once. this is somewhat 447 * tricky regarding the console. 448 */ 449 int 450 grfulmatch(struct device *pdp, struct cfdata *cfp, void *auxp) 451 { 452 #ifdef ULOWELLCONSOLE 453 static int ulconunit = -1; 454 #endif 455 struct zbus_args *zap; 456 457 zap = auxp; 458 459 /* 460 * allow only one ulowell console 461 */ 462 if (amiga_realconfig == 0) 463 #ifdef ULOWELLCONSOLE 464 if (ulconunit != -1) 465 #endif 466 return(0); 467 468 if (zap->manid != 1030 || zap->prodid != 0) 469 return(0); 470 471 #ifdef ULOWELLCONSOLE 472 if (amiga_realconfig == 0 || ulconunit != cfp->cf_unit) { 473 #endif 474 if ((unsigned)ulowell_default_mon > ulowell_mon_max) 475 ulowell_default_mon = 1; 476 477 current_mon = ul_monitor_defs + ulowell_default_mon - 1; 478 if (ulowell_alive(current_mon) == 0) 479 return(0); 480 #ifdef ULOWELLCONSOLE 481 if (amiga_realconfig == 0) { 482 ulconunit = cfp->cf_unit; 483 cfdata = cfp; 484 } 485 } 486 #endif 487 return(1); 488 } 489 490 /* 491 * attach to the grfbus (zbus) 492 */ 493 void 494 grfulattach(struct device *pdp, struct device *dp, void *auxp) 495 { 496 static struct grf_ul_softc congrf; 497 struct zbus_args *zap; 498 struct grf_softc *gp; 499 struct grf_ul_softc *gup; 500 501 zap = auxp; 502 503 if (dp == NULL) 504 gup = &congrf; 505 else 506 gup = (struct grf_ul_softc *)dp; 507 508 gp = &gup->gus_sc; 509 510 if (dp != NULL && congrf.gus_sc.g_regkva != 0) { 511 /* 512 * inited earlier, just copy (not device struct) 513 */ 514 memcpy(&gp->g_display, &congrf.gus_sc.g_display, 515 (char *)&gup->gus_isr - (char *)&gp->g_display); 516 517 /* ...and transfer the isr */ 518 gup->gus_isr.isr_ipl = 2; 519 gup->gus_isr.isr_intr = ulisr; 520 gup->gus_isr.isr_arg = (void *)gp; 521 /* 522 * To make sure ints are always catched, first add new isr 523 * then remove old: 524 */ 525 add_isr(&gup->gus_isr); 526 remove_isr(&congrf.gus_isr); 527 } else { 528 gp->g_regkva = (void *)zap->va; 529 gp->g_fbkva = NULL; 530 gp->g_unit = GRF_ULOWELL_UNIT; 531 gp->g_flags = GF_ALIVE; 532 gp->g_mode = ul_mode; 533 #if NITE > 0 534 gp->g_conpri = grful_cnprobe(); 535 #endif 536 gp->g_data = NULL; 537 538 gup->gus_isr.isr_ipl = 2; 539 gup->gus_isr.isr_intr = ulisr; 540 gup->gus_isr.isr_arg = (void *)gp; 541 add_isr(&gup->gus_isr); 542 543 (void)ul_load_code(gp); 544 (void)ul_load_mon(gp, current_mon); 545 #if NITE > 0 546 grful_iteinit(gp); 547 #endif 548 } 549 if (dp != NULL) 550 printf("\n"); 551 /* 552 * attach grf 553 */ 554 amiga_config_found(cfdata, &gp->g_device, gp, grfulprint); 555 } 556 557 int 558 grfulprint(void *auxp, const char *pnp) 559 { 560 if (pnp) 561 aprint_normal("grf%d at %s", ((struct grf_softc *)auxp)->g_unit, 562 pnp); 563 return(UNCONF); 564 } 565 566 static int 567 ul_getvmode (struct grf_softc *gp, struct grfvideo_mode *vm) 568 { 569 struct grfvideo_mode *md; 570 571 if (vm->mode_num && vm->mode_num > ulowell_mon_max) 572 return EINVAL; 573 574 if (! vm->mode_num) 575 vm->mode_num = current_mon - ul_monitor_defs + 1; 576 577 md = ul_monitor_defs + vm->mode_num - 1; 578 strncpy (vm->mode_descr, md->mode_descr, 579 sizeof (vm->mode_descr)); 580 581 /* XXX should tell TMS to measure it */ 582 vm->pixel_clock = md->pixel_clock; 583 vm->disp_width = md->disp_width; 584 vm->disp_height = md->disp_height; 585 vm->depth = md->depth; 586 587 vm->hblank_start = md->hblank_start; 588 vm->hsync_start = md->hsync_start; 589 vm->hsync_stop = md->hsync_stop; 590 vm->htotal = md->htotal; 591 592 vm->vblank_start = md->vblank_start; 593 vm->vsync_start = md->vsync_start; 594 vm->vsync_stop = md->vsync_stop; 595 vm->vtotal = md->vtotal; 596 597 vm->disp_flags = md->disp_flags; 598 return 0; 599 } 600 601 602 static int 603 ul_setvmode (struct grf_softc *gp, unsigned mode) 604 { 605 struct grf_ul_softc *gup; 606 volatile struct gspregs *ba; 607 int error; 608 609 if (!mode || mode > ulowell_mon_max) 610 return EINVAL; 611 612 ba = (volatile struct gspregs *)gp->g_regkva; 613 gup = (struct grf_ul_softc *)gp; 614 current_mon = ul_monitor_defs + mode - 1; 615 616 error = ul_load_mon (gp, current_mon) ? 0 : EINVAL; 617 618 return error; 619 } 620 621 /* 622 * Set the frame buffer or overlay planes on or off. 623 * Always succeeds. 624 */ 625 626 static inline void 627 ul_setfb(struct grf_softc *gp, u_long cmd) 628 { 629 struct grf_ul_softc *gup; 630 volatile struct gspregs *ba; 631 632 gup = (struct grf_ul_softc *)gp; 633 634 ba = (volatile struct gspregs *)gp->g_regkva; 635 ba->ctrl = LBL; 636 ba->hstadrh = 0xfe80; 637 ba->hstadrl = 0x0000; 638 ba->data = 6; 639 ba->hstadrl = 0x0020; 640 641 switch (cmd) { 642 case GM_GRFON: 643 gup->gus_ovslct |= 0x40; 644 break; 645 case GM_GRFOFF: 646 gup->gus_ovslct &= ~0x40; 647 break; 648 case GM_GRFOVON: 649 gup->gus_ovslct |= 3; 650 break; 651 case GM_GRFOVOFF: 652 gup->gus_ovslct &= ~3; 653 break; 654 } 655 ba->data = gup->gus_ovslct; 656 } 657 658 /* 659 * Change the mode of the display. 660 * Return a UNIX error number or 0 for success. 661 */ 662 int 663 ul_mode(struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3) 664 { 665 int i; 666 struct grfdyninfo *gd; 667 668 switch (cmd) { 669 case GM_GRFON: 670 case GM_GRFOFF: 671 case GM_GRFOVON: 672 case GM_GRFOVOFF: 673 ul_setfb (gp, cmd); 674 return 0; 675 676 case GM_GRFCONFIG: 677 gd = (struct grfdyninfo *)arg; 678 for (i=0; i<ulowell_mon_max; ++i) { 679 if (ul_monitor_defs[i].disp_width == gd->gdi_dwidth && 680 ul_monitor_defs[i].disp_height == gd->gdi_dheight) 681 return ul_setvmode(gp, i+1); 682 } 683 return EINVAL; 684 685 case GM_GRFGETVMODE: 686 return ul_getvmode (gp, (struct grfvideo_mode *) arg); 687 688 case GM_GRFSETVMODE: 689 return ul_setvmode (gp, *(unsigned *) arg); 690 691 case GM_GRFGETNUMVM: 692 *(int *)arg = ulowell_mon_max; 693 return 0; 694 695 case GM_GRFIOCTL: 696 return ul_ioctl (gp, a2, arg, (dev_t)a3); 697 698 default: 699 break; 700 } 701 702 return EPASSTHROUGH; 703 } 704 705 int 706 ul_ioctl (register struct grf_softc *gp, u_long cmd, void *data, dev_t dev) 707 { 708 switch (cmd) { 709 #if 0 710 /* 711 * XXX we have no hardware sprites, but might implement them 712 * later in TMS code. 713 */ 714 715 case GRFIOCGSPRITEPOS: 716 return ul_getspritepos (gp, (struct grf_position *) data); 717 718 case GRFIOCSSPRITEPOS: 719 return ul_setspritepos (gp, (struct grf_position *) data); 720 721 case GRFIOCSSPRITEINF: 722 return ul_setspriteinfo (gp, (struct grf_spriteinfo *) data); 723 724 case GRFIOCGSPRITEINF: 725 return ul_getspriteinfo (gp, (struct grf_spriteinfo *) data); 726 727 case GRFIOCGSPRITEMAX: 728 return ul_getspritemax (gp, (struct grf_position *) data); 729 730 #endif 731 732 case GRFIOCGETCMAP: 733 return ul_getcmap (gp, (struct grf_colormap *) data, dev); 734 735 case GRFIOCPUTCMAP: 736 return ul_putcmap (gp, (struct grf_colormap *) data, dev); 737 738 case GRFIOCBITBLT: 739 return ul_bitblt (gp, (struct grf_bitblt *) data, dev); 740 741 case GRFIOCBLANK: 742 return ul_blank (gp, (int *) data, dev); 743 } 744 745 return EPASSTHROUGH; 746 } 747 748 int 749 ul_getcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev) 750 { 751 struct grf_ul_softc *gup; 752 u_int8_t *mymap; 753 int mxidx, error; 754 755 gup = (struct grf_ul_softc *)gp; 756 757 if (minor(dev) & GRFIMDEV) { 758 mxidx = 256; 759 mymap = gup->gus_imcmap; 760 } else { 761 mxidx = 4; 762 mymap = gup->gus_ovcmap; 763 } 764 765 if (cmap->count == 0 || cmap->index >= mxidx) 766 return 0; 767 768 if (cmap->count > mxidx - cmap->index) 769 cmap->count = mxidx - cmap->index; 770 771 /* just copyout from the shadow color map */ 772 773 if ((error = copyout(mymap + cmap->index, cmap->red, cmap->count)) 774 775 || (error = copyout(mymap + mxidx + cmap->index, cmap->green, 776 cmap->count)) 777 778 || (error = copyout(mymap + mxidx * 2 + cmap->index, cmap->blue, 779 cmap->count))) 780 781 return(error); 782 783 return(0); 784 } 785 786 int 787 ul_putcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev) 788 { 789 struct grf_ul_softc *gup; 790 volatile struct gspregs *ba; 791 u_int16_t cmd[8]; 792 int x, mxidx, error; 793 u_int8_t *mymap; 794 795 gup = (struct grf_ul_softc *)gp; 796 797 if (minor(dev) & GRFIMDEV) { 798 mxidx = 256; 799 mymap = gup->gus_imcmap; 800 } else { 801 mxidx = 4; 802 mymap = gup->gus_ovcmap; 803 } 804 805 if (cmap->count == 0 || cmap->index >= mxidx) 806 return 0; 807 808 if (cmap->count > mxidx - cmap->index) 809 cmap->count = mxidx - cmap->index; 810 811 /* first copyin to our shadow color map */ 812 813 if ((error = copyin(cmap->red, mymap + cmap->index, cmap->count)) 814 815 || (error = copyin(cmap->green, mymap + cmap->index + mxidx, 816 cmap->count)) 817 818 || (error = copyin(cmap->blue, mymap + cmap->index + mxidx*2, 819 cmap->count))) 820 821 return error; 822 823 824 /* then write from there to the hardware */ 825 ba = (volatile struct gspregs *)gp->g_regkva; 826 /* 827 * XXX This is a bad thing to do. 828 * We should always use the gsp call, or have a means to arbitrate 829 * the usage of the BT458 index register. Else there might be a 830 * race condition (when writing both colormaps at nearly the same 831 * time), where one CPU changes the index register when the other 832 * one has not finished using it. 833 */ 834 if (mxidx > 4) { 835 /* image color map: we can write, with a hack, directly */ 836 ba->ctrl = LBL; 837 ba->hstadrh = 0xfe80; 838 ba->hstadrl = 0x0000; 839 ba->ctrl |= INCW; 840 ba->data = cmap->index; 841 ba->ctrl &= ~INCW; 842 843 for (x=cmap->index; x < cmap->index + cmap->count; ++x) { 844 ba->data = (u_int16_t) mymap[x]; 845 ba->data = (u_int16_t) mymap[x + mxidx]; 846 ba->data = (u_int16_t) mymap[x + mxidx * 2]; 847 } 848 } else { 849 850 /* overlay planes color map: have to call tms to do it */ 851 cmd[0] = GCMD_CMAP; 852 cmd[1] = 1; 853 for (x=cmap->index; x < cmap->index + cmap->count; ++x) { 854 cmd[2] = x; 855 cmd[3] = mymap[x]; 856 cmd[4] = mymap[x + mxidx]; 857 cmd[5] = mymap[x + mxidx * 2]; 858 gsp_write(ba, cmd, 6); 859 } 860 } 861 return 0; 862 } 863 864 int 865 ul_blank(struct grf_softc *gp, int *onoff, dev_t dev) 866 { 867 volatile struct gspregs *gsp; 868 869 gsp = (volatile struct gspregs *)gp->g_regkva; 870 gsp->ctrl = (gsp->ctrl & ~(INCR | INCW)) | LBL; 871 gsp->hstadrh = 0xC000; 872 gsp->hstadrl = 0x0080; 873 if (*onoff > 0) 874 gsp->data |= 0x9000; 875 else 876 gsp->data &= ~0x9000; 877 878 return 0; 879 } 880 /* 881 * !!! THIS AREA UNDER CONSTRUCTION !!! 882 */ 883 int ul_BltOpMap[16] = { 884 3, 1, 2, 0, 11, 9, 10, 8, 885 7, 5, 6, 4, 15, 13, 14, 12 886 }; 887 888 int 889 ul_bitblt (struct grf_softc *gp, struct grf_bitblt *bb, dev_t dev) 890 { 891 /* XXX not yet implemented, but pretty trivial */ 892 return EPASSTHROUGH; 893 } 894 895 void 896 gsp_write(volatile struct gspregs *gsp, u_short *ptr, size_t size) 897 { 898 u_short put, new_put, next, oc; 899 u_long put_hi, oa; 900 size_t n; 901 902 if (size == 0 || size > 8) 903 return; 904 905 n = size; 906 907 oc = gsp->ctrl; 908 oa = GSPGETHADRS(gsp); 909 910 gsp->ctrl = (oc & ~INCR) | LBL | INCW; 911 GSPSETHADRS(gsp, GSP_MODE_ADRS); 912 gsp->data &= ~GMODE_FLUSH; 913 914 GSPSETHADRS(gsp, PUT_HI_PTR_ADRS); 915 put_hi = gsp->data << 16; 916 917 GSPSETHADRS(gsp, PUT_PTR_ADRS); 918 put = gsp->data; 919 new_put = put + (8<<4); 920 921 GSPSETHADRS(gsp, GET_PTR_ADRS); 922 next = gsp->data; 923 924 while (next == new_put) { 925 /* 926 * we should use an intr. here. unfortunately, we already 927 * are called from an interrupt and can't use tsleep. 928 * so we do busy waiting, at least for the moment. 929 */ 930 931 GSPSETHADRS(gsp,GET_PTR_ADRS); 932 next = gsp->data; 933 } 934 935 GSPSETHADRS(gsp,put|put_hi); 936 gsp->data = *ptr++ | 8<<4; 937 while ( --n > 0) { 938 gsp->data = *ptr++; 939 } 940 941 GSPSETHADRS(gsp,PUT_PTR_ADRS); 942 gsp->data = new_put; 943 GSPSETHADRS(gsp,oa); 944 gsp->ctrl = oc; 945 946 return; 947 } 948 949 #endif /* NGRF */ 950