1 /* $NetBSD: grf_ul.c,v 1.52 2021/04/27 14:48:28 thorpej Exp $ */ 2 #define UL_DEBUG 3 4 /*- 5 * Copyright (c) 1995 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Ignatios Souvatzis. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include "opt_amigacons.h" 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: grf_ul.c,v 1.52 2021/04/27 14:48:28 thorpej Exp $"); 37 38 #include "grful.h" 39 #include "ite.h" 40 #if NGRFUL > 0 41 42 /* Graphics routines for the University of Lowell A2410 board, 43 using the TMS34010 processor. */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/errno.h> 48 #include <sys/ioctl.h> 49 #include <sys/device.h> 50 #include <sys/malloc.h> 51 #include <sys/syslog.h> 52 53 #include <machine/cpu.h> 54 55 #include <amiga/amiga/device.h> 56 #include <amiga/amiga/isr.h> 57 #include <amiga/dev/zbusvar.h> 58 #include <amiga/dev/grfioctl.h> 59 #include <amiga/dev/grfvar.h> 60 #include <amiga/dev/grf_ulreg.h> 61 62 extern u_int16_t tmscode[]; 63 64 int ul_ioctl(struct grf_softc *, u_long, void *, dev_t); 65 int ul_getcmap(struct grf_softc *, struct grf_colormap *, dev_t); 66 int ul_putcmap(struct grf_softc *, struct grf_colormap *, dev_t); 67 int ul_bitblt(struct grf_softc *, struct grf_bitblt *, dev_t); 68 int ul_blank(struct grf_softc *, int *, dev_t); 69 70 static int ulisr(void *); 71 int ulowell_alive(struct grfvideo_mode *); 72 static void ul_load_code(struct grf_softc *); 73 static int ul_load_mon(struct grf_softc *, struct grfvideo_mode *); 74 static int ul_getvmode(struct grf_softc *, struct grfvideo_mode *); 75 static int ul_setvmode(struct grf_softc *, unsigned); 76 static inline void ul_setfb(struct grf_softc *, u_long); 77 78 /* 79 * marked true early so that ulowell_cnprobe() can tell if we are alive. 80 */ 81 int ulowell_inited; 82 83 /* standard-palette definition */ 84 u_int8_t ul_std_palette[] = { 85 0,128, 0,128, 0,128, 0,128, 0,255, 0,255, 0,255, 0,255, 86 0, 0,128,128, 0, 0,128,128, 0, 0,255,255, 0, 0,255,255, 87 0, 0, 0, 0, 128,128,128,128, 0, 0, 0, 0, 255,255,255,255}; 88 89 u_int8_t ul_ovl_palette[] = { 90 128, 0, 0, 0, 91 128, 0, 0, 0, 92 128, 0, 0, 0}; 93 94 struct grfvideo_mode ul_monitor_defs[] = { 95 96 /* 97 * We give all these values in MI units, that is: 98 * horizontal timings in units of pixels 99 * vertical timings in units of lines 100 * point of reference is blanking end. 101 * 102 * The ul_load_mon transforms these values right before loading 103 * them into the chip. 104 * 105 * This leaves us with a single point where things are transformed, 106 * which should make life easier if we ever change things again. 107 */ 108 109 /* 1024x768, 60Hz */ 110 {1,"1024x768", 66667000, 1024,768,8, 1024,1088,1296,1392, 111 768,771,774,798, 0}, 112 /* 864x648, 70Hz */ 113 {2,"864x648", 50000000, 864,648,8, 864,928,992,1056, 114 648,658,663,678, 0}, 115 /* 800x600, 60Hz */ 116 {3, "800x600", 36000000, 800,600,8, 800,864,928,992, 117 600,610,615,630, 0}, 118 /* 640x400, 60 Hz, interlaced */ 119 {4, "640x400i", 14318000, 640,400,8, 640,768,832,912, 120 200,223,203,240, 1}, 121 /* 1024x768, 65Hz interlaced, s.th. is strange */ 122 {5, "1024x768?i", 44980000, 1024,768,8, 1024,1072,1136,1280, 123 488,509,512,534, 1}, 124 /* 1024x1024, 60Hz */ 125 {6, "1024x1024", 80000000, 1024,1024,8, 1024,1040,1120,1248, 126 1024,1027,1030,1055, 0}, 127 /* 736x480, 60 Hz */ 128 {7, "736x480", 28636300, 736,480,8, 736,784,848,928, 129 480,491,495,515, 0}, 130 }; 131 132 int ulowell_mon_max = sizeof (ul_monitor_defs)/sizeof (ul_monitor_defs[0]); 133 134 /* option settable */ 135 #ifndef ULOWELL_OSC1 136 #define ULOWELL_OSC1 36000000 137 #endif 138 139 #ifndef ULOWELL_OSC2 140 #define ULOWELL_OSC2 66667000 141 #endif 142 143 #ifndef ULOWELL_DEFAULT_MON 144 #define ULOWELL_DEFAULT_MON 1 145 #endif 146 147 /* patchable */ 148 int ulowell_default_mon = ULOWELL_DEFAULT_MON; 149 int ulowell_default_gfx = ULOWELL_DEFAULT_MON; 150 151 /* 152 * yes, this should be per board. We don't pay service to multiple boards, 153 * anyway. 154 */ 155 156 u_long ulowell_clock[2] = { ULOWELL_OSC2, ULOWELL_OSC1 }; 157 158 static struct grfvideo_mode *current_mon; 159 160 /* 161 * We dont use ints at the moment, but will need this later to avoid 162 * busy_waiting in gsp_write, and we use it for spurious int warnings. 163 */ 164 165 static int 166 ulisr(void *arg) 167 { 168 struct grf_softc *gp = arg; 169 volatile struct gspregs *ba; 170 u_int16_t thebits; 171 172 if (gp == NULL) 173 return 0; 174 175 ba = (volatile struct gspregs *)gp->g_regkva; 176 177 if (ba == NULL) 178 return 0; 179 180 thebits = ba->ctrl; 181 if (thebits & INTOUT) { 182 log(LOG_INFO, "grf4: got interrupt, ctrl=0x%4x\n", thebits); 183 /* clear int */ 184 ba->ctrl = thebits & ~INTOUT; 185 return 1; 186 } 187 return 0; 188 } 189 190 /* 191 * used to query the ulowell board to see if its alive. 192 * for the moment, a NOP. 193 */ 194 int 195 ulowell_alive(struct grfvideo_mode *mdp) 196 { 197 return 1; 198 } 199 200 /* 201 * Load the (mostly) ite support code and the default colormaps. 202 */ 203 static void 204 ul_load_code(struct grf_softc *gp) 205 { 206 struct grf_ul_softc *gup; 207 volatile struct gspregs *ba; 208 struct grfinfo *gi; 209 int i,j; 210 #if 0 211 struct grf_colormap gcm; 212 #endif 213 214 gup = (struct grf_ul_softc *)gp; 215 ba = (volatile struct gspregs *)gp->g_regkva; 216 gi = &gp->g_display; 217 218 gi->gd_regaddr = ztwopa((volatile void *)ba); 219 gi->gd_regsize = sizeof(struct gspregs); 220 gi->gd_fbaddr = NULL; 221 gi->gd_fbsize = 0; 222 gi->gd_fbwidth = 1024; 223 gi->gd_fbheight = 1024; 224 gi->gd_colors = 256; 225 226 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); 227 ba->hstadrh = 0xC000; 228 ba->hstadrl = 0x0080; 229 ba->data = 0x0; /* disable screen refresh and video output */ 230 ba->data = 0xFFFC; /* screen refresh base address */ 231 ba->data = 0xFFFF; /* no display int possible */ 232 ba->data = 0x000C; /* CAS before RAS refresh each 64 local clks */ 233 234 ba->ctrl = (ba->ctrl & ~INCW) | LBL; 235 ba->hstadrh = 0xfe80; 236 ba->hstadrl = 0; 237 ba->data = 4; 238 ba->hstadrl = 0x20; 239 ba->data = 0xFF; /* all color planes visible */ 240 241 ba->hstadrl = 0; 242 ba->data = 5; 243 ba->hstadrl = 0x20; 244 ba->data = 0; /* no color planes blinking */ 245 246 ba->hstadrl = 0; 247 ba->data = 6; 248 ba->hstadrl = 0x20; 249 ba->data = gup->gus_ovslct = 0x43; 250 /* overlay visible, no overlay blinking, overlay color 0 transparent */ 251 252 ba->hstadrl = 0; 253 ba->data = 7; 254 ba->hstadrl = 0x20; 255 ba->data = 0; /* voodoo */ 256 257 /* clear overlay planes */ 258 ba->ctrl |= INCW; 259 ba->hstadrh = 0xff80; 260 ba->hstadrl = 0x0000; 261 for (i=0xff80000; i< 0xffa0000; ++i) { 262 ba->data = 0; 263 } 264 265 /* download tms code */ 266 267 ba->ctrl = LBL | INCW | NMI | NMIM | HLT | CF; 268 269 printf("\ndownloading TMS code"); 270 i=0; 271 while ((j = tmscode[i++])) { 272 printf("."); 273 ba->hstadrh = tmscode[i++]; 274 ba->hstadrl = tmscode[i++]; 275 while (j-- > 0) { 276 ba->data = tmscode[i++]; 277 } 278 } 279 280 /* font info was uploaded in ite_ul.c(ite_ulinit). */ 281 282 #if 1 283 /* XXX load image palette with some initial values, slightly hacky */ 284 285 ba->hstadrh = 0xfe80; 286 ba->hstadrl = 0x0000; 287 ba->ctrl |= INCW; 288 ba->data = 0; 289 ba->ctrl &= ~INCW; 290 291 for (i=0; i<16; ++i) { 292 ba->data = gup->gus_imcmap[i+ 0] = ul_std_palette[i+ 0]; 293 ba->data = gup->gus_imcmap[i+256] = ul_std_palette[i+16]; 294 ba->data = gup->gus_imcmap[i+512] = ul_std_palette[i+32]; 295 } 296 297 /* 298 * XXX load shadow overlay palette with what the TMS code will load 299 * into the real one some time after the TMS code is started below. 300 * This might be considered a rude hack. 301 */ 302 memcpy(gup->gus_ovcmap, ul_ovl_palette, 3*4); 303 304 /* 305 * Unflush cache, unhalt CPU -> nmi starts to run. This MUST NOT BE 306 * DONE before the image color map initialization above, to guarantee 307 * the index register in the BT458 is not used by more than one CPU 308 * at once. 309 * 310 * XXX For the same reason, we'll have to rething ul_putcmap(). For 311 * details, look at comment there. 312 */ 313 ba->ctrl &= ~(HLT|CF); 314 315 #else 316 /* 317 * XXX I wonder why this partially ever worked. 318 * 319 * This can't possibly work this way, as we are copyin()ing data in 320 * ul_putcmap. 321 * 322 * I guess this partially worked because SFC happened to point to 323 * to supervisor data space on 68030 machines coming from the old 324 * boot loader. 325 * 326 * While this looks more correct than the hack in the other part of the 327 * loop, we would have to do our own version of the loop through 328 * colormap entries, set up command buffer, and call gsp_write(), or 329 * factor out some code. 330 */ 331 332 /* 333 * XXX This version will work for the overlay, if our queue codes 334 * initial conditions are set at load time (not start time). 335 * It further assumes that ul_putcmap only uses the 336 * GRFIMDEV/GRFOVDEV bits of the dev parameter. 337 */ 338 339 340 /* unflush cache, unhalt CPU first -> nmi starts to run */ 341 ba->ctrl &= ~(HLT|CF); 342 343 gcm.index = 0; 344 gcm.count = 16; 345 gcm.red = ul_std_palette + 0; 346 gcm.green = ul_std_palette + 16; 347 gcm.blue = ul_std_palette + 32; 348 ul_putcmap(gp, &gcm, GRFIMDEV); 349 350 gcm.index = 0; 351 gcm.count = 4; 352 gcm.red = ul_ovl_palette + 0; 353 gcm.green = ul_ovl_palette + 4; 354 gcm.blue = ul_ovl_palette + 8; 355 ul_putcmap(gp, &gcm, GRFOVDEV); 356 #endif 357 358 } 359 360 static int 361 ul_load_mon(struct grf_softc *gp, struct grfvideo_mode *md) 362 { 363 struct grfinfo *gi; 364 volatile struct gspregs *ba; 365 u_int16_t buf[8]; 366 367 gi = &gp->g_display; 368 ba = (volatile struct gspregs *)gp->g_regkva; 369 370 gi->gd_dyn.gdi_fbx = 0; 371 gi->gd_dyn.gdi_fby = 0; 372 gi->gd_dyn.gdi_dwidth = md->disp_width; 373 gi->gd_dyn.gdi_dheight = md->disp_height; 374 gi->gd_dyn.gdi_dx = 0; 375 gi->gd_dyn.gdi_dy = 0; 376 377 ba->ctrl = (ba->ctrl & ~INCR) | (LBL | INCW); /* XXX */ 378 379 ba->hstadrh = 0xC000; 380 ba->hstadrl = 0x0000; 381 382 ba->data = (md->hsync_stop - md->hsync_start)/16; 383 ba->data = (md->htotal - md->hsync_start)/16 - 1; 384 ba->data = (md->hblank_start + md->htotal - md->hsync_start)/16 - 1; 385 ba->data = md->htotal/16 - 1; 386 387 ba->data = md->vsync_stop - md->vsync_start; 388 ba->data = md->vtotal - md->vsync_start - 1; 389 ba->data = md->vblank_start + md->vtotal - md->vsync_start - 1; 390 ba->data = md->vtotal - 1; 391 392 ba->ctrl &= ~INCW; 393 ba->hstadrh = 0xFE90; 394 ba->hstadrl = 0x0000; 395 396 if (abs(md->pixel_clock - ulowell_clock[0]) > 397 abs(md->pixel_clock - ulowell_clock[1])) { 398 399 ba->data = (ba->data & 0xFC) | 2 | 1; 400 md->pixel_clock = ulowell_clock[1]; 401 402 } else { 403 ba->data = (ba->data & 0xFC) | 2 | 0; 404 md->pixel_clock = ulowell_clock[0]; 405 } 406 407 ba->ctrl |= LBL | INCW; 408 ba->hstadrh = 0xC000; 409 ba->hstadrl = 0x0080; 410 ba->data = md->disp_flags & GRF_FLAGS_LACE ? 0xb020 : 0xf020; 411 412 /* I guess this should be in the yet unimplemented mode select ioctl */ 413 /* Hm.. maybe not. We always put the console on overlay plane no 0. */ 414 /* Anyway, this _IS_ called in the mode select ioctl. */ 415 416 /* ite support code parameters: */ 417 buf[0] = GCMD_MCHG; 418 buf[1] = md->disp_width; /* display width */ 419 buf[2] = md->disp_height; /* display height */ 420 buf[3] = 0; /* LSW of frame buffer origin */ 421 buf[4] = 0xFF80; /* MSW of frame buffer origin */ 422 buf[5] = gi->gd_fbwidth * 1; /* frame buffer pitch */ 423 buf[6] = 1; /* frame buffer depth */ 424 gsp_write(ba, buf, 7); 425 426 return(1); 427 } 428 429 int ul_mode(struct grf_softc *, u_long, void *, u_long, int); 430 431 void grfulattach(device_t, device_t, void *); 432 int grfulprint(void *, const char *); 433 int grfulmatch(device_t, cfdata_t, void *); 434 435 CFATTACH_DECL_NEW(grful, sizeof(struct grf_ul_softc), 436 grfulmatch, grfulattach, NULL, NULL); 437 438 /* 439 * only used in console init 440 */ 441 static struct cfdata *cfdata; 442 443 /* 444 * we make sure to only init things once. this is somewhat 445 * tricky regarding the console. 446 */ 447 int 448 grfulmatch(device_t parent, cfdata_t cf, void *aux) 449 { 450 #ifdef ULOWELLCONSOLE 451 static int ulconunit = -1; 452 #endif 453 struct zbus_args *zap; 454 455 zap = aux; 456 457 /* 458 * allow only one ulowell console 459 */ 460 if (amiga_realconfig == 0) 461 #ifdef ULOWELLCONSOLE 462 if (ulconunit != -1) 463 #endif 464 return(0); 465 466 if (zap->manid != 1030 || zap->prodid != 0) 467 return(0); 468 469 #ifdef ULOWELLCONSOLE 470 if (amiga_realconfig == 0 || ulconunit != cf->cf_unit) { 471 #endif 472 if ((unsigned)ulowell_default_mon > ulowell_mon_max) 473 ulowell_default_mon = 1; 474 475 current_mon = ul_monitor_defs + ulowell_default_mon - 1; 476 if (ulowell_alive(current_mon) == 0) 477 return(0); 478 #ifdef ULOWELLCONSOLE 479 if (amiga_realconfig == 0) { 480 ulconunit = cf->cf_unit; 481 cfdata = cf; 482 } 483 } 484 #endif 485 return(1); 486 } 487 488 /* 489 * attach to the grfbus (zbus) 490 */ 491 void 492 grfulattach(device_t parent, device_t self, void *aux) 493 { 494 static struct grf_ul_softc congrf; 495 struct device temp; 496 struct zbus_args *zap; 497 struct grf_softc *gp; 498 struct grf_ul_softc *gup; 499 500 zap = aux; 501 502 if (self == NULL) { 503 gup = &congrf; 504 gp = &gup->gus_sc; 505 gp->g_device = &temp; 506 temp.dv_private = gp; 507 } else { 508 gup = device_private(self); 509 gp = &gup->gus_sc; 510 gp->g_device = self; 511 } 512 513 if (self != NULL && congrf.gus_sc.g_regkva != 0) { 514 /* 515 * inited earlier, just copy (not device struct) 516 */ 517 memcpy(&gp->g_display, &congrf.gus_sc.g_display, 518 (char *)&gup->gus_isr - (char *)&gp->g_display); 519 520 /* ...and transfer the isr */ 521 gup->gus_isr.isr_ipl = 2; 522 gup->gus_isr.isr_intr = ulisr; 523 gup->gus_isr.isr_arg = (void *)gp; 524 /* 525 * To make sure ints are always caught, first add new isr 526 * then remove old: 527 */ 528 add_isr(&gup->gus_isr); 529 remove_isr(&congrf.gus_isr); 530 } else { 531 gp->g_regkva = (void *)zap->va; 532 gp->g_fbkva = NULL; 533 gp->g_unit = GRF_ULOWELL_UNIT; 534 gp->g_flags = GF_ALIVE; 535 gp->g_mode = ul_mode; 536 #if NITE > 0 537 gp->g_conpri = grful_cnprobe(); 538 #endif 539 gp->g_data = NULL; 540 541 gup->gus_isr.isr_ipl = 2; 542 gup->gus_isr.isr_intr = ulisr; 543 gup->gus_isr.isr_arg = (void *)gp; 544 add_isr(&gup->gus_isr); 545 546 (void)ul_load_code(gp); 547 (void)ul_load_mon(gp, current_mon); 548 #if NITE > 0 549 grful_iteinit(gp); 550 #endif 551 } 552 if (self != NULL) 553 printf("\n"); 554 /* 555 * attach grf 556 */ 557 amiga_config_found(cfdata, gp->g_device, gp, grfulprint, CFARG_EOL); 558 } 559 560 int 561 grfulprint(void *aux, const char *pnp) 562 { 563 if (pnp) 564 aprint_normal("grf%d at %s", ((struct grf_softc *)aux)->g_unit, 565 pnp); 566 return(UNCONF); 567 } 568 569 static int 570 ul_getvmode (struct grf_softc *gp, struct grfvideo_mode *vm) 571 { 572 struct grfvideo_mode *md; 573 574 if (vm->mode_num && vm->mode_num > ulowell_mon_max) 575 return EINVAL; 576 577 if (! vm->mode_num) 578 vm->mode_num = current_mon - ul_monitor_defs + 1; 579 580 md = ul_monitor_defs + vm->mode_num - 1; 581 strncpy (vm->mode_descr, md->mode_descr, 582 sizeof (vm->mode_descr)); 583 584 /* XXX should tell TMS to measure it */ 585 vm->pixel_clock = md->pixel_clock; 586 vm->disp_width = md->disp_width; 587 vm->disp_height = md->disp_height; 588 vm->depth = md->depth; 589 590 vm->hblank_start = md->hblank_start; 591 vm->hsync_start = md->hsync_start; 592 vm->hsync_stop = md->hsync_stop; 593 vm->htotal = md->htotal; 594 595 vm->vblank_start = md->vblank_start; 596 vm->vsync_start = md->vsync_start; 597 vm->vsync_stop = md->vsync_stop; 598 vm->vtotal = md->vtotal; 599 600 vm->disp_flags = md->disp_flags; 601 return 0; 602 } 603 604 605 static int 606 ul_setvmode (struct grf_softc *gp, unsigned mode) 607 { 608 int error; 609 610 if (!mode || mode > ulowell_mon_max) 611 return EINVAL; 612 613 current_mon = ul_monitor_defs + mode - 1; 614 615 error = ul_load_mon (gp, current_mon) ? 0 : EINVAL; 616 617 return error; 618 } 619 620 /* 621 * Set the frame buffer or overlay planes on or off. 622 * Always succeeds. 623 */ 624 625 static inline void 626 ul_setfb(struct grf_softc *gp, u_long cmd) 627 { 628 struct grf_ul_softc *gup; 629 volatile struct gspregs *ba; 630 631 gup = (struct grf_ul_softc *)gp; 632 633 ba = (volatile struct gspregs *)gp->g_regkva; 634 ba->ctrl = LBL; 635 ba->hstadrh = 0xfe80; 636 ba->hstadrl = 0x0000; 637 ba->data = 6; 638 ba->hstadrl = 0x0020; 639 640 switch (cmd) { 641 case GM_GRFON: 642 gup->gus_ovslct |= 0x40; 643 break; 644 case GM_GRFOFF: 645 gup->gus_ovslct &= ~0x40; 646 break; 647 case GM_GRFOVON: 648 gup->gus_ovslct |= 3; 649 break; 650 case GM_GRFOVOFF: 651 gup->gus_ovslct &= ~3; 652 break; 653 } 654 ba->data = gup->gus_ovslct; 655 } 656 657 /* 658 * Change the mode of the display. 659 * Return a UNIX error number or 0 for success. 660 */ 661 int 662 ul_mode(struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3) 663 { 664 int i; 665 struct grfdyninfo *gd; 666 667 switch (cmd) { 668 case GM_GRFON: 669 case GM_GRFOFF: 670 case GM_GRFOVON: 671 case GM_GRFOVOFF: 672 ul_setfb (gp, cmd); 673 return 0; 674 675 case GM_GRFCONFIG: 676 gd = (struct grfdyninfo *)arg; 677 for (i=0; i<ulowell_mon_max; ++i) { 678 if (ul_monitor_defs[i].disp_width == gd->gdi_dwidth && 679 ul_monitor_defs[i].disp_height == gd->gdi_dheight) 680 return ul_setvmode(gp, i+1); 681 } 682 return EINVAL; 683 684 case GM_GRFGETVMODE: 685 return ul_getvmode (gp, (struct grfvideo_mode *) arg); 686 687 case GM_GRFSETVMODE: 688 return ul_setvmode (gp, *(unsigned *) arg); 689 690 case GM_GRFGETNUMVM: 691 *(int *)arg = ulowell_mon_max; 692 return 0; 693 694 case GM_GRFIOCTL: 695 return ul_ioctl (gp, a2, arg, (dev_t)a3); 696 697 default: 698 break; 699 } 700 701 return EPASSTHROUGH; 702 } 703 704 int 705 ul_ioctl (register struct grf_softc *gp, u_long cmd, void *data, dev_t dev) 706 { 707 switch (cmd) { 708 #if 0 709 /* 710 * XXX we have no hardware sprites, but might implement them 711 * later in TMS code. 712 */ 713 714 case GRFIOCGSPRITEPOS: 715 return ul_getspritepos (gp, (struct grf_position *) data); 716 717 case GRFIOCSSPRITEPOS: 718 return ul_setspritepos (gp, (struct grf_position *) data); 719 720 case GRFIOCSSPRITEINF: 721 return ul_setspriteinfo (gp, (struct grf_spriteinfo *) data); 722 723 case GRFIOCGSPRITEINF: 724 return ul_getspriteinfo (gp, (struct grf_spriteinfo *) data); 725 726 case GRFIOCGSPRITEMAX: 727 return ul_getspritemax (gp, (struct grf_position *) data); 728 729 #endif 730 731 case GRFIOCGETCMAP: 732 return ul_getcmap (gp, (struct grf_colormap *) data, dev); 733 734 case GRFIOCPUTCMAP: 735 return ul_putcmap (gp, (struct grf_colormap *) data, dev); 736 737 case GRFIOCBITBLT: 738 return ul_bitblt (gp, (struct grf_bitblt *) data, dev); 739 740 case GRFIOCBLANK: 741 return ul_blank (gp, (int *) data, dev); 742 } 743 744 return EPASSTHROUGH; 745 } 746 747 int 748 ul_getcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev) 749 { 750 struct grf_ul_softc *gup; 751 u_int8_t *mymap; 752 int mxidx, error; 753 754 gup = (struct grf_ul_softc *)gp; 755 756 if (minor(dev) & GRFIMDEV) { 757 mxidx = 256; 758 mymap = gup->gus_imcmap; 759 } else { 760 mxidx = 4; 761 mymap = gup->gus_ovcmap; 762 } 763 764 if (cmap->count == 0 || cmap->index >= mxidx) 765 return 0; 766 767 if (cmap->count > mxidx - cmap->index) 768 cmap->count = mxidx - cmap->index; 769 770 /* just copyout from the shadow color map */ 771 772 if ((error = copyout(mymap + cmap->index, cmap->red, cmap->count)) 773 774 || (error = copyout(mymap + mxidx + cmap->index, cmap->green, 775 cmap->count)) 776 777 || (error = copyout(mymap + mxidx * 2 + cmap->index, cmap->blue, 778 cmap->count))) 779 780 return(error); 781 782 return(0); 783 } 784 785 int 786 ul_putcmap (struct grf_softc *gp, struct grf_colormap *cmap, dev_t dev) 787 { 788 struct grf_ul_softc *gup; 789 volatile struct gspregs *ba; 790 u_int16_t cmd[8]; 791 int x, mxidx, error; 792 u_int8_t *mymap; 793 794 gup = (struct grf_ul_softc *)gp; 795 796 if (minor(dev) & GRFIMDEV) { 797 mxidx = 256; 798 mymap = gup->gus_imcmap; 799 } else { 800 mxidx = 4; 801 mymap = gup->gus_ovcmap; 802 } 803 804 if (cmap->count == 0 || cmap->index >= mxidx) 805 return 0; 806 807 if (cmap->count > mxidx - cmap->index) 808 cmap->count = mxidx - cmap->index; 809 810 /* first copyin to our shadow color map */ 811 812 if ((error = copyin(cmap->red, mymap + cmap->index, cmap->count)) 813 814 || (error = copyin(cmap->green, mymap + cmap->index + mxidx, 815 cmap->count)) 816 817 || (error = copyin(cmap->blue, mymap + cmap->index + mxidx*2, 818 cmap->count))) 819 820 return error; 821 822 823 /* then write from there to the hardware */ 824 ba = (volatile struct gspregs *)gp->g_regkva; 825 /* 826 * XXX This is a bad thing to do. 827 * We should always use the gsp call, or have a means to arbitrate 828 * the usage of the BT458 index register. Else there might be a 829 * race condition (when writing both colormaps at nearly the same 830 * time), where one CPU changes the index register when the other 831 * one has not finished using it. 832 */ 833 if (mxidx > 4) { 834 /* image color map: we can write, with a hack, directly */ 835 ba->ctrl = LBL; 836 ba->hstadrh = 0xfe80; 837 ba->hstadrl = 0x0000; 838 ba->ctrl |= INCW; 839 ba->data = cmap->index; 840 ba->ctrl &= ~INCW; 841 842 for (x=cmap->index; x < cmap->index + cmap->count; ++x) { 843 ba->data = (u_int16_t) mymap[x]; 844 ba->data = (u_int16_t) mymap[x + mxidx]; 845 ba->data = (u_int16_t) mymap[x + mxidx * 2]; 846 } 847 } else { 848 849 /* overlay planes color map: have to call tms to do it */ 850 cmd[0] = GCMD_CMAP; 851 cmd[1] = 1; 852 for (x=cmap->index; x < cmap->index + cmap->count; ++x) { 853 cmd[2] = x; 854 cmd[3] = mymap[x]; 855 cmd[4] = mymap[x + mxidx]; 856 cmd[5] = mymap[x + mxidx * 2]; 857 gsp_write(ba, cmd, 6); 858 } 859 } 860 return 0; 861 } 862 863 int 864 ul_blank(struct grf_softc *gp, int *onoff, dev_t dev) 865 { 866 volatile struct gspregs *gsp; 867 868 gsp = (volatile struct gspregs *)gp->g_regkva; 869 gsp->ctrl = (gsp->ctrl & ~(INCR | INCW)) | LBL; 870 gsp->hstadrh = 0xC000; 871 gsp->hstadrl = 0x0080; 872 if (*onoff > 0) 873 gsp->data |= 0x9000; 874 else 875 gsp->data &= ~0x9000; 876 877 return 0; 878 } 879 /* 880 * !!! THIS AREA UNDER CONSTRUCTION !!! 881 */ 882 int ul_BltOpMap[16] = { 883 3, 1, 2, 0, 11, 9, 10, 8, 884 7, 5, 6, 4, 15, 13, 14, 12 885 }; 886 887 int 888 ul_bitblt (struct grf_softc *gp, struct grf_bitblt *bb, dev_t dev) 889 { 890 /* XXX not yet implemented, but pretty trivial */ 891 return EPASSTHROUGH; 892 } 893 894 void 895 gsp_write(volatile struct gspregs *gsp, u_short *ptr, size_t size) 896 { 897 u_short put, new_put, next, oc; 898 u_long put_hi, oa; 899 size_t n; 900 901 if (size == 0 || size > 8) 902 return; 903 904 n = size; 905 906 oc = gsp->ctrl; 907 oa = GSPGETHADRS(gsp); 908 909 gsp->ctrl = (oc & ~INCR) | LBL | INCW; 910 GSPSETHADRS(gsp, GSP_MODE_ADRS); 911 gsp->data &= ~GMODE_FLUSH; 912 913 GSPSETHADRS(gsp, PUT_HI_PTR_ADRS); 914 put_hi = gsp->data << 16; 915 916 GSPSETHADRS(gsp, PUT_PTR_ADRS); 917 put = gsp->data; 918 new_put = put + (8<<4); 919 920 GSPSETHADRS(gsp, GET_PTR_ADRS); 921 next = gsp->data; 922 923 while (next == new_put) { 924 /* 925 * we should use an intr. here. unfortunately, we already 926 * are called from an interrupt and can't use tsleep. 927 * so we do busy waiting, at least for the moment. 928 */ 929 930 GSPSETHADRS(gsp,GET_PTR_ADRS); 931 next = gsp->data; 932 } 933 934 GSPSETHADRS(gsp,put|put_hi); 935 gsp->data = *ptr++ | 8<<4; 936 while ( --n > 0) { 937 gsp->data = *ptr++; 938 } 939 940 GSPSETHADRS(gsp,PUT_PTR_ADRS); 941 gsp->data = new_put; 942 GSPSETHADRS(gsp,oa); 943 gsp->ctrl = oc; 944 945 return; 946 } 947 948 #endif /* NGRF */ 949