1*78f74058Ssnj /* $NetBSD: cbscvar.h,v 1.4 2009/10/21 23:53:38 snj Exp $ */ 266e9e901Smhitch 366e9e901Smhitch /* 466e9e901Smhitch * Copyright (c) 1997 Michael L. Hitch. 566e9e901Smhitch * All rights reserved. 666e9e901Smhitch * 766e9e901Smhitch * Redistribution and use in source and binary forms, with or without 866e9e901Smhitch * modification, are permitted provided that the following conditions 966e9e901Smhitch * are met: 1066e9e901Smhitch * 1. Redistributions of source code must retain the above copyright 1166e9e901Smhitch * notice, this list of conditions and the following disclaimer. 1266e9e901Smhitch * 2. Redistributions in binary form must reproduce the above copyright 1366e9e901Smhitch * notice, this list of conditions and the following disclaimer in the 1466e9e901Smhitch * documentation and/or other materials provided with the distribution. 1566e9e901Smhitch * 1666e9e901Smhitch * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1766e9e901Smhitch * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1866e9e901Smhitch * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 1966e9e901Smhitch * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2066e9e901Smhitch * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2166e9e901Smhitch * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2266e9e901Smhitch * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2366e9e901Smhitch * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2466e9e901Smhitch * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2566e9e901Smhitch * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2666e9e901Smhitch */ 2766e9e901Smhitch 2866e9e901Smhitch struct cbsc_softc { 2966e9e901Smhitch struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 3066e9e901Smhitch 3166e9e901Smhitch struct isr sc_isr; /* Interrupt chain struct */ 3266e9e901Smhitch 3378a1d236Stsutsui volatile uint8_t *sc_reg; /* the registers */ 3478a1d236Stsutsui volatile uint8_t *sc_dmabase; 3566e9e901Smhitch 3666e9e901Smhitch int sc_active; /* Pseudo-DMA state vars */ 3766e9e901Smhitch int sc_datain; 3866e9e901Smhitch int sc_tc; 3966e9e901Smhitch size_t sc_dmasize; 4066e9e901Smhitch size_t sc_dmatrans; 4178a1d236Stsutsui uint8_t **sc_dmaaddr; 4266e9e901Smhitch size_t *sc_pdmalen; 43744246faSis paddr_t sc_pa; 4466e9e901Smhitch 4578a1d236Stsutsui uint8_t sc_pad1[18]; /* XXX */ 4678a1d236Stsutsui uint8_t sc_alignbuf[256]; 4778a1d236Stsutsui uint8_t sc_pad2[16]; 4878a1d236Stsutsui uint8_t sc_hardbits; 4978a1d236Stsutsui uint8_t sc_portbits; 5078a1d236Stsutsui uint8_t sc_xfr_align; 5166e9e901Smhitch }; 5266e9e901Smhitch 5366e9e901Smhitch #define CBSC_HB_CREQ 0x80 5466e9e901Smhitch 5566e9e901Smhitch #define CBSC_PB_LONG 0x20 5666e9e901Smhitch #define CBSC_PB_WRITE 0x40 5766e9e901Smhitch #define CBSC_PB_LED 0x80 58